xref: /llvm-project/llvm/test/CodeGen/ARM/switch-minsize.ll (revision 9c4c2f24725e9f98b96fb360894276d342c3ba50)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s | FileCheck %s
3
4target datalayout = "e-m:o-p:32:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32"
5target triple = "thumbv7-apple-ios8.0.0"
6
7declare void @g(i32)
8define void @f(i32 %val) optsize minsize {
9; CHECK-LABEL: f:
10; CHECK:       @ %bb.0:
11; CHECK-NEXT:    mov r1, r0
12; CHECK-NEXT:    movs r0, #1
13; CHECK-NEXT:    cbz r1, LBB0_6
14; CHECK-NEXT:  @ %bb.1:
15; CHECK-NEXT:    movw r2, #1154
16; CHECK-NEXT:    cmp r1, r2
17; CHECK-NEXT:    beq LBB0_4
18; CHECK-NEXT:  @ %bb.2:
19; CHECK-NEXT:    movw r2, #994
20; CHECK-NEXT:    cmp r1, r2
21; CHECK-NEXT:    beq LBB0_5
22; CHECK-NEXT:  @ %bb.3:
23; CHECK-NEXT:    cmp r1, #9
24; CHECK-NEXT:    it ne
25; CHECK-NEXT:    movne r0, #11
26; CHECK-NEXT:    b LBB0_6
27; CHECK-NEXT:  LBB0_4: @ %four
28; CHECK-NEXT:    movs r0, #87
29; CHECK-NEXT:    b LBB0_6
30; CHECK-NEXT:  LBB0_5: @ %three
31; CHECK-NEXT:    movs r0, #78
32; CHECK-NEXT:  LBB0_6: @ %common.ret
33; CHECK-NEXT:    str lr, [sp, #-4]!
34; CHECK-NEXT:    bl _g
35; CHECK-NEXT:    ldr lr, [sp], #4
36; CHECK-NEXT:    bx lr
37  switch i32 %val, label %def [
38    i32 0, label %one
39    i32 9, label %two
40    i32 994, label %three
41    i32 1154, label %four
42  ]
43
44one:
45  call void @g(i32 1)
46  ret void
47two:
48  call void @g(i32 001)
49  ret void
50three:
51  call void @g(i32 78)
52  ret void
53four:
54  call void @g(i32 87)
55  ret void
56def:
57  call void @g(i32 11)
58  ret void
59}
60