1*e63455d5SPeter Smith; RUN: llc -mtriple=arm-linux-gnueabihf -filetype=obj <%s | llvm-objdump --triple=armv7 --no-show-raw-insn -d - | FileCheck %s 2*e63455d5SPeter Smith 3*e63455d5SPeter Smith;; Expect architectural nop to be used between func2 and func3 but not func1 4*e63455d5SPeter Smith;; and func2 due to lack of subtarget support in func2. 5*e63455d5SPeter Smith 6*e63455d5SPeter Smithdefine i32 @func1() #0 align 16 { 7*e63455d5SPeter Smithentry: 8*e63455d5SPeter Smith ret i32 0 9*e63455d5SPeter Smith} 10*e63455d5SPeter Smith 11*e63455d5SPeter Smithdefine i32 @func2() #1 align 16 { 12*e63455d5SPeter Smithentry: 13*e63455d5SPeter Smith ret i32 0 14*e63455d5SPeter Smith} 15*e63455d5SPeter Smith 16*e63455d5SPeter Smithdefine i32 @func3() #0 align 16 { 17*e63455d5SPeter Smithentry: 18*e63455d5SPeter Smith ret i32 0 19*e63455d5SPeter Smith} 20*e63455d5SPeter Smith 21*e63455d5SPeter Smithattributes #0 = { "target-cpu"="generic" "target-features"="+armv7-a,+dsp,+neon,+vfp3,-thumb-mode" "unsafe-fp-math"="false" "use-soft-float"="false" } 22*e63455d5SPeter Smithattributes #1 = { "target-cpu"="arm7tdmi" "target-features"="+armv4t" "use-soft-float"="true" } 23*e63455d5SPeter Smith 24*e63455d5SPeter Smith 25*e63455d5SPeter Smith; CHECK: 00000000 <func1>: 26*e63455d5SPeter Smith; CHECK-NEXT: 0: mov r0, #0 27*e63455d5SPeter Smith; CHECK-NEXT: 4: bx lr 28*e63455d5SPeter Smith; CHECK-NEXT: 8: mov r0, r0 29*e63455d5SPeter Smith; CHECK-NEXT: c: mov r0, r0 30*e63455d5SPeter Smith 31*e63455d5SPeter Smith; CHECK: 00000010 <func2>: 32*e63455d5SPeter Smith; CHECK-NEXT: 10: mov r0, #0 33*e63455d5SPeter Smith; CHECK-NEXT: 14: bx lr 34*e63455d5SPeter Smith; CHECK-NEXT: 18: nop 35*e63455d5SPeter Smith; CHECK-NEXT: 1c: nop 36*e63455d5SPeter Smith 37*e63455d5SPeter Smith; CHECK: 00000020 <func3>: 38*e63455d5SPeter Smith; CHECK-NEXT: 20: mov r0, #0 39*e63455d5SPeter Smith; CHECK-NEXT: 24: bx lr 40