xref: /llvm-project/llvm/test/CodeGen/ARM/srem-seteq-illegal-types.ll (revision aef0e77c76e3fb810852f3d0c79cc4daae52f67e) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=armv5-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=ARM5
3; RUN: llc -mtriple=armv6-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=ARM6
4; RUN: llc -mtriple=armv7-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=ARM7
5; RUN: llc -mtriple=armv8-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=ARM8
6; RUN: llc -mtriple=armv7-unknown-linux-gnu -mattr=+neon < %s | FileCheck %s --check-prefixes=NEON7
7; RUN: llc -mtriple=armv8-unknown-linux-gnu -mattr=+neon < %s | FileCheck %s --check-prefixes=NEON8
8
9define i1 @test_srem_odd(i29 %X) nounwind {
10; ARM5-LABEL: test_srem_odd:
11; ARM5:       @ %bb.0:
12; ARM5-NEXT:    ldr r2, .LCPI0_1
13; ARM5-NEXT:    ldr r1, .LCPI0_0
14; ARM5-NEXT:    mla r3, r0, r2, r1
15; ARM5-NEXT:    ldr r2, .LCPI0_2
16; ARM5-NEXT:    mov r0, #0
17; ARM5-NEXT:    bic r1, r3, #-536870912
18; ARM5-NEXT:    cmp r1, r2
19; ARM5-NEXT:    movlo r0, #1
20; ARM5-NEXT:    bx lr
21; ARM5-NEXT:    .p2align 2
22; ARM5-NEXT:  @ %bb.1:
23; ARM5-NEXT:  .LCPI0_0:
24; ARM5-NEXT:    .long 2711469 @ 0x295fad
25; ARM5-NEXT:  .LCPI0_1:
26; ARM5-NEXT:    .long 526025035 @ 0x1f5a814b
27; ARM5-NEXT:  .LCPI0_2:
28; ARM5-NEXT:    .long 5422939 @ 0x52bf5b
29;
30; ARM6-LABEL: test_srem_odd:
31; ARM6:       @ %bb.0:
32; ARM6-NEXT:    ldr r2, .LCPI0_1
33; ARM6-NEXT:    ldr r1, .LCPI0_0
34; ARM6-NEXT:    mla r0, r0, r2, r1
35; ARM6-NEXT:    ldr r2, .LCPI0_2
36; ARM6-NEXT:    bic r1, r0, #-536870912
37; ARM6-NEXT:    mov r0, #0
38; ARM6-NEXT:    cmp r1, r2
39; ARM6-NEXT:    movlo r0, #1
40; ARM6-NEXT:    bx lr
41; ARM6-NEXT:    .p2align 2
42; ARM6-NEXT:  @ %bb.1:
43; ARM6-NEXT:  .LCPI0_0:
44; ARM6-NEXT:    .long 2711469 @ 0x295fad
45; ARM6-NEXT:  .LCPI0_1:
46; ARM6-NEXT:    .long 526025035 @ 0x1f5a814b
47; ARM6-NEXT:  .LCPI0_2:
48; ARM6-NEXT:    .long 5422939 @ 0x52bf5b
49;
50; ARM7-LABEL: test_srem_odd:
51; ARM7:       @ %bb.0:
52; ARM7-NEXT:    movw r1, #24493
53; ARM7-NEXT:    movw r2, #33099
54; ARM7-NEXT:    movt r1, #41
55; ARM7-NEXT:    movt r2, #8026
56; ARM7-NEXT:    mla r0, r0, r2, r1
57; ARM7-NEXT:    movw r2, #48987
58; ARM7-NEXT:    movt r2, #82
59; ARM7-NEXT:    bic r1, r0, #-536870912
60; ARM7-NEXT:    mov r0, #0
61; ARM7-NEXT:    cmp r1, r2
62; ARM7-NEXT:    movwlo r0, #1
63; ARM7-NEXT:    bx lr
64;
65; ARM8-LABEL: test_srem_odd:
66; ARM8:       @ %bb.0:
67; ARM8-NEXT:    movw r1, #24493
68; ARM8-NEXT:    movw r2, #33099
69; ARM8-NEXT:    movt r1, #41
70; ARM8-NEXT:    movt r2, #8026
71; ARM8-NEXT:    mla r0, r0, r2, r1
72; ARM8-NEXT:    movw r2, #48987
73; ARM8-NEXT:    movt r2, #82
74; ARM8-NEXT:    bic r1, r0, #-536870912
75; ARM8-NEXT:    mov r0, #0
76; ARM8-NEXT:    cmp r1, r2
77; ARM8-NEXT:    movwlo r0, #1
78; ARM8-NEXT:    bx lr
79;
80; NEON7-LABEL: test_srem_odd:
81; NEON7:       @ %bb.0:
82; NEON7-NEXT:    movw r1, #24493
83; NEON7-NEXT:    movw r2, #33099
84; NEON7-NEXT:    movt r1, #41
85; NEON7-NEXT:    movt r2, #8026
86; NEON7-NEXT:    mla r0, r0, r2, r1
87; NEON7-NEXT:    movw r2, #48987
88; NEON7-NEXT:    movt r2, #82
89; NEON7-NEXT:    bic r1, r0, #-536870912
90; NEON7-NEXT:    mov r0, #0
91; NEON7-NEXT:    cmp r1, r2
92; NEON7-NEXT:    movwlo r0, #1
93; NEON7-NEXT:    bx lr
94;
95; NEON8-LABEL: test_srem_odd:
96; NEON8:       @ %bb.0:
97; NEON8-NEXT:    movw r1, #24493
98; NEON8-NEXT:    movw r2, #33099
99; NEON8-NEXT:    movt r1, #41
100; NEON8-NEXT:    movt r2, #8026
101; NEON8-NEXT:    mla r0, r0, r2, r1
102; NEON8-NEXT:    movw r2, #48987
103; NEON8-NEXT:    movt r2, #82
104; NEON8-NEXT:    bic r1, r0, #-536870912
105; NEON8-NEXT:    mov r0, #0
106; NEON8-NEXT:    cmp r1, r2
107; NEON8-NEXT:    movwlo r0, #1
108; NEON8-NEXT:    bx lr
109  %srem = srem i29 %X, 99
110  %cmp = icmp eq i29 %srem, 0
111  ret i1 %cmp
112}
113
114define i1 @test_srem_even(i4 %X) nounwind {
115; ARM5-LABEL: test_srem_even:
116; ARM5:       @ %bb.0:
117; ARM5-NEXT:    lsl r1, r0, #28
118; ARM5-NEXT:    asr r1, r1, #28
119; ARM5-NEXT:    add r1, r1, r1, lsl #1
120; ARM5-NEXT:    lsr r2, r1, #4
121; ARM5-NEXT:    add r1, r2, r1, lsr #31
122; ARM5-NEXT:    add r1, r1, r1, lsl #1
123; ARM5-NEXT:    sub r0, r0, r1, lsl #1
124; ARM5-NEXT:    and r0, r0, #15
125; ARM5-NEXT:    sub r0, r0, #1
126; ARM5-NEXT:    clz r0, r0
127; ARM5-NEXT:    lsr r0, r0, #5
128; ARM5-NEXT:    bx lr
129;
130; ARM6-LABEL: test_srem_even:
131; ARM6:       @ %bb.0:
132; ARM6-NEXT:    lsl r1, r0, #28
133; ARM6-NEXT:    asr r1, r1, #28
134; ARM6-NEXT:    add r1, r1, r1, lsl #1
135; ARM6-NEXT:    lsr r2, r1, #4
136; ARM6-NEXT:    add r1, r2, r1, lsr #31
137; ARM6-NEXT:    add r1, r1, r1, lsl #1
138; ARM6-NEXT:    sub r0, r0, r1, lsl #1
139; ARM6-NEXT:    and r0, r0, #15
140; ARM6-NEXT:    sub r0, r0, #1
141; ARM6-NEXT:    clz r0, r0
142; ARM6-NEXT:    lsr r0, r0, #5
143; ARM6-NEXT:    bx lr
144;
145; ARM7-LABEL: test_srem_even:
146; ARM7:       @ %bb.0:
147; ARM7-NEXT:    sbfx r1, r0, #0, #4
148; ARM7-NEXT:    add r1, r1, r1, lsl #1
149; ARM7-NEXT:    lsr r2, r1, #4
150; ARM7-NEXT:    add r1, r2, r1, lsr #31
151; ARM7-NEXT:    add r1, r1, r1, lsl #1
152; ARM7-NEXT:    sub r0, r0, r1, lsl #1
153; ARM7-NEXT:    and r0, r0, #15
154; ARM7-NEXT:    sub r0, r0, #1
155; ARM7-NEXT:    clz r0, r0
156; ARM7-NEXT:    lsr r0, r0, #5
157; ARM7-NEXT:    bx lr
158;
159; ARM8-LABEL: test_srem_even:
160; ARM8:       @ %bb.0:
161; ARM8-NEXT:    sbfx r1, r0, #0, #4
162; ARM8-NEXT:    add r1, r1, r1, lsl #1
163; ARM8-NEXT:    lsr r2, r1, #4
164; ARM8-NEXT:    add r1, r2, r1, lsr #31
165; ARM8-NEXT:    add r1, r1, r1, lsl #1
166; ARM8-NEXT:    sub r0, r0, r1, lsl #1
167; ARM8-NEXT:    and r0, r0, #15
168; ARM8-NEXT:    sub r0, r0, #1
169; ARM8-NEXT:    clz r0, r0
170; ARM8-NEXT:    lsr r0, r0, #5
171; ARM8-NEXT:    bx lr
172;
173; NEON7-LABEL: test_srem_even:
174; NEON7:       @ %bb.0:
175; NEON7-NEXT:    sbfx r1, r0, #0, #4
176; NEON7-NEXT:    add r1, r1, r1, lsl #1
177; NEON7-NEXT:    lsr r2, r1, #4
178; NEON7-NEXT:    add r1, r2, r1, lsr #31
179; NEON7-NEXT:    add r1, r1, r1, lsl #1
180; NEON7-NEXT:    sub r0, r0, r1, lsl #1
181; NEON7-NEXT:    and r0, r0, #15
182; NEON7-NEXT:    sub r0, r0, #1
183; NEON7-NEXT:    clz r0, r0
184; NEON7-NEXT:    lsr r0, r0, #5
185; NEON7-NEXT:    bx lr
186;
187; NEON8-LABEL: test_srem_even:
188; NEON8:       @ %bb.0:
189; NEON8-NEXT:    sbfx r1, r0, #0, #4
190; NEON8-NEXT:    add r1, r1, r1, lsl #1
191; NEON8-NEXT:    lsr r2, r1, #4
192; NEON8-NEXT:    add r1, r2, r1, lsr #31
193; NEON8-NEXT:    add r1, r1, r1, lsl #1
194; NEON8-NEXT:    sub r0, r0, r1, lsl #1
195; NEON8-NEXT:    and r0, r0, #15
196; NEON8-NEXT:    sub r0, r0, #1
197; NEON8-NEXT:    clz r0, r0
198; NEON8-NEXT:    lsr r0, r0, #5
199; NEON8-NEXT:    bx lr
200  %srem = srem i4 %X, 6
201  %cmp = icmp eq i4 %srem, 1
202  ret i1 %cmp
203}
204
205define i1 @test_srem_pow2_setne(i6 %X) nounwind {
206; ARM5-LABEL: test_srem_pow2_setne:
207; ARM5:       @ %bb.0:
208; ARM5-NEXT:    lsl r1, r0, #26
209; ARM5-NEXT:    mov r2, #3
210; ARM5-NEXT:    and r1, r2, r1, asr #31
211; ARM5-NEXT:    add r1, r0, r1
212; ARM5-NEXT:    and r1, r1, #60
213; ARM5-NEXT:    sub r0, r0, r1
214; ARM5-NEXT:    ands r0, r0, #63
215; ARM5-NEXT:    movne r0, #1
216; ARM5-NEXT:    bx lr
217;
218; ARM6-LABEL: test_srem_pow2_setne:
219; ARM6:       @ %bb.0:
220; ARM6-NEXT:    lsl r1, r0, #26
221; ARM6-NEXT:    mov r2, #3
222; ARM6-NEXT:    and r1, r2, r1, asr #31
223; ARM6-NEXT:    add r1, r0, r1
224; ARM6-NEXT:    and r1, r1, #60
225; ARM6-NEXT:    sub r0, r0, r1
226; ARM6-NEXT:    ands r0, r0, #63
227; ARM6-NEXT:    movne r0, #1
228; ARM6-NEXT:    bx lr
229;
230; ARM7-LABEL: test_srem_pow2_setne:
231; ARM7:       @ %bb.0:
232; ARM7-NEXT:    lsl r1, r0, #26
233; ARM7-NEXT:    mov r2, #3
234; ARM7-NEXT:    and r1, r2, r1, asr #31
235; ARM7-NEXT:    add r1, r0, r1
236; ARM7-NEXT:    and r1, r1, #60
237; ARM7-NEXT:    sub r0, r0, r1
238; ARM7-NEXT:    ands r0, r0, #63
239; ARM7-NEXT:    movwne r0, #1
240; ARM7-NEXT:    bx lr
241;
242; ARM8-LABEL: test_srem_pow2_setne:
243; ARM8:       @ %bb.0:
244; ARM8-NEXT:    lsl r1, r0, #26
245; ARM8-NEXT:    mov r2, #3
246; ARM8-NEXT:    and r1, r2, r1, asr #31
247; ARM8-NEXT:    add r1, r0, r1
248; ARM8-NEXT:    and r1, r1, #60
249; ARM8-NEXT:    sub r0, r0, r1
250; ARM8-NEXT:    ands r0, r0, #63
251; ARM8-NEXT:    movwne r0, #1
252; ARM8-NEXT:    bx lr
253;
254; NEON7-LABEL: test_srem_pow2_setne:
255; NEON7:       @ %bb.0:
256; NEON7-NEXT:    lsl r1, r0, #26
257; NEON7-NEXT:    mov r2, #3
258; NEON7-NEXT:    and r1, r2, r1, asr #31
259; NEON7-NEXT:    add r1, r0, r1
260; NEON7-NEXT:    and r1, r1, #60
261; NEON7-NEXT:    sub r0, r0, r1
262; NEON7-NEXT:    ands r0, r0, #63
263; NEON7-NEXT:    movwne r0, #1
264; NEON7-NEXT:    bx lr
265;
266; NEON8-LABEL: test_srem_pow2_setne:
267; NEON8:       @ %bb.0:
268; NEON8-NEXT:    lsl r1, r0, #26
269; NEON8-NEXT:    mov r2, #3
270; NEON8-NEXT:    and r1, r2, r1, asr #31
271; NEON8-NEXT:    add r1, r0, r1
272; NEON8-NEXT:    and r1, r1, #60
273; NEON8-NEXT:    sub r0, r0, r1
274; NEON8-NEXT:    ands r0, r0, #63
275; NEON8-NEXT:    movwne r0, #1
276; NEON8-NEXT:    bx lr
277  %srem = srem i6 %X, 4
278  %cmp = icmp ne i6 %srem, 0
279  ret i1 %cmp
280}
281
282define <3 x i1> @test_srem_vec(<3 x i33> %X) nounwind {
283; ARM5-LABEL: test_srem_vec:
284; ARM5:       @ %bb.0:
285; ARM5-NEXT:    push {r4, r5, r6, lr}
286; ARM5-NEXT:    and r1, r1, #1
287; ARM5-NEXT:    mov r5, r3
288; ARM5-NEXT:    rsb r1, r1, #0
289; ARM5-NEXT:    mov r6, r2
290; ARM5-NEXT:    mov r2, #9
291; ARM5-NEXT:    mov r3, #0
292; ARM5-NEXT:    bl __moddi3
293; ARM5-NEXT:    eor r0, r0, #3
294; ARM5-NEXT:    mov r2, #9
295; ARM5-NEXT:    orrs r4, r0, r1
296; ARM5-NEXT:    and r0, r5, #1
297; ARM5-NEXT:    rsb r1, r0, #0
298; ARM5-NEXT:    mov r0, r6
299; ARM5-NEXT:    mov r3, #0
300; ARM5-NEXT:    movne r4, #1
301; ARM5-NEXT:    bl __moddi3
302; ARM5-NEXT:    mov r2, #1
303; ARM5-NEXT:    bic r1, r2, r1
304; ARM5-NEXT:    mvn r2, #2
305; ARM5-NEXT:    eor r0, r0, r2
306; ARM5-NEXT:    orrs r5, r0, r1
307; ARM5-NEXT:    ldr r0, [sp, #20]
308; ARM5-NEXT:    mvn r2, #8
309; ARM5-NEXT:    mvn r3, #0
310; ARM5-NEXT:    and r0, r0, #1
311; ARM5-NEXT:    movne r5, #1
312; ARM5-NEXT:    rsb r1, r0, #0
313; ARM5-NEXT:    ldr r0, [sp, #16]
314; ARM5-NEXT:    bl __moddi3
315; ARM5-NEXT:    eor r0, r0, #3
316; ARM5-NEXT:    orrs r2, r0, r1
317; ARM5-NEXT:    mov r0, r4
318; ARM5-NEXT:    movne r2, #1
319; ARM5-NEXT:    mov r1, r5
320; ARM5-NEXT:    pop {r4, r5, r6, pc}
321;
322; ARM6-LABEL: test_srem_vec:
323; ARM6:       @ %bb.0:
324; ARM6-NEXT:    push {r4, r5, r6, lr}
325; ARM6-NEXT:    and r1, r1, #1
326; ARM6-NEXT:    mov r5, r3
327; ARM6-NEXT:    rsb r1, r1, #0
328; ARM6-NEXT:    mov r6, r2
329; ARM6-NEXT:    mov r2, #9
330; ARM6-NEXT:    mov r3, #0
331; ARM6-NEXT:    bl __moddi3
332; ARM6-NEXT:    eor r0, r0, #3
333; ARM6-NEXT:    mov r2, #9
334; ARM6-NEXT:    orrs r4, r0, r1
335; ARM6-NEXT:    and r0, r5, #1
336; ARM6-NEXT:    rsb r1, r0, #0
337; ARM6-NEXT:    mov r0, r6
338; ARM6-NEXT:    mov r3, #0
339; ARM6-NEXT:    movne r4, #1
340; ARM6-NEXT:    bl __moddi3
341; ARM6-NEXT:    mov r2, #1
342; ARM6-NEXT:    bic r1, r2, r1
343; ARM6-NEXT:    mvn r2, #2
344; ARM6-NEXT:    eor r0, r0, r2
345; ARM6-NEXT:    orrs r5, r0, r1
346; ARM6-NEXT:    ldr r0, [sp, #20]
347; ARM6-NEXT:    mvn r2, #8
348; ARM6-NEXT:    mvn r3, #0
349; ARM6-NEXT:    and r0, r0, #1
350; ARM6-NEXT:    movne r5, #1
351; ARM6-NEXT:    rsb r1, r0, #0
352; ARM6-NEXT:    ldr r0, [sp, #16]
353; ARM6-NEXT:    bl __moddi3
354; ARM6-NEXT:    eor r0, r0, #3
355; ARM6-NEXT:    orrs r2, r0, r1
356; ARM6-NEXT:    mov r0, r4
357; ARM6-NEXT:    movne r2, #1
358; ARM6-NEXT:    mov r1, r5
359; ARM6-NEXT:    pop {r4, r5, r6, pc}
360;
361; ARM7-LABEL: test_srem_vec:
362; ARM7:       @ %bb.0:
363; ARM7-NEXT:    push {r4, r5, r6, r7, r11, lr}
364; ARM7-NEXT:    vpush {d8, d9}
365; ARM7-NEXT:    mov r6, r0
366; ARM7-NEXT:    and r0, r3, #1
367; ARM7-NEXT:    mov r5, r1
368; ARM7-NEXT:    rsb r1, r0, #0
369; ARM7-NEXT:    mov r0, r2
370; ARM7-NEXT:    mov r2, #9
371; ARM7-NEXT:    mov r3, #0
372; ARM7-NEXT:    bl __moddi3
373; ARM7-NEXT:    mov r7, r0
374; ARM7-NEXT:    and r0, r5, #1
375; ARM7-NEXT:    mov r4, r1
376; ARM7-NEXT:    rsb r1, r0, #0
377; ARM7-NEXT:    mov r0, r6
378; ARM7-NEXT:    mov r2, #9
379; ARM7-NEXT:    mov r3, #0
380; ARM7-NEXT:    bl __moddi3
381; ARM7-NEXT:    vmov.32 d8[0], r0
382; ARM7-NEXT:    ldr r0, [sp, #44]
383; ARM7-NEXT:    ldr r2, [sp, #40]
384; ARM7-NEXT:    mov r5, r1
385; ARM7-NEXT:    and r0, r0, #1
386; ARM7-NEXT:    mvn r3, #0
387; ARM7-NEXT:    rsb r1, r0, #0
388; ARM7-NEXT:    vmov.32 d9[0], r7
389; ARM7-NEXT:    mov r0, r2
390; ARM7-NEXT:    mvn r2, #8
391; ARM7-NEXT:    bl __moddi3
392; ARM7-NEXT:    vmov.32 d16[0], r0
393; ARM7-NEXT:    adr r0, .LCPI3_0
394; ARM7-NEXT:    vmov.32 d9[1], r4
395; ARM7-NEXT:    vld1.64 {d18, d19}, [r0:128]
396; ARM7-NEXT:    adr r0, .LCPI3_1
397; ARM7-NEXT:    vmov.32 d16[1], r1
398; ARM7-NEXT:    vmov.32 d8[1], r5
399; ARM7-NEXT:    vand q8, q8, q9
400; ARM7-NEXT:    vld1.64 {d20, d21}, [r0:128]
401; ARM7-NEXT:    adr r0, .LCPI3_2
402; ARM7-NEXT:    vand q11, q4, q9
403; ARM7-NEXT:    vld1.64 {d18, d19}, [r0:128]
404; ARM7-NEXT:    vceq.i32 q10, q11, q10
405; ARM7-NEXT:    vceq.i32 q8, q8, q9
406; ARM7-NEXT:    vrev64.32 q9, q10
407; ARM7-NEXT:    vrev64.32 q11, q8
408; ARM7-NEXT:    vand q9, q10, q9
409; ARM7-NEXT:    vand q8, q8, q11
410; ARM7-NEXT:    vmvn q9, q9
411; ARM7-NEXT:    vmvn q8, q8
412; ARM7-NEXT:    vmovn.i64 d18, q9
413; ARM7-NEXT:    vmovn.i64 d16, q8
414; ARM7-NEXT:    vmov.32 r0, d18[0]
415; ARM7-NEXT:    vmov.32 r1, d18[1]
416; ARM7-NEXT:    vmov.32 r2, d16[0]
417; ARM7-NEXT:    vpop {d8, d9}
418; ARM7-NEXT:    pop {r4, r5, r6, r7, r11, pc}
419; ARM7-NEXT:    .p2align 4
420; ARM7-NEXT:  @ %bb.1:
421; ARM7-NEXT:  .LCPI3_0:
422; ARM7-NEXT:    .long 4294967295 @ 0xffffffff
423; ARM7-NEXT:    .long 1 @ 0x1
424; ARM7-NEXT:    .long 4294967295 @ 0xffffffff
425; ARM7-NEXT:    .long 1 @ 0x1
426; ARM7-NEXT:  .LCPI3_1:
427; ARM7-NEXT:    .long 3 @ 0x3
428; ARM7-NEXT:    .long 0 @ 0x0
429; ARM7-NEXT:    .long 4294967293 @ 0xfffffffd
430; ARM7-NEXT:    .long 1 @ 0x1
431; ARM7-NEXT:  .LCPI3_2:
432; ARM7-NEXT:    .long 3 @ 0x3
433; ARM7-NEXT:    .long 0 @ 0x0
434; ARM7-NEXT:    .long 0 @ 0x0
435; ARM7-NEXT:    .long 0 @ 0x0
436;
437; ARM8-LABEL: test_srem_vec:
438; ARM8:       @ %bb.0:
439; ARM8-NEXT:    push {r4, r5, r6, r7, r11, lr}
440; ARM8-NEXT:    vpush {d8, d9}
441; ARM8-NEXT:    mov r6, r0
442; ARM8-NEXT:    and r0, r3, #1
443; ARM8-NEXT:    mov r5, r1
444; ARM8-NEXT:    rsb r1, r0, #0
445; ARM8-NEXT:    mov r0, r2
446; ARM8-NEXT:    mov r2, #9
447; ARM8-NEXT:    mov r3, #0
448; ARM8-NEXT:    bl __moddi3
449; ARM8-NEXT:    mov r7, r0
450; ARM8-NEXT:    and r0, r5, #1
451; ARM8-NEXT:    mov r4, r1
452; ARM8-NEXT:    rsb r1, r0, #0
453; ARM8-NEXT:    mov r0, r6
454; ARM8-NEXT:    mov r2, #9
455; ARM8-NEXT:    mov r3, #0
456; ARM8-NEXT:    bl __moddi3
457; ARM8-NEXT:    vmov.32 d8[0], r0
458; ARM8-NEXT:    ldr r0, [sp, #44]
459; ARM8-NEXT:    ldr r2, [sp, #40]
460; ARM8-NEXT:    mov r5, r1
461; ARM8-NEXT:    and r0, r0, #1
462; ARM8-NEXT:    mvn r3, #0
463; ARM8-NEXT:    rsb r1, r0, #0
464; ARM8-NEXT:    vmov.32 d9[0], r7
465; ARM8-NEXT:    mov r0, r2
466; ARM8-NEXT:    mvn r2, #8
467; ARM8-NEXT:    bl __moddi3
468; ARM8-NEXT:    vmov.32 d16[0], r0
469; ARM8-NEXT:    adr r0, .LCPI3_0
470; ARM8-NEXT:    vmov.32 d9[1], r4
471; ARM8-NEXT:    vld1.64 {d18, d19}, [r0:128]
472; ARM8-NEXT:    adr r0, .LCPI3_1
473; ARM8-NEXT:    vmov.32 d16[1], r1
474; ARM8-NEXT:    vmov.32 d8[1], r5
475; ARM8-NEXT:    vand q8, q8, q9
476; ARM8-NEXT:    vld1.64 {d20, d21}, [r0:128]
477; ARM8-NEXT:    adr r0, .LCPI3_2
478; ARM8-NEXT:    vand q11, q4, q9
479; ARM8-NEXT:    vld1.64 {d18, d19}, [r0:128]
480; ARM8-NEXT:    vceq.i32 q10, q11, q10
481; ARM8-NEXT:    vceq.i32 q8, q8, q9
482; ARM8-NEXT:    vrev64.32 q9, q10
483; ARM8-NEXT:    vrev64.32 q11, q8
484; ARM8-NEXT:    vand q9, q10, q9
485; ARM8-NEXT:    vand q8, q8, q11
486; ARM8-NEXT:    vmvn q9, q9
487; ARM8-NEXT:    vmvn q8, q8
488; ARM8-NEXT:    vmovn.i64 d18, q9
489; ARM8-NEXT:    vmovn.i64 d16, q8
490; ARM8-NEXT:    vmov.32 r0, d18[0]
491; ARM8-NEXT:    vmov.32 r1, d18[1]
492; ARM8-NEXT:    vmov.32 r2, d16[0]
493; ARM8-NEXT:    vpop {d8, d9}
494; ARM8-NEXT:    pop {r4, r5, r6, r7, r11, pc}
495; ARM8-NEXT:    .p2align 4
496; ARM8-NEXT:  @ %bb.1:
497; ARM8-NEXT:  .LCPI3_0:
498; ARM8-NEXT:    .long 4294967295 @ 0xffffffff
499; ARM8-NEXT:    .long 1 @ 0x1
500; ARM8-NEXT:    .long 4294967295 @ 0xffffffff
501; ARM8-NEXT:    .long 1 @ 0x1
502; ARM8-NEXT:  .LCPI3_1:
503; ARM8-NEXT:    .long 3 @ 0x3
504; ARM8-NEXT:    .long 0 @ 0x0
505; ARM8-NEXT:    .long 4294967293 @ 0xfffffffd
506; ARM8-NEXT:    .long 1 @ 0x1
507; ARM8-NEXT:  .LCPI3_2:
508; ARM8-NEXT:    .long 3 @ 0x3
509; ARM8-NEXT:    .long 0 @ 0x0
510; ARM8-NEXT:    .long 0 @ 0x0
511; ARM8-NEXT:    .long 0 @ 0x0
512;
513; NEON7-LABEL: test_srem_vec:
514; NEON7:       @ %bb.0:
515; NEON7-NEXT:    push {r4, r5, r6, r7, r11, lr}
516; NEON7-NEXT:    vpush {d8, d9}
517; NEON7-NEXT:    mov r6, r0
518; NEON7-NEXT:    and r0, r3, #1
519; NEON7-NEXT:    mov r5, r1
520; NEON7-NEXT:    rsb r1, r0, #0
521; NEON7-NEXT:    mov r0, r2
522; NEON7-NEXT:    mov r2, #9
523; NEON7-NEXT:    mov r3, #0
524; NEON7-NEXT:    bl __moddi3
525; NEON7-NEXT:    mov r7, r0
526; NEON7-NEXT:    and r0, r5, #1
527; NEON7-NEXT:    mov r4, r1
528; NEON7-NEXT:    rsb r1, r0, #0
529; NEON7-NEXT:    mov r0, r6
530; NEON7-NEXT:    mov r2, #9
531; NEON7-NEXT:    mov r3, #0
532; NEON7-NEXT:    bl __moddi3
533; NEON7-NEXT:    vmov.32 d8[0], r0
534; NEON7-NEXT:    ldr r0, [sp, #44]
535; NEON7-NEXT:    ldr r2, [sp, #40]
536; NEON7-NEXT:    mov r5, r1
537; NEON7-NEXT:    and r0, r0, #1
538; NEON7-NEXT:    mvn r3, #0
539; NEON7-NEXT:    rsb r1, r0, #0
540; NEON7-NEXT:    vmov.32 d9[0], r7
541; NEON7-NEXT:    mov r0, r2
542; NEON7-NEXT:    mvn r2, #8
543; NEON7-NEXT:    bl __moddi3
544; NEON7-NEXT:    vmov.32 d16[0], r0
545; NEON7-NEXT:    adr r0, .LCPI3_0
546; NEON7-NEXT:    vmov.32 d9[1], r4
547; NEON7-NEXT:    vld1.64 {d18, d19}, [r0:128]
548; NEON7-NEXT:    adr r0, .LCPI3_1
549; NEON7-NEXT:    vmov.32 d16[1], r1
550; NEON7-NEXT:    vmov.32 d8[1], r5
551; NEON7-NEXT:    vand q8, q8, q9
552; NEON7-NEXT:    vld1.64 {d20, d21}, [r0:128]
553; NEON7-NEXT:    adr r0, .LCPI3_2
554; NEON7-NEXT:    vand q11, q4, q9
555; NEON7-NEXT:    vld1.64 {d18, d19}, [r0:128]
556; NEON7-NEXT:    vceq.i32 q10, q11, q10
557; NEON7-NEXT:    vceq.i32 q8, q8, q9
558; NEON7-NEXT:    vrev64.32 q9, q10
559; NEON7-NEXT:    vrev64.32 q11, q8
560; NEON7-NEXT:    vand q9, q10, q9
561; NEON7-NEXT:    vand q8, q8, q11
562; NEON7-NEXT:    vmvn q9, q9
563; NEON7-NEXT:    vmvn q8, q8
564; NEON7-NEXT:    vmovn.i64 d18, q9
565; NEON7-NEXT:    vmovn.i64 d16, q8
566; NEON7-NEXT:    vmov.32 r0, d18[0]
567; NEON7-NEXT:    vmov.32 r1, d18[1]
568; NEON7-NEXT:    vmov.32 r2, d16[0]
569; NEON7-NEXT:    vpop {d8, d9}
570; NEON7-NEXT:    pop {r4, r5, r6, r7, r11, pc}
571; NEON7-NEXT:    .p2align 4
572; NEON7-NEXT:  @ %bb.1:
573; NEON7-NEXT:  .LCPI3_0:
574; NEON7-NEXT:    .long 4294967295 @ 0xffffffff
575; NEON7-NEXT:    .long 1 @ 0x1
576; NEON7-NEXT:    .long 4294967295 @ 0xffffffff
577; NEON7-NEXT:    .long 1 @ 0x1
578; NEON7-NEXT:  .LCPI3_1:
579; NEON7-NEXT:    .long 3 @ 0x3
580; NEON7-NEXT:    .long 0 @ 0x0
581; NEON7-NEXT:    .long 4294967293 @ 0xfffffffd
582; NEON7-NEXT:    .long 1 @ 0x1
583; NEON7-NEXT:  .LCPI3_2:
584; NEON7-NEXT:    .long 3 @ 0x3
585; NEON7-NEXT:    .long 0 @ 0x0
586; NEON7-NEXT:    .long 0 @ 0x0
587; NEON7-NEXT:    .long 0 @ 0x0
588;
589; NEON8-LABEL: test_srem_vec:
590; NEON8:       @ %bb.0:
591; NEON8-NEXT:    push {r4, r5, r6, r7, r11, lr}
592; NEON8-NEXT:    vpush {d8, d9}
593; NEON8-NEXT:    mov r6, r0
594; NEON8-NEXT:    and r0, r3, #1
595; NEON8-NEXT:    mov r5, r1
596; NEON8-NEXT:    rsb r1, r0, #0
597; NEON8-NEXT:    mov r0, r2
598; NEON8-NEXT:    mov r2, #9
599; NEON8-NEXT:    mov r3, #0
600; NEON8-NEXT:    bl __moddi3
601; NEON8-NEXT:    mov r7, r0
602; NEON8-NEXT:    and r0, r5, #1
603; NEON8-NEXT:    mov r4, r1
604; NEON8-NEXT:    rsb r1, r0, #0
605; NEON8-NEXT:    mov r0, r6
606; NEON8-NEXT:    mov r2, #9
607; NEON8-NEXT:    mov r3, #0
608; NEON8-NEXT:    bl __moddi3
609; NEON8-NEXT:    vmov.32 d8[0], r0
610; NEON8-NEXT:    ldr r0, [sp, #44]
611; NEON8-NEXT:    ldr r2, [sp, #40]
612; NEON8-NEXT:    mov r5, r1
613; NEON8-NEXT:    and r0, r0, #1
614; NEON8-NEXT:    mvn r3, #0
615; NEON8-NEXT:    rsb r1, r0, #0
616; NEON8-NEXT:    vmov.32 d9[0], r7
617; NEON8-NEXT:    mov r0, r2
618; NEON8-NEXT:    mvn r2, #8
619; NEON8-NEXT:    bl __moddi3
620; NEON8-NEXT:    vmov.32 d16[0], r0
621; NEON8-NEXT:    adr r0, .LCPI3_0
622; NEON8-NEXT:    vmov.32 d9[1], r4
623; NEON8-NEXT:    vld1.64 {d18, d19}, [r0:128]
624; NEON8-NEXT:    adr r0, .LCPI3_1
625; NEON8-NEXT:    vmov.32 d16[1], r1
626; NEON8-NEXT:    vmov.32 d8[1], r5
627; NEON8-NEXT:    vand q8, q8, q9
628; NEON8-NEXT:    vld1.64 {d20, d21}, [r0:128]
629; NEON8-NEXT:    adr r0, .LCPI3_2
630; NEON8-NEXT:    vand q11, q4, q9
631; NEON8-NEXT:    vld1.64 {d18, d19}, [r0:128]
632; NEON8-NEXT:    vceq.i32 q10, q11, q10
633; NEON8-NEXT:    vceq.i32 q8, q8, q9
634; NEON8-NEXT:    vrev64.32 q9, q10
635; NEON8-NEXT:    vrev64.32 q11, q8
636; NEON8-NEXT:    vand q9, q10, q9
637; NEON8-NEXT:    vand q8, q8, q11
638; NEON8-NEXT:    vmvn q9, q9
639; NEON8-NEXT:    vmvn q8, q8
640; NEON8-NEXT:    vmovn.i64 d18, q9
641; NEON8-NEXT:    vmovn.i64 d16, q8
642; NEON8-NEXT:    vmov.32 r0, d18[0]
643; NEON8-NEXT:    vmov.32 r1, d18[1]
644; NEON8-NEXT:    vmov.32 r2, d16[0]
645; NEON8-NEXT:    vpop {d8, d9}
646; NEON8-NEXT:    pop {r4, r5, r6, r7, r11, pc}
647; NEON8-NEXT:    .p2align 4
648; NEON8-NEXT:  @ %bb.1:
649; NEON8-NEXT:  .LCPI3_0:
650; NEON8-NEXT:    .long 4294967295 @ 0xffffffff
651; NEON8-NEXT:    .long 1 @ 0x1
652; NEON8-NEXT:    .long 4294967295 @ 0xffffffff
653; NEON8-NEXT:    .long 1 @ 0x1
654; NEON8-NEXT:  .LCPI3_1:
655; NEON8-NEXT:    .long 3 @ 0x3
656; NEON8-NEXT:    .long 0 @ 0x0
657; NEON8-NEXT:    .long 4294967293 @ 0xfffffffd
658; NEON8-NEXT:    .long 1 @ 0x1
659; NEON8-NEXT:  .LCPI3_2:
660; NEON8-NEXT:    .long 3 @ 0x3
661; NEON8-NEXT:    .long 0 @ 0x0
662; NEON8-NEXT:    .long 0 @ 0x0
663; NEON8-NEXT:    .long 0 @ 0x0
664  %srem = srem <3 x i33> %X, <i33 9, i33 9, i33 -9>
665  %cmp = icmp ne <3 x i33> %srem, <i33 3, i33 -3, i33 3>
666  ret <3 x i1> %cmp
667}
668