xref: /llvm-project/llvm/test/CodeGen/ARM/shifter_operand.ll (revision eecb99c5f66c8491766628a2925587e20f3b1dbd)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; RUN: llc < %s -mtriple=armv7-none-eabi -mcpu=cortex-a8 | FileCheck %s -check-prefix=CHECK-ARM
3; RUN: llc < %s -mtriple=armv7-none-eabi -mcpu=cortex-a9 | FileCheck %s -check-prefix=CHECK-ARM
4; RUN: llc < %s -mtriple=thumbv7m-none-eabi | FileCheck %s -check-prefix=CHECK-THUMB
5; rdar://8576755
6
7
8define i32 @test1(i32 %X, i32 %Y, i8 %sh) {
9; CHECK-ARM-LABEL: test1:
10; CHECK-ARM:       @ %bb.0:
11; CHECK-ARM-NEXT:    uxtb r2, r2
12; CHECK-ARM-NEXT:    add r0, r0, r1, lsl r2
13; CHECK-ARM-NEXT:    bx lr
14;
15; CHECK-THUMB-LABEL: test1:
16; CHECK-THUMB:       @ %bb.0:
17; CHECK-THUMB-NEXT:    uxtb r2, r2
18; CHECK-THUMB-NEXT:    lsls r1, r2
19; CHECK-THUMB-NEXT:    add r0, r1
20; CHECK-THUMB-NEXT:    bx lr
21        %shift.upgrd.1 = zext i8 %sh to i32
22        %A = shl i32 %Y, %shift.upgrd.1
23        %B = add i32 %X, %A
24        ret i32 %B
25}
26
27define i32 @test2(i32 %X, i32 %Y, i8 %sh) {
28; CHECK-ARM-LABEL: test2:
29; CHECK-ARM:       @ %bb.0:
30; CHECK-ARM-NEXT:    uxtb r2, r2
31; CHECK-ARM-NEXT:    bic r0, r0, r1, asr r2
32; CHECK-ARM-NEXT:    bx lr
33;
34; CHECK-THUMB-LABEL: test2:
35; CHECK-THUMB:       @ %bb.0:
36; CHECK-THUMB-NEXT:    uxtb r2, r2
37; CHECK-THUMB-NEXT:    asrs r1, r2
38; CHECK-THUMB-NEXT:    bics r0, r1
39; CHECK-THUMB-NEXT:    bx lr
40        %shift.upgrd.2 = zext i8 %sh to i32
41        %A = ashr i32 %Y, %shift.upgrd.2
42        %B = xor i32 %A, -1
43        %C = and i32 %X, %B
44        ret i32 %C
45}
46
47define i32 @test3(i32 %base, i32 %base2, i32 %offset) {
48; CHECK-ARM-LABEL: test3:
49; CHECK-ARM:       @ %bb.0: @ %entry
50; CHECK-ARM-NEXT:    ldr r0, [r0, r2, lsl #2]
51; CHECK-ARM-NEXT:    ldr r1, [r1, r2, lsl #2]
52; CHECK-ARM-NEXT:    add r0, r1, r0
53; CHECK-ARM-NEXT:    bx lr
54;
55; CHECK-THUMB-LABEL: test3:
56; CHECK-THUMB:       @ %bb.0: @ %entry
57; CHECK-THUMB-NEXT:    ldr.w r0, [r0, r2, lsl #2]
58; CHECK-THUMB-NEXT:    ldr.w r1, [r1, r2, lsl #2]
59; CHECK-THUMB-NEXT:    add r0, r1
60; CHECK-THUMB-NEXT:    bx lr
61entry:
62        %tmp1 = shl i32 %offset, 2
63        %tmp2 = add i32 %base, %tmp1
64        %tmp3 = inttoptr i32 %tmp2 to ptr
65        %tmp4 = add i32 %base2, %tmp1
66        %tmp5 = inttoptr i32 %tmp4 to ptr
67        %tmp6 = load i32, ptr %tmp3
68        %tmp7 = load i32, ptr %tmp5
69        %tmp8 = add i32 %tmp7, %tmp6
70        ret i32 %tmp8
71}
72
73declare ptr @malloc(...)
74
75define fastcc void @test4(i16 %addr) nounwind {
76; CHECK-ARM-LABEL: test4:
77; CHECK-ARM:       @ %bb.0: @ %entry
78; CHECK-ARM-NEXT:    .save {r4, lr}
79; CHECK-ARM-NEXT:    push {r4, lr}
80; CHECK-ARM-NEXT:    mov r4, r0
81; CHECK-ARM-NEXT:    bl malloc
82; CHECK-ARM-NEXT:    sxth r1, r4
83; CHECK-ARM-NEXT:    ldr r2, [r0, r1, lsl #2]
84; CHECK-ARM-NEXT:    add r2, r2, #1
85; CHECK-ARM-NEXT:    str r2, [r0, r1, lsl #2]
86; CHECK-ARM-NEXT:    pop {r4, pc}
87;
88; CHECK-THUMB-LABEL: test4:
89; CHECK-THUMB:       @ %bb.0: @ %entry
90; CHECK-THUMB-NEXT:    .save {r4, lr}
91; CHECK-THUMB-NEXT:    push {r4, lr}
92; CHECK-THUMB-NEXT:    mov r4, r0
93; CHECK-THUMB-NEXT:    bl malloc
94; CHECK-THUMB-NEXT:    sxth r1, r4
95; CHECK-THUMB-NEXT:    ldr.w r2, [r0, r1, lsl #2]
96; CHECK-THUMB-NEXT:    adds r2, #1
97; CHECK-THUMB-NEXT:    str.w r2, [r0, r1, lsl #2]
98; CHECK-THUMB-NEXT:    pop {r4, pc}
99entry:
100  %0 = tail call ptr (...) @malloc(i32 undef) nounwind
101  %1 = sext i16 %addr to i32
102  %2 = getelementptr inbounds i32, ptr %0, i32 %1
103  %3 = load i32, ptr %2, align 4
104  %4 = add nsw i32 %3, 1
105  store i32 %4, ptr %2, align 4
106  ret void
107}
108
109define i32 @test_orr_extract_from_mul_1(i32 %x, i32 %y) {
110; CHECK-ARM-LABEL: test_orr_extract_from_mul_1:
111; CHECK-ARM:       @ %bb.0: @ %entry
112; CHECK-ARM-NEXT:    movw r2, #63767
113; CHECK-ARM-NEXT:    mul r1, r1, r2
114; CHECK-ARM-NEXT:    orr r0, r1, r0
115; CHECK-ARM-NEXT:    bx lr
116;
117; CHECK-THUMB-LABEL: test_orr_extract_from_mul_1:
118; CHECK-THUMB:       @ %bb.0: @ %entry
119; CHECK-THUMB-NEXT:    movw r2, #63767
120; CHECK-THUMB-NEXT:    muls r1, r2, r1
121; CHECK-THUMB-NEXT:    orrs r0, r1
122; CHECK-THUMB-NEXT:    bx lr
123entry:
124; CHECk-THUMB: orrs r0, r1
125  %mul = mul i32 %y, 63767
126  %or = or i32 %mul, %x
127  ret i32 %or
128}
129
130define i32 @test_orr_extract_from_mul_2(i32 %x, i32 %y) {
131; CHECK-ARM-LABEL: test_orr_extract_from_mul_2:
132; CHECK-ARM:       @ %bb.0: @ %entry
133; CHECK-ARM-NEXT:    movw r2, #63767
134; CHECK-ARM-NEXT:    mul r1, r1, r2
135; CHECK-ARM-NEXT:    orr r0, r0, r1, lsl #1
136; CHECK-ARM-NEXT:    bx lr
137;
138; CHECK-THUMB-LABEL: test_orr_extract_from_mul_2:
139; CHECK-THUMB:       @ %bb.0: @ %entry
140; CHECK-THUMB-NEXT:    movw r2, #63767
141; CHECK-THUMB-NEXT:    muls r1, r2, r1
142; CHECK-THUMB-NEXT:    orr.w r0, r0, r1, lsl #1
143; CHECK-THUMB-NEXT:    bx lr
144entry:
145  %mul1 = mul i32 %y, 127534
146  %or = or i32 %mul1, %x
147  ret i32 %or
148}
149
150define i32 @test_orr_extract_from_mul_3(i32 %x, i32 %y) {
151; CHECK-ARM-LABEL: test_orr_extract_from_mul_3:
152; CHECK-ARM:       @ %bb.0: @ %entry
153; CHECK-ARM-NEXT:    movw r2, #63767
154; CHECK-ARM-NEXT:    mul r1, r1, r2
155; CHECK-ARM-NEXT:    orr r0, r0, r1, lsl #2
156; CHECK-ARM-NEXT:    bx lr
157;
158; CHECK-THUMB-LABEL: test_orr_extract_from_mul_3:
159; CHECK-THUMB:       @ %bb.0: @ %entry
160; CHECK-THUMB-NEXT:    movw r2, #63767
161; CHECK-THUMB-NEXT:    muls r1, r2, r1
162; CHECK-THUMB-NEXT:    orr.w r0, r0, r1, lsl #2
163; CHECK-THUMB-NEXT:    bx lr
164entry:
165  %mul1 = mul i32 %y, 255068
166  %or = or i32 %mul1, %x
167  ret i32 %or
168}
169
170define i32 @test_orr_extract_from_mul_4(i32 %x, i32 %y) {
171; CHECK-ARM-LABEL: test_orr_extract_from_mul_4:
172; CHECK-ARM:       @ %bb.0: @ %entry
173; CHECK-ARM-NEXT:    movw r2, #63767
174; CHECK-ARM-NEXT:    mul r1, r1, r2
175; CHECK-ARM-NEXT:    orr r0, r0, r1, lsl #3
176; CHECK-ARM-NEXT:    bx lr
177;
178; CHECK-THUMB-LABEL: test_orr_extract_from_mul_4:
179; CHECK-THUMB:       @ %bb.0: @ %entry
180; CHECK-THUMB-NEXT:    movw r2, #63767
181; CHECK-THUMB-NEXT:    muls r1, r2, r1
182; CHECK-THUMB-NEXT:    orr.w r0, r0, r1, lsl #3
183; CHECK-THUMB-NEXT:    bx lr
184entry:
185  %mul1 = mul i32 %y, 510136
186  %or = or i32 %mul1, %x
187  ret i32 %or
188}
189
190define i32 @test_orr_extract_from_mul_5(i32 %x, i32 %y) {
191; CHECK-ARM-LABEL: test_orr_extract_from_mul_5:
192; CHECK-ARM:       @ %bb.0: @ %entry
193; CHECK-ARM-NEXT:    movw r2, #63767
194; CHECK-ARM-NEXT:    mul r1, r1, r2
195; CHECK-ARM-NEXT:    orr r0, r0, r1, lsl #4
196; CHECK-ARM-NEXT:    bx lr
197;
198; CHECK-THUMB-LABEL: test_orr_extract_from_mul_5:
199; CHECK-THUMB:       @ %bb.0: @ %entry
200; CHECK-THUMB-NEXT:    movw r2, #63767
201; CHECK-THUMB-NEXT:    muls r1, r2, r1
202; CHECK-THUMB-NEXT:    orr.w r0, r0, r1, lsl #4
203; CHECK-THUMB-NEXT:    bx lr
204entry:
205  %mul1 = mul i32 %y, 1020272
206  %or = or i32 %mul1, %x
207  ret i32 %or
208}
209
210define i32 @test_orr_extract_from_mul_6(i32 %x, i32 %y) {
211; CHECK-ARM-LABEL: test_orr_extract_from_mul_6:
212; CHECK-ARM:       @ %bb.0: @ %entry
213; CHECK-ARM-NEXT:    movw r2, #63767
214; CHECK-ARM-NEXT:    mul r1, r1, r2
215; CHECK-ARM-NEXT:    orr r0, r0, r1, lsl #16
216; CHECK-ARM-NEXT:    bx lr
217;
218; CHECK-THUMB-LABEL: test_orr_extract_from_mul_6:
219; CHECK-THUMB:       @ %bb.0: @ %entry
220; CHECK-THUMB-NEXT:    movw r2, #63767
221; CHECK-THUMB-NEXT:    muls r1, r2, r1
222; CHECK-THUMB-NEXT:    orr.w r0, r0, r1, lsl #16
223; CHECK-THUMB-NEXT:    bx lr
224entry:
225  %mul = mul i32 %y, -115933184
226  %or = or i32 %mul, %x
227  ret i32 %or
228}
229
230define i32 @test_load_extract_from_mul_1(ptr %x, i32 %y) {
231; CHECK-ARM-LABEL: test_load_extract_from_mul_1:
232; CHECK-ARM:       @ %bb.0: @ %entry
233; CHECK-ARM-NEXT:    movw r2, #63767
234; CHECK-ARM-NEXT:    mul r1, r1, r2
235; CHECK-ARM-NEXT:    ldrb r0, [r0, r1]
236; CHECK-ARM-NEXT:    bx lr
237;
238; CHECK-THUMB-LABEL: test_load_extract_from_mul_1:
239; CHECK-THUMB:       @ %bb.0: @ %entry
240; CHECK-THUMB-NEXT:    movw r2, #63767
241; CHECK-THUMB-NEXT:    muls r1, r2, r1
242; CHECK-THUMB-NEXT:    ldrb r0, [r0, r1]
243; CHECK-THUMB-NEXT:    bx lr
244entry:
245  %mul = mul i32 %y, 63767
246  %arrayidx = getelementptr inbounds i8, ptr %x, i32 %mul
247  %0 = load i8, ptr %arrayidx, align 1
248  %conv = zext i8 %0 to i32
249  ret i32 %conv
250}
251
252define i32 @test_load_extract_from_mul_2(ptr %x, i32 %y) {
253; CHECK-ARM-LABEL: test_load_extract_from_mul_2:
254; CHECK-ARM:       @ %bb.0: @ %entry
255; CHECK-ARM-NEXT:    movw r2, #63767
256; CHECK-ARM-NEXT:    mul r1, r1, r2
257; CHECK-ARM-NEXT:    ldrb r0, [r0, r1, lsl #1]
258; CHECK-ARM-NEXT:    bx lr
259;
260; CHECK-THUMB-LABEL: test_load_extract_from_mul_2:
261; CHECK-THUMB:       @ %bb.0: @ %entry
262; CHECK-THUMB-NEXT:    movw r2, #63767
263; CHECK-THUMB-NEXT:    muls r1, r2, r1
264; CHECK-THUMB-NEXT:    ldrb.w r0, [r0, r1, lsl #1]
265; CHECK-THUMB-NEXT:    bx lr
266entry:
267  %mul1 = mul i32 %y, 127534
268  %arrayidx = getelementptr inbounds i8, ptr %x, i32 %mul1
269  %0 = load i8, ptr %arrayidx, align 1
270  %conv = zext i8 %0 to i32
271  ret i32 %conv
272}
273
274define i32 @test_load_extract_from_mul_3(ptr %x, i32 %y) {
275; CHECK-ARM-LABEL: test_load_extract_from_mul_3:
276; CHECK-ARM:       @ %bb.0: @ %entry
277; CHECK-ARM-NEXT:    movw r2, #63767
278; CHECK-ARM-NEXT:    mul r1, r1, r2
279; CHECK-ARM-NEXT:    ldrb r0, [r0, r1, lsl #2]
280; CHECK-ARM-NEXT:    bx lr
281;
282; CHECK-THUMB-LABEL: test_load_extract_from_mul_3:
283; CHECK-THUMB:       @ %bb.0: @ %entry
284; CHECK-THUMB-NEXT:    movw r2, #63767
285; CHECK-THUMB-NEXT:    muls r1, r2, r1
286; CHECK-THUMB-NEXT:    ldrb.w r0, [r0, r1, lsl #2]
287; CHECK-THUMB-NEXT:    bx lr
288entry:
289  %mul1 = mul i32 %y, 255068
290  %arrayidx = getelementptr inbounds i8, ptr %x, i32 %mul1
291  %0 = load i8, ptr %arrayidx, align 1
292  %conv = zext i8 %0 to i32
293  ret i32 %conv
294}
295
296define i32 @test_load_extract_from_mul_4(ptr %x, i32 %y) {
297; CHECK-ARM-LABEL: test_load_extract_from_mul_4:
298; CHECK-ARM:       @ %bb.0: @ %entry
299; CHECK-ARM-NEXT:    movw r2, #63767
300; CHECK-ARM-NEXT:    mul r1, r1, r2
301; CHECK-ARM-NEXT:    ldrb r0, [r0, r1, lsl #3]
302; CHECK-ARM-NEXT:    bx lr
303;
304; CHECK-THUMB-LABEL: test_load_extract_from_mul_4:
305; CHECK-THUMB:       @ %bb.0: @ %entry
306; CHECK-THUMB-NEXT:    movw r2, #63767
307; CHECK-THUMB-NEXT:    muls r1, r2, r1
308; CHECK-THUMB-NEXT:    ldrb.w r0, [r0, r1, lsl #3]
309; CHECK-THUMB-NEXT:    bx lr
310entry:
311  %mul1 = mul i32 %y, 510136
312  %arrayidx = getelementptr inbounds i8, ptr %x, i32 %mul1
313  %0 = load i8, ptr %arrayidx, align 1
314  %conv = zext i8 %0 to i32
315  ret i32 %conv
316}
317
318define i32 @test_load_extract_from_mul_5(ptr %x, i32 %y) {
319; CHECK-ARM-LABEL: test_load_extract_from_mul_5:
320; CHECK-ARM:       @ %bb.0: @ %entry
321; CHECK-ARM-NEXT:    movw r2, #63767
322; CHECK-ARM-NEXT:    mul r1, r1, r2
323; CHECK-ARM-NEXT:    ldrb r0, [r0, r1, lsl #4]
324; CHECK-ARM-NEXT:    bx lr
325;
326; CHECK-THUMB-LABEL: test_load_extract_from_mul_5:
327; CHECK-THUMB:       @ %bb.0: @ %entry
328; CHECK-THUMB-NEXT:    movw r2, #37232
329; CHECK-THUMB-NEXT:    movt r2, #15
330; CHECK-THUMB-NEXT:    muls r1, r2, r1
331; CHECK-THUMB-NEXT:    ldrb r0, [r0, r1]
332; CHECK-THUMB-NEXT:    bx lr
333entry:
334  %mul1 = mul i32 %y, 1020272
335  %arrayidx = getelementptr inbounds i8, ptr %x, i32 %mul1
336  %0 = load i8, ptr %arrayidx, align 1
337  %conv = zext i8 %0 to i32
338  ret i32 %conv
339}
340
341define i32 @test_load_extract_from_mul_6(ptr %x, i32 %y) {
342; CHECK-ARM-LABEL: test_load_extract_from_mul_6:
343; CHECK-ARM:       @ %bb.0: @ %entry
344; CHECK-ARM-NEXT:    movw r2, #63767
345; CHECK-ARM-NEXT:    mul r1, r1, r2
346; CHECK-ARM-NEXT:    ldrb r0, [r0, r1, lsl #16]
347; CHECK-ARM-NEXT:    bx lr
348;
349; CHECK-THUMB-LABEL: test_load_extract_from_mul_6:
350; CHECK-THUMB:       @ %bb.0: @ %entry
351; CHECK-THUMB-NEXT:    movs r2, #0
352; CHECK-THUMB-NEXT:    movt r2, #63767
353; CHECK-THUMB-NEXT:    muls r1, r2, r1
354; CHECK-THUMB-NEXT:    ldrb r0, [r0, r1]
355; CHECK-THUMB-NEXT:    bx lr
356entry:
357  %mul = mul i32 %y, -115933184
358  %arrayidx = getelementptr inbounds i8, ptr %x, i32 %mul
359  %0 = load i8, ptr %arrayidx, align 1
360  %conv = zext i8 %0 to i32
361  ret i32 %conv
362}
363
364
365define void @test_well_formed_dag(i32 %in1, i32 %in2, ptr %addr) {
366; CHECK-ARM-LABEL: test_well_formed_dag:
367; CHECK-ARM:       @ %bb.0:
368; CHECK-ARM-NEXT:    movw r3, #675
369; CHECK-ARM-NEXT:    mul r0, r0, r3
370; CHECK-ARM-NEXT:    add r0, r1, r0, lsl #7
371; CHECK-ARM-NEXT:    str r0, [r2]
372; CHECK-ARM-NEXT:    bx lr
373;
374; CHECK-THUMB-LABEL: test_well_formed_dag:
375; CHECK-THUMB:       @ %bb.0:
376; CHECK-THUMB-NEXT:    movw r3, #675
377; CHECK-THUMB-NEXT:    muls r0, r3, r0
378; CHECK-THUMB-NEXT:    add.w r0, r1, r0, lsl #7
379; CHECK-THUMB-NEXT:    str r0, [r2]
380; CHECK-THUMB-NEXT:    bx lr
381
382  %mul.small = mul i32 %in1, 675
383  store i32 %mul.small, ptr %addr
384  %mul.big = mul i32 %in1, 86400
385  %add = add i32 %in2, %mul.big
386  store i32 %add, ptr %addr
387  ret void
388}
389
390define { i32, i32 } @test_multi_use_add(i32 %base, i32 %offset) {
391; CHECK-ARM-LABEL: test_multi_use_add:
392; CHECK-ARM:       @ %bb.0:
393; CHECK-ARM-NEXT:    movw r2, #28
394; CHECK-ARM-NEXT:    movt r2, #1
395; CHECK-ARM-NEXT:    mul r1, r1, r2
396; CHECK-ARM-NEXT:    ldr r1, [r0, r1]!
397; CHECK-ARM-NEXT:    bx lr
398;
399; CHECK-THUMB-LABEL: test_multi_use_add:
400; CHECK-THUMB:       @ %bb.0:
401; CHECK-THUMB-NEXT:    movs r3, #28
402; CHECK-THUMB-NEXT:    movt r3, #1
403; CHECK-THUMB-NEXT:    mla r2, r1, r3, r0
404; CHECK-THUMB-NEXT:    muls r1, r3, r1
405; CHECK-THUMB-NEXT:    ldr r1, [r0, r1]
406; CHECK-THUMB-NEXT:    mov r0, r2
407; CHECK-THUMB-NEXT:    bx lr
408
409  %prod = mul i32 %offset, 65564
410  %sum = add i32 %base, %prod
411
412  %ptr = inttoptr i32 %sum to ptr
413  %loaded = load i32, ptr %ptr
414
415  %ret.tmp = insertvalue { i32, i32 } undef, i32 %sum, 0
416  %ret = insertvalue { i32, i32 } %ret.tmp, i32 %loaded, 1
417
418  ret { i32, i32 } %ret
419}
420
421define i32 @test_new(i32 %x, i32 %y) {
422; CHECK-ARM-LABEL: test_new:
423; CHECK-ARM:       @ %bb.0: @ %entry
424; CHECK-ARM-NEXT:    movw r2, #48047
425; CHECK-ARM-NEXT:    mul r1, r1, r2
426; CHECK-ARM-NEXT:    add r0, r0, r1, lsl #1
427; CHECK-ARM-NEXT:    bx lr
428;
429; CHECK-THUMB-LABEL: test_new:
430; CHECK-THUMB:       @ %bb.0: @ %entry
431; CHECK-THUMB-NEXT:    movw r2, #48047
432; CHECK-THUMB-NEXT:    muls r1, r2, r1
433; CHECK-THUMB-NEXT:    add.w r0, r0, r1, lsl #1
434; CHECK-THUMB-NEXT:    bx lr
435entry:
436  %mul = mul i32 %y, 96094
437  %conv = add i32 %mul, %x
438  ret i32 %conv
439}
440
441; This test was hitting issues with deleted nodes because ComplexPatternFuncMutatesDAG
442; was not defined.
443@arr_9 = external dso_local local_unnamed_addr global [15 x [25 x [18 x i8]]], align 1
444define void @test_mutateddag(i32 %b, i32 %c, i32 %d, i1 %cc) {
445; CHECK-THUMB-LABEL: test_mutateddag:
446; CHECK-THUMB:       @ %bb.0: @ %entry
447; CHECK-THUMB-NEXT:    .save {r4, r5, r7, lr}
448; CHECK-THUMB-NEXT:    push {r4, r5, r7, lr}
449; CHECK-THUMB-NEXT:    movw r12, #50608
450; CHECK-THUMB-NEXT:    movw r4, #51512
451; CHECK-THUMB-NEXT:    movt r12, #17917
452; CHECK-THUMB-NEXT:    movt r4, #52
453; CHECK-THUMB-NEXT:    mla r12, r1, r4, r12
454; CHECK-THUMB-NEXT:    mov.w r4, #450
455; CHECK-THUMB-NEXT:    movw r5, :lower16:arr_9
456; CHECK-THUMB-NEXT:    mul lr, r0, r4
457; CHECK-THUMB-NEXT:    movw r0, #12878
458; CHECK-THUMB-NEXT:    movt r0, #13
459; CHECK-THUMB-NEXT:    muls r0, r1, r0
460; CHECK-THUMB-NEXT:    add.w r4, r2, r2, lsl #3
461; CHECK-THUMB-NEXT:    movw r2, #60920
462; CHECK-THUMB-NEXT:    movt r5, :upper16:arr_9
463; CHECK-THUMB-NEXT:    movt r2, #64028
464; CHECK-THUMB-NEXT:    lsls r3, r3, #31
465; CHECK-THUMB-NEXT:    add.w r0, r0, r4, lsl #1
466; CHECK-THUMB-NEXT:    add r0, r5
467; CHECK-THUMB-NEXT:    add r2, r0
468; CHECK-THUMB-NEXT:    movw r0, #25756
469; CHECK-THUMB-NEXT:    movt r0, #26
470; CHECK-THUMB-NEXT:    muls r0, r1, r0
471; CHECK-THUMB-NEXT:    movw r1, #24420
472; CHECK-THUMB-NEXT:    movt r1, #19356
473; CHECK-THUMB-NEXT:    add.w r0, r0, r4, lsl #1
474; CHECK-THUMB-NEXT:    add r0, r5
475; CHECK-THUMB-NEXT:    add r1, r0
476; CHECK-THUMB-NEXT:    movs r0, #0
477; CHECK-THUMB-NEXT:    b .LBB19_2
478; CHECK-THUMB-NEXT:  .LBB19_1: @ %for.cond1.for.cond.cleanup_crit_edge
479; CHECK-THUMB-NEXT:    @ in Loop: Header=BB19_2 Depth=1
480; CHECK-THUMB-NEXT:    add r2, lr
481; CHECK-THUMB-NEXT:    add r1, lr
482; CHECK-THUMB-NEXT:  .LBB19_2: @ %for.cond
483; CHECK-THUMB-NEXT:    @ =>This Loop Header: Depth=1
484; CHECK-THUMB-NEXT:    @ Child Loop BB19_3 Depth 2
485; CHECK-THUMB-NEXT:    movs r4, #0
486; CHECK-THUMB-NEXT:  .LBB19_3: @ %for.cond2.preheader
487; CHECK-THUMB-NEXT:    @ Parent Loop BB19_2 Depth=1
488; CHECK-THUMB-NEXT:    @ => This Inner Loop Header: Depth=2
489; CHECK-THUMB-NEXT:    cmp r3, #0
490; CHECK-THUMB-NEXT:    str r0, [r2, r4]
491; CHECK-THUMB-NEXT:    bne .LBB19_1
492; CHECK-THUMB-NEXT:  @ %bb.4: @ %for.cond2.preheader.2
493; CHECK-THUMB-NEXT:    @ in Loop: Header=BB19_3 Depth=2
494; CHECK-THUMB-NEXT:    str r0, [r1, r4]
495; CHECK-THUMB-NEXT:    add r4, r12
496; CHECK-THUMB-NEXT:    b .LBB19_3
497entry:
498  %0 = add i32 %d, -4
499  %1 = mul i32 %c, 864846
500  %2 = add i32 %1, 1367306604
501  br label %for.cond
502
503for.cond:                                         ; preds = %for.cond1.for.cond.cleanup_crit_edge, %for.cond.preheader
504  %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %for.cond1.for.cond.cleanup_crit_edge ]
505  %3 = mul i32 %indvar, %b
506  %4 = add i32 %3, -2
507  br label %for.cond2.preheader
508
509for.cond2.preheader:                              ; preds = %for.cond2.preheader.2, %for.cond
510  %indvar24 = phi i32 [ 0, %for.cond ], [ %indvar.next25.3, %for.cond2.preheader.2 ]
511  %indvar.next25 = or disjoint i32 %indvar24, 1
512  %l5 = mul i32 %2, %indvar.next25
513  %scevgep.1 = getelementptr [15 x [25 x [18 x i8]]], ptr @arr_9, i32 -217196, i32 %4, i32 %0, i32 %l5
514  store i32 0, ptr %scevgep.1, align 1
515  br i1 %cc, label %for.cond1.for.cond.cleanup_crit_edge, label %for.cond2.preheader.2
516
517for.cond2.preheader.2:                            ; preds = %for.cond2.preheader
518  %indvar.next25.1 = or disjoint i32 %indvar24, 2
519  %l8 = mul i32 %2, %indvar.next25.1
520  %scevgep.2 = getelementptr [15 x [25 x [18 x i8]]], ptr @arr_9, i32 -217196, i32 %4, i32 %0, i32 %l8
521  store i32 0, ptr %scevgep.2, align 1
522  %indvar.next25.3 = add i32 %indvar24, 4
523  br label %for.cond2.preheader
524
525for.cond1.for.cond.cleanup_crit_edge:             ; preds = %for.cond2.preheader
526  %indvar.next = add i32 %indvar, 1
527  br label %for.cond
528}
529