xref: /llvm-project/llvm/test/CodeGen/ARM/select-imm.ll (revision 3fee3e83a8a802cd23e79fbf2f1320bb8f961d0c) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=arm-eabi | FileCheck %s --check-prefix=ARM
3; RUN: llc < %s -mtriple=arm-eabi -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s --check-prefix=ARMT2
4; RUN: llc < %s -mtriple=thumb-eabi -mcpu=cortex-m0 | FileCheck %s --check-prefix=THUMB1
5; RUN: llc < %s -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s --check-prefix=THUMB2
6; RUN: llc < %s -mtriple=thumbv8m.base-eabi | FileCheck %s --check-prefix=V8MBASE
7
8define i32 @t1(i32 %c) nounwind readnone {
9; ARM-LABEL: t1:
10; ARM:       @ %bb.0: @ %entry
11; ARM-NEXT:    mov r1, #101
12; ARM-NEXT:    cmp r0, #1
13; ARM-NEXT:    orr r1, r1, #256
14; ARM-NEXT:    movgt r1, #123
15; ARM-NEXT:    mov r0, r1
16; ARM-NEXT:    mov pc, lr
17;
18; ARMT2-LABEL: t1:
19; ARMT2:       @ %bb.0: @ %entry
20; ARMT2-NEXT:    movw r1, #357
21; ARMT2-NEXT:    cmp r0, #1
22; ARMT2-NEXT:    movwgt r1, #123
23; ARMT2-NEXT:    mov r0, r1
24; ARMT2-NEXT:    bx lr
25;
26; THUMB1-LABEL: t1:
27; THUMB1:       @ %bb.0: @ %entry
28; THUMB1-NEXT:    cmp r0, #1
29; THUMB1-NEXT:    bgt .LBB0_2
30; THUMB1-NEXT:  @ %bb.1: @ %entry
31; THUMB1-NEXT:    movs r0, #255
32; THUMB1-NEXT:    adds r0, #102
33; THUMB1-NEXT:    bx lr
34; THUMB1-NEXT:  .LBB0_2:
35; THUMB1-NEXT:    movs r0, #123
36; THUMB1-NEXT:    bx lr
37;
38; THUMB2-LABEL: t1:
39; THUMB2:       @ %bb.0: @ %entry
40; THUMB2-NEXT:    movw r1, #357
41; THUMB2-NEXT:    cmp r0, #1
42; THUMB2-NEXT:    it gt
43; THUMB2-NEXT:    movgt r1, #123
44; THUMB2-NEXT:    mov r0, r1
45; THUMB2-NEXT:    bx lr
46;
47; V8MBASE-LABEL: t1:
48; V8MBASE:       @ %bb.0: @ %entry
49; V8MBASE-NEXT:    cmp r0, #1
50; V8MBASE-NEXT:    bgt .LBB0_2
51; V8MBASE-NEXT:  @ %bb.1: @ %entry
52; V8MBASE-NEXT:    movw r0, #357
53; V8MBASE-NEXT:    bx lr
54; V8MBASE-NEXT:  .LBB0_2:
55; V8MBASE-NEXT:    movs r0, #123
56; V8MBASE-NEXT:    bx lr
57entry:
58  %0 = icmp sgt i32 %c, 1
59  %1 = select i1 %0, i32 123, i32 357
60  ret i32 %1
61}
62
63define i32 @t2(i32 %c) nounwind readnone {
64; ARM-LABEL: t2:
65; ARM:       @ %bb.0: @ %entry
66; ARM-NEXT:    mov r1, #101
67; ARM-NEXT:    cmp r0, #1
68; ARM-NEXT:    orr r1, r1, #256
69; ARM-NEXT:    movle r1, #123
70; ARM-NEXT:    mov r0, r1
71; ARM-NEXT:    mov pc, lr
72;
73; ARMT2-LABEL: t2:
74; ARMT2:       @ %bb.0: @ %entry
75; ARMT2-NEXT:    mov r1, #123
76; ARMT2-NEXT:    cmp r0, #1
77; ARMT2-NEXT:    movwgt r1, #357
78; ARMT2-NEXT:    mov r0, r1
79; ARMT2-NEXT:    bx lr
80;
81; THUMB1-LABEL: t2:
82; THUMB1:       @ %bb.0: @ %entry
83; THUMB1-NEXT:    cmp r0, #1
84; THUMB1-NEXT:    bgt .LBB1_2
85; THUMB1-NEXT:  @ %bb.1: @ %entry
86; THUMB1-NEXT:    movs r0, #123
87; THUMB1-NEXT:    bx lr
88; THUMB1-NEXT:  .LBB1_2:
89; THUMB1-NEXT:    movs r0, #255
90; THUMB1-NEXT:    adds r0, #102
91; THUMB1-NEXT:    bx lr
92;
93; THUMB2-LABEL: t2:
94; THUMB2:       @ %bb.0: @ %entry
95; THUMB2-NEXT:    movs r1, #123
96; THUMB2-NEXT:    cmp r0, #1
97; THUMB2-NEXT:    it gt
98; THUMB2-NEXT:    movwgt r1, #357
99; THUMB2-NEXT:    mov r0, r1
100; THUMB2-NEXT:    bx lr
101;
102; V8MBASE-LABEL: t2:
103; V8MBASE:       @ %bb.0: @ %entry
104; V8MBASE-NEXT:    mov r1, r0
105; V8MBASE-NEXT:    movw r0, #357
106; V8MBASE-NEXT:    cmp r1, #1
107; V8MBASE-NEXT:    bgt .LBB1_2
108; V8MBASE-NEXT:  @ %bb.1: @ %entry
109; V8MBASE-NEXT:    movs r0, #123
110; V8MBASE-NEXT:  .LBB1_2: @ %entry
111; V8MBASE-NEXT:    bx lr
112entry:
113  %0 = icmp sgt i32 %c, 1
114  %1 = select i1 %0, i32 357, i32 123
115  ret i32 %1
116}
117
118define i32 @t3(i32 %a) nounwind readnone {
119; ARM-LABEL: t3:
120; ARM:       @ %bb.0: @ %entry
121; ARM-NEXT:    sub r0, r0, #160
122; ARM-NEXT:    rsbs r1, r0, #0
123; ARM-NEXT:    adc r0, r0, r1
124; ARM-NEXT:    mov pc, lr
125;
126; ARMT2-LABEL: t3:
127; ARMT2:       @ %bb.0: @ %entry
128; ARMT2-NEXT:    sub r0, r0, #160
129; ARMT2-NEXT:    clz r0, r0
130; ARMT2-NEXT:    lsr r0, r0, #5
131; ARMT2-NEXT:    bx lr
132;
133; THUMB1-LABEL: t3:
134; THUMB1:       @ %bb.0: @ %entry
135; THUMB1-NEXT:    subs r0, #160
136; THUMB1-NEXT:    rsbs r1, r0, #0
137; THUMB1-NEXT:    adcs r0, r1
138; THUMB1-NEXT:    bx lr
139;
140; THUMB2-LABEL: t3:
141; THUMB2:       @ %bb.0: @ %entry
142; THUMB2-NEXT:    subs r0, #160
143; THUMB2-NEXT:    clz r0, r0
144; THUMB2-NEXT:    lsrs r0, r0, #5
145; THUMB2-NEXT:    bx lr
146;
147; V8MBASE-LABEL: t3:
148; V8MBASE:       @ %bb.0: @ %entry
149; V8MBASE-NEXT:    subs r0, #160
150; V8MBASE-NEXT:    rsbs r1, r0, #0
151; V8MBASE-NEXT:    adcs r0, r1
152; V8MBASE-NEXT:    bx lr
153entry:
154  %0 = icmp eq i32 %a, 160
155  %1 = zext i1 %0 to i32
156  ret i32 %1
157}
158
159define i32 @t4(i32 %a, i32 %b, i32 %x) nounwind {
160; ARM-LABEL: t4:
161; ARM:       @ %bb.0: @ %entry
162; ARM-NEXT:    mvn r3, #170
163; ARM-NEXT:    cmp r0, r1
164; ARM-NEXT:    sub r3, r3, #11141120
165; ARM-NEXT:    movge r3, r2
166; ARM-NEXT:    mov r0, r3
167; ARM-NEXT:    mov pc, lr
168;
169; ARMT2-LABEL: t4:
170; ARMT2:       @ %bb.0: @ %entry
171; ARMT2-NEXT:    cmp r0, r1
172; ARMT2-NEXT:    movwlt r2, #65365
173; ARMT2-NEXT:    movtlt r2, #65365
174; ARMT2-NEXT:    mov r0, r2
175; ARMT2-NEXT:    bx lr
176;
177; THUMB1-LABEL: t4:
178; THUMB1:       @ %bb.0: @ %entry
179; THUMB1-NEXT:    cmp r0, r1
180; THUMB1-NEXT:    bge .LBB3_2
181; THUMB1-NEXT:  @ %bb.1:
182; THUMB1-NEXT:    ldr r2, .LCPI3_0
183; THUMB1-NEXT:  .LBB3_2: @ %entry
184; THUMB1-NEXT:    mov r0, r2
185; THUMB1-NEXT:    bx lr
186; THUMB1-NEXT:    .p2align 2
187; THUMB1-NEXT:  @ %bb.3:
188; THUMB1-NEXT:  .LCPI3_0:
189; THUMB1-NEXT:    .long 4283826005 @ 0xff55ff55
190;
191; THUMB2-LABEL: t4:
192; THUMB2:       @ %bb.0: @ %entry
193; THUMB2-NEXT:    cmp r0, r1
194; THUMB2-NEXT:    it lt
195; THUMB2-NEXT:    mvnlt r2, #11141290
196; THUMB2-NEXT:    mov r0, r2
197; THUMB2-NEXT:    bx lr
198;
199; V8MBASE-LABEL: t4:
200; V8MBASE:       @ %bb.0: @ %entry
201; V8MBASE-NEXT:    cmp r0, r1
202; V8MBASE-NEXT:    bge .LBB3_2
203; V8MBASE-NEXT:  @ %bb.1:
204; V8MBASE-NEXT:    movw r2, #65365
205; V8MBASE-NEXT:    movt r2, #65365
206; V8MBASE-NEXT:  .LBB3_2: @ %entry
207; V8MBASE-NEXT:    mov r0, r2
208; V8MBASE-NEXT:    bx lr
209entry:
210  %0 = icmp slt i32 %a, %b
211  %1 = select i1 %0, i32 4283826005, i32 %x
212  ret i32 %1
213}
214
215; rdar://9758317
216define i32 @t5(i32 %a) nounwind {
217; ARM-LABEL: t5:
218; ARM:       @ %bb.0: @ %entry
219; ARM-NEXT:    sub r0, r0, #1
220; ARM-NEXT:    rsbs r1, r0, #0
221; ARM-NEXT:    adc r0, r0, r1
222; ARM-NEXT:    mov pc, lr
223;
224; ARMT2-LABEL: t5:
225; ARMT2:       @ %bb.0: @ %entry
226; ARMT2-NEXT:    sub r0, r0, #1
227; ARMT2-NEXT:    clz r0, r0
228; ARMT2-NEXT:    lsr r0, r0, #5
229; ARMT2-NEXT:    bx lr
230;
231; THUMB1-LABEL: t5:
232; THUMB1:       @ %bb.0: @ %entry
233; THUMB1-NEXT:    subs r1, r0, #1
234; THUMB1-NEXT:    rsbs r0, r1, #0
235; THUMB1-NEXT:    adcs r0, r1
236; THUMB1-NEXT:    bx lr
237;
238; THUMB2-LABEL: t5:
239; THUMB2:       @ %bb.0: @ %entry
240; THUMB2-NEXT:    subs r0, #1
241; THUMB2-NEXT:    clz r0, r0
242; THUMB2-NEXT:    lsrs r0, r0, #5
243; THUMB2-NEXT:    bx lr
244;
245; V8MBASE-LABEL: t5:
246; V8MBASE:       @ %bb.0: @ %entry
247; V8MBASE-NEXT:    subs r1, r0, #1
248; V8MBASE-NEXT:    rsbs r0, r1, #0
249; V8MBASE-NEXT:    adcs r0, r1
250; V8MBASE-NEXT:    bx lr
251entry:
252  %cmp = icmp eq i32 %a, 1
253  %conv = zext i1 %cmp to i32
254  ret i32 %conv
255}
256
257define i32 @t6(i32 %a) nounwind {
258; ARM-LABEL: t6:
259; ARM:       @ %bb.0: @ %entry
260; ARM-NEXT:    cmp r0, #0
261; ARM-NEXT:    movne r0, #1
262; ARM-NEXT:    mov pc, lr
263;
264; ARMT2-LABEL: t6:
265; ARMT2:       @ %bb.0: @ %entry
266; ARMT2-NEXT:    cmp r0, #0
267; ARMT2-NEXT:    movwne r0, #1
268; ARMT2-NEXT:    bx lr
269;
270; THUMB1-LABEL: t6:
271; THUMB1:       @ %bb.0: @ %entry
272; THUMB1-NEXT:    subs r1, r0, #1
273; THUMB1-NEXT:    sbcs r0, r1
274; THUMB1-NEXT:    bx lr
275;
276; THUMB2-LABEL: t6:
277; THUMB2:       @ %bb.0: @ %entry
278; THUMB2-NEXT:    cmp r0, #0
279; THUMB2-NEXT:    it ne
280; THUMB2-NEXT:    movne r0, #1
281; THUMB2-NEXT:    bx lr
282;
283; V8MBASE-LABEL: t6:
284; V8MBASE:       @ %bb.0: @ %entry
285; V8MBASE-NEXT:    subs r1, r0, #1
286; V8MBASE-NEXT:    sbcs r0, r1
287; V8MBASE-NEXT:    bx lr
288entry:
289  %tobool = icmp ne i32 %a, 0
290  %lnot.ext = zext i1 %tobool to i32
291  ret i32 %lnot.ext
292}
293
294define i32 @t7(i32 %a, i32 %b) nounwind readnone {
295; ARM-LABEL: t7:
296; ARM:       @ %bb.0: @ %entry
297; ARM-NEXT:    subs r0, r0, r1
298; ARM-NEXT:    movne r0, #1
299; ARM-NEXT:    lsl r0, r0, #2
300; ARM-NEXT:    mov pc, lr
301;
302; ARMT2-LABEL: t7:
303; ARMT2:       @ %bb.0: @ %entry
304; ARMT2-NEXT:    subs r0, r0, r1
305; ARMT2-NEXT:    movwne r0, #1
306; ARMT2-NEXT:    lsl r0, r0, #2
307; ARMT2-NEXT:    bx lr
308;
309; THUMB1-LABEL: t7:
310; THUMB1:       @ %bb.0: @ %entry
311; THUMB1-NEXT:    subs r0, r0, r1
312; THUMB1-NEXT:    subs r1, r0, #1
313; THUMB1-NEXT:    sbcs r0, r1
314; THUMB1-NEXT:    lsls r0, r0, #2
315; THUMB1-NEXT:    bx lr
316;
317; THUMB2-LABEL: t7:
318; THUMB2:       @ %bb.0: @ %entry
319; THUMB2-NEXT:    subs r0, r0, r1
320; THUMB2-NEXT:    it ne
321; THUMB2-NEXT:    movne r0, #1
322; THUMB2-NEXT:    lsls r0, r0, #2
323; THUMB2-NEXT:    bx lr
324;
325; V8MBASE-LABEL: t7:
326; V8MBASE:       @ %bb.0: @ %entry
327; V8MBASE-NEXT:    subs r0, r0, r1
328; V8MBASE-NEXT:    subs r1, r0, #1
329; V8MBASE-NEXT:    sbcs r0, r1
330; V8MBASE-NEXT:    lsls r0, r0, #2
331; V8MBASE-NEXT:    bx lr
332entry:
333  %0 = icmp ne i32 %a, %b
334  %1 = select i1 %0, i32 4, i32 0
335  ret i32 %1
336}
337
338; ARM scheduler emits icmp/zext before both calls, so isn't relevant
339define void @t8(i32 %a) {
340; ARM-LABEL: t8:
341; ARM:       @ %bb.0: @ %entry
342; ARM-NEXT:    .save {r4, lr}
343; ARM-NEXT:    push {r4, lr}
344; ARM-NEXT:    mov r1, r0
345; ARM-NEXT:    sub r0, r0, #5
346; ARM-NEXT:    rsbs r2, r0, #0
347; ARM-NEXT:    adc r4, r0, r2
348; ARM-NEXT:    mov r0, #9
349; ARM-NEXT:    bl t7
350; ARM-NEXT:    mov r1, r0
351; ARM-NEXT:    mov r0, r4
352; ARM-NEXT:    pop {r4, lr}
353; ARM-NEXT:    b t7
354;
355; ARMT2-LABEL: t8:
356; ARMT2:       @ %bb.0: @ %entry
357; ARMT2-NEXT:    .save {r4, lr}
358; ARMT2-NEXT:    push {r4, lr}
359; ARMT2-NEXT:    mov r4, r0
360; ARMT2-NEXT:    mov r0, #9
361; ARMT2-NEXT:    mov r1, r4
362; ARMT2-NEXT:    bl t7
363; ARMT2-NEXT:    mov r1, r0
364; ARMT2-NEXT:    sub r0, r4, #5
365; ARMT2-NEXT:    clz r0, r0
366; ARMT2-NEXT:    lsr r0, r0, #5
367; ARMT2-NEXT:    pop {r4, lr}
368; ARMT2-NEXT:    b t7
369;
370; THUMB1-LABEL: t8:
371; THUMB1:       @ %bb.0: @ %entry
372; THUMB1-NEXT:    .save {r4, lr}
373; THUMB1-NEXT:    push {r4, lr}
374; THUMB1-NEXT:    mov r4, r0
375; THUMB1-NEXT:    movs r0, #9
376; THUMB1-NEXT:    mov r1, r4
377; THUMB1-NEXT:    bl t7
378; THUMB1-NEXT:    mov r1, r0
379; THUMB1-NEXT:    subs r2, r4, #5
380; THUMB1-NEXT:    rsbs r0, r2, #0
381; THUMB1-NEXT:    adcs r0, r2
382; THUMB1-NEXT:    bl t7
383; THUMB1-NEXT:    pop {r4, pc}
384;
385; THUMB2-LABEL: t8:
386; THUMB2:       @ %bb.0: @ %entry
387; THUMB2-NEXT:    .save {r4, lr}
388; THUMB2-NEXT:    push {r4, lr}
389; THUMB2-NEXT:    mov r4, r0
390; THUMB2-NEXT:    movs r0, #9
391; THUMB2-NEXT:    mov r1, r4
392; THUMB2-NEXT:    bl t7
393; THUMB2-NEXT:    mov r1, r0
394; THUMB2-NEXT:    subs r0, r4, #5
395; THUMB2-NEXT:    clz r0, r0
396; THUMB2-NEXT:    lsrs r0, r0, #5
397; THUMB2-NEXT:    pop.w {r4, lr}
398; THUMB2-NEXT:    b t7
399;
400; V8MBASE-LABEL: t8:
401; V8MBASE:       @ %bb.0: @ %entry
402; V8MBASE-NEXT:    .save {r4, lr}
403; V8MBASE-NEXT:    push {r4, lr}
404; V8MBASE-NEXT:    mov r1, r0
405; V8MBASE-NEXT:    subs r0, r0, #5
406; V8MBASE-NEXT:    rsbs r4, r0, #0
407; V8MBASE-NEXT:    adcs r4, r0
408; V8MBASE-NEXT:    movs r0, #9
409; V8MBASE-NEXT:    bl t7
410; V8MBASE-NEXT:    mov r1, r0
411; V8MBASE-NEXT:    mov r0, r4
412; V8MBASE-NEXT:    pop {r4}
413; V8MBASE-NEXT:    pop {r2}
414; V8MBASE-NEXT:    mov lr, r2
415; V8MBASE-NEXT:    b t7
416entry:
417  %cmp = icmp eq i32 %a, 5
418  %conv = zext i1 %cmp to i32
419  %call = tail call i32 @t7(i32 9, i32 %a)
420  tail call i32 @t7(i32 %conv, i32 %call)
421  ret void
422}
423
424; ARM scheduler emits icmp/zext before both calls, so isn't relevant
425define void @t9(ptr %a, i8 %b) {
426; ARM-LABEL: t9:
427; ARM:       @ %bb.0: @ %entry
428; ARM-NEXT:    .save {r4, lr}
429; ARM-NEXT:    push {r4, lr}
430; ARM-NEXT:    ldrsb r4, [r0]
431; ARM-NEXT:    mov r0, #1
432; ARM-NEXT:    bl f
433; ARM-NEXT:    and r0, r4, #255
434; ARM-NEXT:    cmp r0, r0
435; ARM-NEXT:    bne .LBB8_3
436; ARM-NEXT:  @ %bb.1: @ %while.body.preheader
437; ARM-NEXT:    add r1, r4, #1
438; ARM-NEXT:    mov r2, r0
439; ARM-NEXT:  .LBB8_2: @ %while.body
440; ARM-NEXT:    @ =>This Inner Loop Header: Depth=1
441; ARM-NEXT:    add r2, r2, #1
442; ARM-NEXT:    add r1, r1, #1
443; ARM-NEXT:    and r3, r2, #255
444; ARM-NEXT:    cmp r3, r0
445; ARM-NEXT:    blt .LBB8_2
446; ARM-NEXT:  .LBB8_3: @ %while.end
447; ARM-NEXT:    pop {r4, lr}
448; ARM-NEXT:    mov pc, lr
449;
450; ARMT2-LABEL: t9:
451; ARMT2:       @ %bb.0: @ %entry
452; ARMT2-NEXT:    .save {r4, lr}
453; ARMT2-NEXT:    push {r4, lr}
454; ARMT2-NEXT:    ldrsb r4, [r0]
455; ARMT2-NEXT:    mov r0, #1
456; ARMT2-NEXT:    bl f
457; ARMT2-NEXT:    uxtb r0, r4
458; ARMT2-NEXT:    cmp r0, r0
459; ARMT2-NEXT:    popne {r4, pc}
460; ARMT2-NEXT:  .LBB8_1: @ %while.body.preheader
461; ARMT2-NEXT:    add r1, r4, #1
462; ARMT2-NEXT:    mov r2, r0
463; ARMT2-NEXT:  .LBB8_2: @ %while.body
464; ARMT2-NEXT:    @ =>This Inner Loop Header: Depth=1
465; ARMT2-NEXT:    add r2, r2, #1
466; ARMT2-NEXT:    add r1, r1, #1
467; ARMT2-NEXT:    uxtb r3, r2
468; ARMT2-NEXT:    cmp r3, r0
469; ARMT2-NEXT:    blt .LBB8_2
470; ARMT2-NEXT:  @ %bb.3: @ %while.end
471; ARMT2-NEXT:    pop {r4, pc}
472;
473; THUMB1-LABEL: t9:
474; THUMB1:       @ %bb.0: @ %entry
475; THUMB1-NEXT:    .save {r4, lr}
476; THUMB1-NEXT:    push {r4, lr}
477; THUMB1-NEXT:    movs r1, #0
478; THUMB1-NEXT:    ldrsb r4, [r0, r1]
479; THUMB1-NEXT:    movs r0, #1
480; THUMB1-NEXT:    bl f
481; THUMB1-NEXT:    uxtb r0, r4
482; THUMB1-NEXT:    cmp r0, r0
483; THUMB1-NEXT:    bne .LBB8_3
484; THUMB1-NEXT:  @ %bb.1: @ %while.body.preheader
485; THUMB1-NEXT:    adds r1, r4, #1
486; THUMB1-NEXT:    mov r2, r0
487; THUMB1-NEXT:  .LBB8_2: @ %while.body
488; THUMB1-NEXT:    @ =>This Inner Loop Header: Depth=1
489; THUMB1-NEXT:    adds r1, r1, #1
490; THUMB1-NEXT:    adds r2, r2, #1
491; THUMB1-NEXT:    uxtb r3, r2
492; THUMB1-NEXT:    cmp r3, r0
493; THUMB1-NEXT:    blt .LBB8_2
494; THUMB1-NEXT:  .LBB8_3: @ %while.end
495; THUMB1-NEXT:    pop {r4, pc}
496;
497; THUMB2-LABEL: t9:
498; THUMB2:       @ %bb.0: @ %entry
499; THUMB2-NEXT:    .save {r4, lr}
500; THUMB2-NEXT:    push {r4, lr}
501; THUMB2-NEXT:    ldrsb.w r4, [r0]
502; THUMB2-NEXT:    movs r0, #1
503; THUMB2-NEXT:    bl f
504; THUMB2-NEXT:    uxtb r0, r4
505; THUMB2-NEXT:    cmp r0, r0
506; THUMB2-NEXT:    it ne
507; THUMB2-NEXT:    popne {r4, pc}
508; THUMB2-NEXT:  .LBB8_1: @ %while.body.preheader
509; THUMB2-NEXT:    adds r1, r4, #1
510; THUMB2-NEXT:    mov r2, r0
511; THUMB2-NEXT:  .LBB8_2: @ %while.body
512; THUMB2-NEXT:    @ =>This Inner Loop Header: Depth=1
513; THUMB2-NEXT:    adds r2, #1
514; THUMB2-NEXT:    adds r1, #1
515; THUMB2-NEXT:    uxtb r3, r2
516; THUMB2-NEXT:    cmp r3, r0
517; THUMB2-NEXT:    blt .LBB8_2
518; THUMB2-NEXT:  @ %bb.3: @ %while.end
519; THUMB2-NEXT:    pop {r4, pc}
520;
521; V8MBASE-LABEL: t9:
522; V8MBASE:       @ %bb.0: @ %entry
523; V8MBASE-NEXT:    .save {r4, lr}
524; V8MBASE-NEXT:    push {r4, lr}
525; V8MBASE-NEXT:    movs r1, #0
526; V8MBASE-NEXT:    ldrsb r4, [r0, r1]
527; V8MBASE-NEXT:    movs r0, #1
528; V8MBASE-NEXT:    bl f
529; V8MBASE-NEXT:    uxtb r0, r4
530; V8MBASE-NEXT:    cmp r0, r0
531; V8MBASE-NEXT:    bne .LBB8_3
532; V8MBASE-NEXT:  @ %bb.1: @ %while.body.preheader
533; V8MBASE-NEXT:    adds r1, r4, #1
534; V8MBASE-NEXT:    mov r2, r0
535; V8MBASE-NEXT:  .LBB8_2: @ %while.body
536; V8MBASE-NEXT:    @ =>This Inner Loop Header: Depth=1
537; V8MBASE-NEXT:    adds r1, r1, #1
538; V8MBASE-NEXT:    adds r2, r2, #1
539; V8MBASE-NEXT:    uxtb r3, r2
540; V8MBASE-NEXT:    cmp r3, r0
541; V8MBASE-NEXT:    blt .LBB8_2
542; V8MBASE-NEXT:  .LBB8_3: @ %while.end
543; V8MBASE-NEXT:    pop {r4, pc}
544entry:
545  %0 = load i8, ptr %a
546  %conv = sext i8 %0 to i32
547  %conv119 = zext i8 %0 to i32
548  %conv522 = and i32 %conv, 255
549  %cmp723 = icmp eq i32 %conv522, %conv119
550  tail call void @f(i1 zeroext %cmp723)
551  br i1 %cmp723, label %while.body, label %while.end
552
553while.body:                                       ; preds = %entry, %while.body
554  %ref.025 = phi i8 [ %inc9, %while.body ], [ %0, %entry ]
555  %in.024 = phi i32 [ %inc, %while.body ], [ %conv, %entry ]
556  %inc = add i32 %in.024, 1
557  %inc9 = add i8 %ref.025, 1
558  %conv1 = zext i8 %inc9 to i32
559  %cmp = icmp slt i32 %conv1, %conv119
560  %conv5 = and i32 %inc, 255
561  br i1 %cmp, label %while.body, label %while.end
562
563while.end:
564  ret void
565}
566
567declare void @f(i1 zeroext)
568
569define i1 @t10() {
570; ARM-LABEL: t10:
571; ARM:       @ %bb.0: @ %entry
572; ARM-NEXT:    .save {r11, lr}
573; ARM-NEXT:    push {r11, lr}
574; ARM-NEXT:    .pad #8
575; ARM-NEXT:    sub sp, sp, #8
576; ARM-NEXT:    mvn r0, #2
577; ARM-NEXT:    mvn r1, #7
578; ARM-NEXT:    str r0, [sp, #4]
579; ARM-NEXT:    mvn r0, #7
580; ARM-NEXT:    str r0, [sp]
581; ARM-NEXT:    mvn r0, #2
582; ARM-NEXT:    bl __aeabi_idivmod
583; ARM-NEXT:    sub r0, r1, r0, lsl #3
584; ARM-NEXT:    add r0, r0, #3
585; ARM-NEXT:    rsbs r1, r0, #0
586; ARM-NEXT:    adc r0, r0, r1
587; ARM-NEXT:    add sp, sp, #8
588; ARM-NEXT:    pop {r11, lr}
589; ARM-NEXT:    mov pc, lr
590;
591; ARMT2-LABEL: t10:
592; ARMT2:       @ %bb.0: @ %entry
593; ARMT2-NEXT:    .save {r11, lr}
594; ARMT2-NEXT:    push {r11, lr}
595; ARMT2-NEXT:    .pad #8
596; ARMT2-NEXT:    sub sp, sp, #8
597; ARMT2-NEXT:    mvn r0, #2
598; ARMT2-NEXT:    str r0, [sp, #4]
599; ARMT2-NEXT:    mvn r0, #7
600; ARMT2-NEXT:    str r0, [sp]
601; ARMT2-NEXT:    mvn r0, #2
602; ARMT2-NEXT:    mvn r1, #7
603; ARMT2-NEXT:    bl __aeabi_idivmod
604; ARMT2-NEXT:    sub r0, r1, r0, lsl #3
605; ARMT2-NEXT:    add r0, r0, #3
606; ARMT2-NEXT:    clz r0, r0
607; ARMT2-NEXT:    lsr r0, r0, #5
608; ARMT2-NEXT:    add sp, sp, #8
609; ARMT2-NEXT:    pop {r11, pc}
610;
611; THUMB1-LABEL: t10:
612; THUMB1:       @ %bb.0: @ %entry
613; THUMB1-NEXT:    .save {r4, r5, r7, lr}
614; THUMB1-NEXT:    push {r4, r5, r7, lr}
615; THUMB1-NEXT:    .pad #8
616; THUMB1-NEXT:    sub sp, #8
617; THUMB1-NEXT:    movs r0, #7
618; THUMB1-NEXT:    mvns r4, r0
619; THUMB1-NEXT:    str r4, [sp]
620; THUMB1-NEXT:    adds r5, r4, #5
621; THUMB1-NEXT:    str r5, [sp, #4]
622; THUMB1-NEXT:    mov r0, r5
623; THUMB1-NEXT:    mov r1, r4
624; THUMB1-NEXT:    bl __aeabi_idivmod
625; THUMB1-NEXT:    muls r0, r4, r0
626; THUMB1-NEXT:    adds r0, r0, r1
627; THUMB1-NEXT:    subs r1, r0, r5
628; THUMB1-NEXT:    rsbs r0, r1, #0
629; THUMB1-NEXT:    adcs r0, r1
630; THUMB1-NEXT:    add sp, #8
631; THUMB1-NEXT:    pop {r4, r5, r7, pc}
632;
633; THUMB2-LABEL: t10:
634; THUMB2:       @ %bb.0: @ %entry
635; THUMB2-NEXT:    .save {r7, lr}
636; THUMB2-NEXT:    push {r7, lr}
637; THUMB2-NEXT:    .pad #8
638; THUMB2-NEXT:    sub sp, #8
639; THUMB2-NEXT:    mvn r0, #2
640; THUMB2-NEXT:    str r0, [sp, #4]
641; THUMB2-NEXT:    mvn r0, #7
642; THUMB2-NEXT:    str r0, [sp]
643; THUMB2-NEXT:    mvn r0, #2
644; THUMB2-NEXT:    mvn r1, #7
645; THUMB2-NEXT:    bl __aeabi_idivmod
646; THUMB2-NEXT:    sub.w r0, r1, r0, lsl #3
647; THUMB2-NEXT:    adds r0, #3
648; THUMB2-NEXT:    clz r0, r0
649; THUMB2-NEXT:    lsrs r0, r0, #5
650; THUMB2-NEXT:    add sp, #8
651; THUMB2-NEXT:    pop {r7, pc}
652;
653; V8MBASE-LABEL: t10:
654; V8MBASE:       @ %bb.0: @ %entry
655; V8MBASE-NEXT:    .pad #8
656; V8MBASE-NEXT:    sub sp, #8
657; V8MBASE-NEXT:    movs r0, #7
658; V8MBASE-NEXT:    mvns r1, r0
659; V8MBASE-NEXT:    str r1, [sp]
660; V8MBASE-NEXT:    adds r0, r1, #5
661; V8MBASE-NEXT:    str r0, [sp, #4]
662; V8MBASE-NEXT:    adds r1, #8
663; V8MBASE-NEXT:    rsbs r0, r1, #0
664; V8MBASE-NEXT:    adcs r0, r1
665; V8MBASE-NEXT:    add sp, #8
666; V8MBASE-NEXT:    bx lr
667entry:
668  %q = alloca i32
669  %p = alloca i32
670  store i32 -3, ptr %q
671  store i32 -8, ptr %p
672  %0 = load i32, ptr %q
673  %1 = load i32, ptr %p
674  %div = sdiv i32 %0, %1
675  %mul = mul nsw i32 %div, %1
676  %rem = srem i32 %0, %1
677  %add = add nsw i32 %mul, %rem
678  %cmp = icmp eq i32 %add, %0
679  ret i1 %cmp
680}
681
682define i1 @t11() {
683; ARM-LABEL: t11:
684; ARM:       @ %bb.0: @ %entry
685; ARM-NEXT:    .pad #4
686; ARM-NEXT:    sub sp, sp, #4
687; ARM-NEXT:    ldr r0, [sp]
688; ARM-NEXT:    mov r1, #40960
689; ARM-NEXT:    orr r1, r1, #-33554432
690; ARM-NEXT:    orr r0, r0, #40960
691; ARM-NEXT:    and r0, r0, r1
692; ARM-NEXT:    orr r0, r0, #3
693; ARM-NEXT:    str r0, [sp]
694; ARM-NEXT:    mov r0, #1
695; ARM-NEXT:    add sp, sp, #4
696; ARM-NEXT:    mov pc, lr
697;
698; ARMT2-LABEL: t11:
699; ARMT2:       @ %bb.0: @ %entry
700; ARMT2-NEXT:    .pad #4
701; ARMT2-NEXT:    sub sp, sp, #4
702; ARMT2-NEXT:    ldr r1, [sp]
703; ARMT2-NEXT:    mov r0, #33
704; ARMT2-NEXT:    movw r2, #39322
705; ARMT2-NEXT:    movt r2, #6553
706; ARMT2-NEXT:    bfi r1, r0, #0, #12
707; ARMT2-NEXT:    mov r0, #10
708; ARMT2-NEXT:    bfi r1, r0, #12, #13
709; ARMT2-NEXT:    mov r0, r1
710; ARMT2-NEXT:    bfc r0, #12, #20
711; ARMT2-NEXT:    umull r2, r3, r0, r2
712; ARMT2-NEXT:    add r2, r3, r3, lsl #2
713; ARMT2-NEXT:    sub r0, r0, r2, lsl #1
714; ARMT2-NEXT:    movw r2, #40960
715; ARMT2-NEXT:    movt r2, #65024
716; ARMT2-NEXT:    and r1, r1, r2
717; ARMT2-NEXT:    orr r0, r1, r0
718; ARMT2-NEXT:    str r0, [sp]
719; ARMT2-NEXT:    and r0, r0, #15
720; ARMT2-NEXT:    sub r0, r0, #3
721; ARMT2-NEXT:    clz r0, r0
722; ARMT2-NEXT:    lsr r0, r0, #5
723; ARMT2-NEXT:    add sp, sp, #4
724; ARMT2-NEXT:    bx lr
725;
726; THUMB1-LABEL: t11:
727; THUMB1:       @ %bb.0: @ %entry
728; THUMB1-NEXT:    .save {r4, r5, r7, lr}
729; THUMB1-NEXT:    push {r4, r5, r7, lr}
730; THUMB1-NEXT:    .pad #8
731; THUMB1-NEXT:    sub sp, #8
732; THUMB1-NEXT:    movs r4, #33
733; THUMB1-NEXT:    ldr r0, [sp, #4]
734; THUMB1-NEXT:    orrs r0, r4
735; THUMB1-NEXT:    ldr r1, .LCPI10_0
736; THUMB1-NEXT:    ands r1, r0
737; THUMB1-NEXT:    movs r0, #5
738; THUMB1-NEXT:    lsls r0, r0, #13
739; THUMB1-NEXT:    adds r5, r1, r0
740; THUMB1-NEXT:    movs r1, #10
741; THUMB1-NEXT:    mov r0, r4
742; THUMB1-NEXT:    bl __aeabi_uidivmod
743; THUMB1-NEXT:    bics r5, r4
744; THUMB1-NEXT:    orrs r5, r1
745; THUMB1-NEXT:    str r5, [sp, #4]
746; THUMB1-NEXT:    ldr r0, .LCPI10_1
747; THUMB1-NEXT:    ands r0, r5
748; THUMB1-NEXT:    subs r1, r0, #3
749; THUMB1-NEXT:    rsbs r0, r1, #0
750; THUMB1-NEXT:    adcs r0, r1
751; THUMB1-NEXT:    add sp, #8
752; THUMB1-NEXT:    pop {r4, r5, r7, pc}
753; THUMB1-NEXT:    .p2align 2
754; THUMB1-NEXT:  @ %bb.1:
755; THUMB1-NEXT:  .LCPI10_0:
756; THUMB1-NEXT:    .long 4261412897 @ 0xfe000021
757; THUMB1-NEXT:  .LCPI10_1:
758; THUMB1-NEXT:    .long 4095 @ 0xfff
759;
760; THUMB2-LABEL: t11:
761; THUMB2:       @ %bb.0: @ %entry
762; THUMB2-NEXT:    .pad #4
763; THUMB2-NEXT:    sub sp, #4
764; THUMB2-NEXT:    ldr r1, [sp]
765; THUMB2-NEXT:    movs r0, #33
766; THUMB2-NEXT:    movw r2, #39322
767; THUMB2-NEXT:    bfi r1, r0, #0, #12
768; THUMB2-NEXT:    movs r0, #10
769; THUMB2-NEXT:    bfi r1, r0, #12, #13
770; THUMB2-NEXT:    mov r0, r1
771; THUMB2-NEXT:    movt r2, #6553
772; THUMB2-NEXT:    bfc r0, #12, #20
773; THUMB2-NEXT:    umull r2, r3, r0, r2
774; THUMB2-NEXT:    add.w r2, r3, r3, lsl #2
775; THUMB2-NEXT:    sub.w r0, r0, r2, lsl #1
776; THUMB2-NEXT:    movw r2, #40960
777; THUMB2-NEXT:    movt r2, #65024
778; THUMB2-NEXT:    ands r1, r2
779; THUMB2-NEXT:    orrs r0, r1
780; THUMB2-NEXT:    str r0, [sp]
781; THUMB2-NEXT:    and r0, r0, #15
782; THUMB2-NEXT:    subs r0, #3
783; THUMB2-NEXT:    clz r0, r0
784; THUMB2-NEXT:    lsrs r0, r0, #5
785; THUMB2-NEXT:    add sp, #4
786; THUMB2-NEXT:    bx lr
787;
788; V8MBASE-LABEL: t11:
789; V8MBASE:       @ %bb.0: @ %entry
790; V8MBASE-NEXT:    .pad #4
791; V8MBASE-NEXT:    sub sp, #4
792; V8MBASE-NEXT:    movs r0, #127
793; V8MBASE-NEXT:    lsls r0, r0, #25
794; V8MBASE-NEXT:    ldr r1, [sp]
795; V8MBASE-NEXT:    ands r1, r0
796; V8MBASE-NEXT:    movw r0, #40963
797; V8MBASE-NEXT:    adds r0, r1, r0
798; V8MBASE-NEXT:    str r0, [sp]
799; V8MBASE-NEXT:    movs r1, #0
800; V8MBASE-NEXT:    rsbs r0, r1, #0
801; V8MBASE-NEXT:    adcs r0, r1
802; V8MBASE-NEXT:    add sp, #4
803; V8MBASE-NEXT:    bx lr
804entry:
805  %bit = alloca i32
806  %load = load i32, ptr %bit
807  %clear = and i32 %load, -4096
808  %set = or i32 %clear, 33
809  store i32 %set, ptr %bit
810  %load1 = load i32, ptr %bit
811  %clear2 = and i32 %load1, -33550337
812  %set3 = or i32 %clear2, 40960
813  %clear5 = and i32 %set3, 4095
814  %rem = srem i32 %clear5, 10
815  %clear9 = and i32 %set3, -4096
816  %set10 = or i32 %clear9, %rem
817  store i32 %set10, ptr %bit
818  %clear12 = and i32 %set10, 4095
819  %cmp = icmp eq i32 %clear12, 3
820  ret i1 %cmp
821}
822
823define i32 @t12(i32 %a) nounwind {
824; ARM-LABEL: t12:
825; ARM:       @ %bb.0: @ %entry
826; ARM-NEXT:    cmp r0, #0
827; ARM-NEXT:    movne r0, #1
828; ARM-NEXT:    lsl r0, r0, #1
829; ARM-NEXT:    mov pc, lr
830;
831; ARMT2-LABEL: t12:
832; ARMT2:       @ %bb.0: @ %entry
833; ARMT2-NEXT:    cmp r0, #0
834; ARMT2-NEXT:    movwne r0, #1
835; ARMT2-NEXT:    lsl r0, r0, #1
836; ARMT2-NEXT:    bx lr
837;
838; THUMB1-LABEL: t12:
839; THUMB1:       @ %bb.0: @ %entry
840; THUMB1-NEXT:    subs r1, r0, #1
841; THUMB1-NEXT:    sbcs r0, r1
842; THUMB1-NEXT:    lsls r0, r0, #1
843; THUMB1-NEXT:    bx lr
844;
845; THUMB2-LABEL: t12:
846; THUMB2:       @ %bb.0: @ %entry
847; THUMB2-NEXT:    cmp r0, #0
848; THUMB2-NEXT:    it ne
849; THUMB2-NEXT:    movne r0, #1
850; THUMB2-NEXT:    lsls r0, r0, #1
851; THUMB2-NEXT:    bx lr
852;
853; V8MBASE-LABEL: t12:
854; V8MBASE:       @ %bb.0: @ %entry
855; V8MBASE-NEXT:    subs r1, r0, #1
856; V8MBASE-NEXT:    sbcs r0, r1
857; V8MBASE-NEXT:    lsls r0, r0, #1
858; V8MBASE-NEXT:    bx lr
859entry:
860  %tobool = icmp ne i32 %a, 0
861  %lnot.ext = select i1 %tobool, i32 2, i32 0
862  ret i32 %lnot.ext
863}
864
865define i32 @t13(i32 %a) nounwind {
866; ARM-LABEL: t13:
867; ARM:       @ %bb.0: @ %entry
868; ARM-NEXT:    cmp r0, #0
869; ARM-NEXT:    movne r0, #3
870; ARM-NEXT:    mov pc, lr
871;
872; ARMT2-LABEL: t13:
873; ARMT2:       @ %bb.0: @ %entry
874; ARMT2-NEXT:    cmp r0, #0
875; ARMT2-NEXT:    movwne r0, #3
876; ARMT2-NEXT:    bx lr
877;
878; THUMB1-LABEL: t13:
879; THUMB1:       @ %bb.0: @ %entry
880; THUMB1-NEXT:    cmp r0, #0
881; THUMB1-NEXT:    beq .LBB12_2
882; THUMB1-NEXT:  @ %bb.1:
883; THUMB1-NEXT:    movs r0, #3
884; THUMB1-NEXT:  .LBB12_2: @ %entry
885; THUMB1-NEXT:    bx lr
886;
887; THUMB2-LABEL: t13:
888; THUMB2:       @ %bb.0: @ %entry
889; THUMB2-NEXT:    cmp r0, #0
890; THUMB2-NEXT:    it ne
891; THUMB2-NEXT:    movne r0, #3
892; THUMB2-NEXT:    bx lr
893;
894; V8MBASE-LABEL: t13:
895; V8MBASE:       @ %bb.0: @ %entry
896; V8MBASE-NEXT:    cbz r0, .LBB12_2
897; V8MBASE-NEXT:  @ %bb.1:
898; V8MBASE-NEXT:    movs r0, #3
899; V8MBASE-NEXT:  .LBB12_2: @ %entry
900; V8MBASE-NEXT:    bx lr
901entry:
902  %tobool = icmp ne i32 %a, 0
903  %lnot.ext = select i1 %tobool, i32 3, i32 0
904  ret i32 %lnot.ext
905}
906