1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=thumbv6m-none-eabi | FileCheck %s --check-prefixes=CHECK-T1,CHECK-T16 3; RUN: llc < %s -mtriple=thumbv7m-none-eabi | FileCheck %s --check-prefix=CHECK-T2 --check-prefix=CHECK-T2NODSP 4; RUN: llc < %s -mtriple=thumbv7em-none-eabi | FileCheck %s --check-prefix=CHECK-T2 --check-prefix=CHECK-T2DSP 5; RUN: llc < %s -mtriple=armv5t-none-eabi | FileCheck %s --check-prefix=CHECK-ARM --check-prefix=CHECK-ARMNODPS 6; RUN: llc < %s -mtriple=armv5te-none-eabi | FileCheck %s --check-prefix=CHECK-ARM --check-prefix=CHECK-ARMBASEDSP 7; RUN: llc < %s -mtriple=armv5te-none-eabi -mattr=+dsp | FileCheck %s --check-prefix=CHECK-ARM --check-prefix=CHECK-ARMBASEDSP 8; RUN: llc < %s -mtriple=armv5te-none-eabi -mattr=+dsp,thumb-mode | FileCheck %s --check-prefixes=CHECK-T1,CHECK-T15TE 9; RUN: llc < %s -mtriple=armv6-none-eabi -mattr=+dsp,thumb-mode | FileCheck %s --check-prefixes=CHECK-T1,CHECK-T16 10; RUN: llc < %s -mtriple=armv6-none-eabi | FileCheck %s --check-prefix=CHECK-ARM --check-prefix=CHECK-ARMDSP 11 12declare i4 @llvm.sadd.sat.i4(i4, i4) 13declare i8 @llvm.sadd.sat.i8(i8, i8) 14declare i16 @llvm.sadd.sat.i16(i16, i16) 15declare i32 @llvm.sadd.sat.i32(i32, i32) 16declare i64 @llvm.sadd.sat.i64(i64, i64) 17 18define i32 @func(i32 %x, i32 %y) nounwind { 19; CHECK-T1-LABEL: func: 20; CHECK-T1: @ %bb.0: 21; CHECK-T1-NEXT: adds r0, r0, r1 22; CHECK-T1-NEXT: bvc .LBB0_2 23; CHECK-T1-NEXT: @ %bb.1: 24; CHECK-T1-NEXT: asrs r1, r0, #31 25; CHECK-T1-NEXT: movs r0, #1 26; CHECK-T1-NEXT: lsls r0, r0, #31 27; CHECK-T1-NEXT: eors r0, r1 28; CHECK-T1-NEXT: .LBB0_2: 29; CHECK-T1-NEXT: bx lr 30; 31; CHECK-T2NODSP-LABEL: func: 32; CHECK-T2NODSP: @ %bb.0: 33; CHECK-T2NODSP-NEXT: adds r0, r0, r1 34; CHECK-T2NODSP-NEXT: mov.w r1, #-2147483648 35; CHECK-T2NODSP-NEXT: it vs 36; CHECK-T2NODSP-NEXT: eorvs.w r0, r1, r0, asr #31 37; CHECK-T2NODSP-NEXT: bx lr 38; 39; CHECK-T2DSP-LABEL: func: 40; CHECK-T2DSP: @ %bb.0: 41; CHECK-T2DSP-NEXT: qadd r0, r0, r1 42; CHECK-T2DSP-NEXT: bx lr 43; 44; CHECK-ARMNODPS-LABEL: func: 45; CHECK-ARMNODPS: @ %bb.0: 46; CHECK-ARMNODPS-NEXT: adds r0, r0, r1 47; CHECK-ARMNODPS-NEXT: mov r1, #-2147483648 48; CHECK-ARMNODPS-NEXT: eorvs r0, r1, r0, asr #31 49; CHECK-ARMNODPS-NEXT: bx lr 50; 51; CHECK-ARMBASEDSP-LABEL: func: 52; CHECK-ARMBASEDSP: @ %bb.0: 53; CHECK-ARMBASEDSP-NEXT: qadd r0, r0, r1 54; CHECK-ARMBASEDSP-NEXT: bx lr 55; 56; CHECK-ARMDSP-LABEL: func: 57; CHECK-ARMDSP: @ %bb.0: 58; CHECK-ARMDSP-NEXT: qadd r0, r0, r1 59; CHECK-ARMDSP-NEXT: bx lr 60 %tmp = call i32 @llvm.sadd.sat.i32(i32 %x, i32 %y) 61 ret i32 %tmp 62} 63 64define i64 @func2(i64 %x, i64 %y) nounwind { 65; CHECK-T16-LABEL: func2: 66; CHECK-T16: @ %bb.0: 67; CHECK-T16-NEXT: .save {r4, lr} 68; CHECK-T16-NEXT: push {r4, lr} 69; CHECK-T16-NEXT: mov r4, r1 70; CHECK-T16-NEXT: eors r1, r3 71; CHECK-T16-NEXT: adds r2, r0, r2 72; CHECK-T16-NEXT: adcs r3, r4 73; CHECK-T16-NEXT: eors r4, r3 74; CHECK-T16-NEXT: bics r4, r1 75; CHECK-T16-NEXT: asrs r0, r3, #31 76; CHECK-T16-NEXT: movs r1, #1 77; CHECK-T16-NEXT: lsls r1, r1, #31 78; CHECK-T16-NEXT: eors r1, r0 79; CHECK-T16-NEXT: cmp r4, #0 80; CHECK-T16-NEXT: bpl .LBB1_3 81; CHECK-T16-NEXT: @ %bb.1: 82; CHECK-T16-NEXT: bpl .LBB1_4 83; CHECK-T16-NEXT: .LBB1_2: 84; CHECK-T16-NEXT: pop {r4, pc} 85; CHECK-T16-NEXT: .LBB1_3: 86; CHECK-T16-NEXT: mov r0, r2 87; CHECK-T16-NEXT: bmi .LBB1_2 88; CHECK-T16-NEXT: .LBB1_4: 89; CHECK-T16-NEXT: mov r1, r3 90; CHECK-T16-NEXT: pop {r4, pc} 91; 92; CHECK-T2-LABEL: func2: 93; CHECK-T2: @ %bb.0: 94; CHECK-T2-NEXT: adds r0, r0, r2 95; CHECK-T2-NEXT: eor.w r12, r1, r3 96; CHECK-T2-NEXT: adc.w r2, r1, r3 97; CHECK-T2-NEXT: eors r1, r2 98; CHECK-T2-NEXT: bics.w r1, r1, r12 99; CHECK-T2-NEXT: it mi 100; CHECK-T2-NEXT: asrmi r0, r2, #31 101; CHECK-T2-NEXT: mov.w r1, #-2147483648 102; CHECK-T2-NEXT: it mi 103; CHECK-T2-NEXT: eormi.w r2, r1, r2, asr #31 104; CHECK-T2-NEXT: mov r1, r2 105; CHECK-T2-NEXT: bx lr 106; 107; CHECK-ARM-LABEL: func2: 108; CHECK-ARM: @ %bb.0: 109; CHECK-ARM-NEXT: adds r0, r0, r2 110; CHECK-ARM-NEXT: eor r12, r1, r3 111; CHECK-ARM-NEXT: adc r2, r1, r3 112; CHECK-ARM-NEXT: eor r1, r1, r2 113; CHECK-ARM-NEXT: bics r1, r1, r12 114; CHECK-ARM-NEXT: asrmi r0, r2, #31 115; CHECK-ARM-NEXT: mov r1, #-2147483648 116; CHECK-ARM-NEXT: eormi r2, r1, r2, asr #31 117; CHECK-ARM-NEXT: mov r1, r2 118; CHECK-ARM-NEXT: bx lr 119; 120; CHECK-T15TE-LABEL: func2: 121; CHECK-T15TE: @ %bb.0: 122; CHECK-T15TE-NEXT: .save {r4, lr} 123; CHECK-T15TE-NEXT: push {r4, lr} 124; CHECK-T15TE-NEXT: movs r4, r1 125; CHECK-T15TE-NEXT: eors r1, r3 126; CHECK-T15TE-NEXT: adds r2, r0, r2 127; CHECK-T15TE-NEXT: adcs r3, r4 128; CHECK-T15TE-NEXT: eors r4, r3 129; CHECK-T15TE-NEXT: bics r4, r1 130; CHECK-T15TE-NEXT: asrs r0, r3, #31 131; CHECK-T15TE-NEXT: movs r1, #1 132; CHECK-T15TE-NEXT: lsls r1, r1, #31 133; CHECK-T15TE-NEXT: eors r1, r0 134; CHECK-T15TE-NEXT: cmp r4, #0 135; CHECK-T15TE-NEXT: bpl .LBB1_3 136; CHECK-T15TE-NEXT: @ %bb.1: 137; CHECK-T15TE-NEXT: bpl .LBB1_4 138; CHECK-T15TE-NEXT: .LBB1_2: 139; CHECK-T15TE-NEXT: pop {r4, pc} 140; CHECK-T15TE-NEXT: .LBB1_3: 141; CHECK-T15TE-NEXT: mov r12, r2 142; CHECK-T15TE-NEXT: mov r0, r12 143; CHECK-T15TE-NEXT: bmi .LBB1_2 144; CHECK-T15TE-NEXT: .LBB1_4: 145; CHECK-T15TE-NEXT: movs r1, r3 146; CHECK-T15TE-NEXT: pop {r4, pc} 147 %tmp = call i64 @llvm.sadd.sat.i64(i64 %x, i64 %y) 148 ret i64 %tmp 149} 150 151define signext i16 @func16(i16 signext %x, i16 signext %y) nounwind { 152; CHECK-T1-LABEL: func16: 153; CHECK-T1: @ %bb.0: 154; CHECK-T1-NEXT: adds r0, r0, r1 155; CHECK-T1-NEXT: ldr r1, .LCPI2_0 156; CHECK-T1-NEXT: cmp r0, r1 157; CHECK-T1-NEXT: blt .LBB2_2 158; CHECK-T1-NEXT: @ %bb.1: 159; CHECK-T1-NEXT: {{movs|mov}} r0, r1 160; CHECK-T1-NEXT: .LBB2_2: 161; CHECK-T1-NEXT: ldr r1, .LCPI2_1 162; CHECK-T1-NEXT: cmp r0, r1 163; CHECK-T1-NEXT: bgt .LBB2_4 164; CHECK-T1-NEXT: @ %bb.3: 165; CHECK-T1-NEXT: {{movs|mov}} r0, r1 166; CHECK-T1-NEXT: .LBB2_4: 167; CHECK-T1-NEXT: bx lr 168; CHECK-T1-NEXT: .p2align 2 169; CHECK-T1-NEXT: @ %bb.5: 170; CHECK-T1-NEXT: .LCPI2_0: 171; CHECK-T1-NEXT: .long 32767 @ 0x7fff 172; CHECK-T1-NEXT: .LCPI2_1: 173; CHECK-T1-NEXT: .long 4294934528 @ 0xffff8000 174; 175; CHECK-T2NODSP-LABEL: func16: 176; CHECK-T2NODSP: @ %bb.0: 177; CHECK-T2NODSP-NEXT: add r0, r1 178; CHECK-T2NODSP-NEXT: ssat r0, #16, r0 179; CHECK-T2NODSP-NEXT: bx lr 180; 181; CHECK-T2DSP-LABEL: func16: 182; CHECK-T2DSP: @ %bb.0: 183; CHECK-T2DSP-NEXT: qadd16 r0, r0, r1 184; CHECK-T2DSP-NEXT: sxth r0, r0 185; CHECK-T2DSP-NEXT: bx lr 186; 187; CHECK-ARMNODPS-LABEL: func16: 188; CHECK-ARMNODPS: @ %bb.0: 189; CHECK-ARMNODPS-NEXT: add r0, r0, r1 190; CHECK-ARMNODPS-NEXT: mov r1, #255 191; CHECK-ARMNODPS-NEXT: orr r1, r1, #32512 192; CHECK-ARMNODPS-NEXT: cmp r0, r1 193; CHECK-ARMNODPS-NEXT: movlt r1, r0 194; CHECK-ARMNODPS-NEXT: ldr r0, .LCPI2_0 195; CHECK-ARMNODPS-NEXT: cmn r1, #32768 196; CHECK-ARMNODPS-NEXT: movgt r0, r1 197; CHECK-ARMNODPS-NEXT: bx lr 198; CHECK-ARMNODPS-NEXT: .p2align 2 199; CHECK-ARMNODPS-NEXT: @ %bb.1: 200; CHECK-ARMNODPS-NEXT: .LCPI2_0: 201; CHECK-ARMNODPS-NEXT: .long 4294934528 @ 0xffff8000 202; 203; CHECK-ARMBASEDSP-LABEL: func16: 204; CHECK-ARMBASEDSP: @ %bb.0: 205; CHECK-ARMBASEDSP-NEXT: lsl r0, r0, #16 206; CHECK-ARMBASEDSP-NEXT: lsl r1, r1, #16 207; CHECK-ARMBASEDSP-NEXT: qadd r0, r0, r1 208; CHECK-ARMBASEDSP-NEXT: asr r0, r0, #16 209; CHECK-ARMBASEDSP-NEXT: bx lr 210; 211; CHECK-ARMDSP-LABEL: func16: 212; CHECK-ARMDSP: @ %bb.0: 213; CHECK-ARMDSP-NEXT: qadd16 r0, r0, r1 214; CHECK-ARMDSP-NEXT: sxth r0, r0 215; CHECK-ARMDSP-NEXT: bx lr 216 %tmp = call i16 @llvm.sadd.sat.i16(i16 %x, i16 %y) 217 ret i16 %tmp 218} 219 220define signext i8 @func8(i8 signext %x, i8 signext %y) nounwind { 221; CHECK-T1-LABEL: func8: 222; CHECK-T1: @ %bb.0: 223; CHECK-T1-NEXT: adds r0, r0, r1 224; CHECK-T1-NEXT: movs r1, #127 225; CHECK-T1-NEXT: cmp r0, #127 226; CHECK-T1-NEXT: blt .LBB3_2 227; CHECK-T1-NEXT: @ %bb.1: 228; CHECK-T1-NEXT: {{movs|mov}} r0, r1 229; CHECK-T1-NEXT: .LBB3_2: 230; CHECK-T1-NEXT: mvns r1, r1 231; CHECK-T1-NEXT: cmp r0, r1 232; CHECK-T1-NEXT: bgt .LBB3_4 233; CHECK-T1-NEXT: @ %bb.3: 234; CHECK-T1-NEXT: {{movs|mov}} r0, r1 235; CHECK-T1-NEXT: .LBB3_4: 236; CHECK-T1-NEXT: bx lr 237; 238; CHECK-T2NODSP-LABEL: func8: 239; CHECK-T2NODSP: @ %bb.0: 240; CHECK-T2NODSP-NEXT: add r0, r1 241; CHECK-T2NODSP-NEXT: ssat r0, #8, r0 242; CHECK-T2NODSP-NEXT: bx lr 243; 244; CHECK-T2DSP-LABEL: func8: 245; CHECK-T2DSP: @ %bb.0: 246; CHECK-T2DSP-NEXT: qadd8 r0, r0, r1 247; CHECK-T2DSP-NEXT: sxtb r0, r0 248; CHECK-T2DSP-NEXT: bx lr 249; 250; CHECK-ARMNODPS-LABEL: func8: 251; CHECK-ARMNODPS: @ %bb.0: 252; CHECK-ARMNODPS-NEXT: add r0, r0, r1 253; CHECK-ARMNODPS-NEXT: cmp r0, #127 254; CHECK-ARMNODPS-NEXT: movge r0, #127 255; CHECK-ARMNODPS-NEXT: cmn r0, #128 256; CHECK-ARMNODPS-NEXT: mvnle r0, #127 257; CHECK-ARMNODPS-NEXT: bx lr 258; 259; CHECK-ARMBASEDSP-LABEL: func8: 260; CHECK-ARMBASEDSP: @ %bb.0: 261; CHECK-ARMBASEDSP-NEXT: lsl r0, r0, #24 262; CHECK-ARMBASEDSP-NEXT: lsl r1, r1, #24 263; CHECK-ARMBASEDSP-NEXT: qadd r0, r0, r1 264; CHECK-ARMBASEDSP-NEXT: asr r0, r0, #24 265; CHECK-ARMBASEDSP-NEXT: bx lr 266; 267; CHECK-ARMDSP-LABEL: func8: 268; CHECK-ARMDSP: @ %bb.0: 269; CHECK-ARMDSP-NEXT: qadd8 r0, r0, r1 270; CHECK-ARMDSP-NEXT: sxtb r0, r0 271; CHECK-ARMDSP-NEXT: bx lr 272 %tmp = call i8 @llvm.sadd.sat.i8(i8 %x, i8 %y) 273 ret i8 %tmp 274} 275 276define signext i4 @func3(i4 signext %x, i4 signext %y) nounwind { 277; CHECK-T1-LABEL: func3: 278; CHECK-T1: @ %bb.0: 279; CHECK-T1-NEXT: adds r0, r0, r1 280; CHECK-T1-NEXT: movs r1, #7 281; CHECK-T1-NEXT: cmp r0, #7 282; CHECK-T1-NEXT: blt .LBB4_2 283; CHECK-T1-NEXT: @ %bb.1: 284; CHECK-T1-NEXT: {{movs|mov}} r0, r1 285; CHECK-T1-NEXT: .LBB4_2: 286; CHECK-T1-NEXT: mvns r1, r1 287; CHECK-T1-NEXT: cmp r0, r1 288; CHECK-T1-NEXT: bgt .LBB4_4 289; CHECK-T1-NEXT: @ %bb.3: 290; CHECK-T1-NEXT: {{movs|mov}} r0, r1 291; CHECK-T1-NEXT: .LBB4_4: 292; CHECK-T1-NEXT: bx lr 293; 294; CHECK-T2NODSP-LABEL: func3: 295; CHECK-T2NODSP: @ %bb.0: 296; CHECK-T2NODSP-NEXT: add r0, r1 297; CHECK-T2NODSP-NEXT: ssat r0, #4, r0 298; CHECK-T2NODSP-NEXT: bx lr 299; 300; CHECK-T2DSP-LABEL: func3: 301; CHECK-T2DSP: @ %bb.0: 302; CHECK-T2DSP-NEXT: lsls r1, r1, #28 303; CHECK-T2DSP-NEXT: lsls r0, r0, #28 304; CHECK-T2DSP-NEXT: qadd r0, r0, r1 305; CHECK-T2DSP-NEXT: asrs r0, r0, #28 306; CHECK-T2DSP-NEXT: bx lr 307; 308; CHECK-ARMNODPS-LABEL: func3: 309; CHECK-ARMNODPS: @ %bb.0: 310; CHECK-ARMNODPS-NEXT: add r0, r0, r1 311; CHECK-ARMNODPS-NEXT: cmp r0, #7 312; CHECK-ARMNODPS-NEXT: movge r0, #7 313; CHECK-ARMNODPS-NEXT: cmn r0, #8 314; CHECK-ARMNODPS-NEXT: mvnle r0, #7 315; CHECK-ARMNODPS-NEXT: bx lr 316; 317; CHECK-ARMBASEDSP-LABEL: func3: 318; CHECK-ARMBASEDSP: @ %bb.0: 319; CHECK-ARMBASEDSP-NEXT: lsl r0, r0, #28 320; CHECK-ARMBASEDSP-NEXT: lsl r1, r1, #28 321; CHECK-ARMBASEDSP-NEXT: qadd r0, r0, r1 322; CHECK-ARMBASEDSP-NEXT: asr r0, r0, #28 323; CHECK-ARMBASEDSP-NEXT: bx lr 324; 325; CHECK-ARMDSP-LABEL: func3: 326; CHECK-ARMDSP: @ %bb.0: 327; CHECK-ARMDSP-NEXT: lsl r0, r0, #28 328; CHECK-ARMDSP-NEXT: lsl r1, r1, #28 329; CHECK-ARMDSP-NEXT: qadd r0, r0, r1 330; CHECK-ARMDSP-NEXT: asr r0, r0, #28 331; CHECK-ARMDSP-NEXT: bx lr 332 %tmp = call i4 @llvm.sadd.sat.i4(i4 %x, i4 %y) 333 ret i4 %tmp 334} 335