xref: /llvm-project/llvm/test/CodeGen/ARM/register-scavenger-exceptions.mir (revision fae05692a36f9ebbd201d93c2a6b0f927564d7e6)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -o - %s -run-pass=prologepilog | FileCheck %s
3
4--- |
5  target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
6  target triple = "armv7--none-eabi"
7
8  define hidden void @_Z3foov(i32 %P0, ...) {
9  entry:
10    %V1 = alloca [4075 x i8], align 8
11    %tmp3 = alloca i8, i32 undef, align 8
12    unreachable
13  }
14
15  declare dso_local void @_Z3barv() noreturn
16
17...
18---
19# Check that the register scavenger does pick r5 (not preserved in prolog) for
20# materialising a stack frame address when the function ends in throwing an
21# exception.
22name:            _Z3foov
23stack:
24  - { id: 0, name: V1, type: default, offset: 0, size: 5000, alignment: 8,
25      stack-id: default, callee-saved-register: '', callee-saved-restored: true,
26      local-offset: -4080, debug-info-variable: '', debug-info-expression: '',
27      debug-info-location: '' }
28  - { id: 1, name: tmp3, type: variable-sized, offset: 0, alignment: 1,
29      stack-id: default, callee-saved-register: '', callee-saved-restored: true,
30      local-offset: -4112, debug-info-variable: '', debug-info-expression: '',
31      debug-info-location: '' }
32  - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
33      stack-id: default, callee-saved-register: '', callee-saved-restored: true,
34      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
35body:             |
36  bb.0.entry:
37
38    ; CHECK-LABEL: name: _Z3foov
39    ; CHECK: $sp = frame-setup STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r4, killed $r10, killed $r11, killed $lr
40    ; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 16
41    ; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -4
42    ; CHECK: frame-setup CFI_INSTRUCTION offset $r11, -8
43    ; CHECK: frame-setup CFI_INSTRUCTION offset $r10, -12
44    ; CHECK: frame-setup CFI_INSTRUCTION offset $r4, -16
45    ; CHECK: $r11 = frame-setup ADDri killed $sp, 8, 14 /* CC::al */, $noreg, $noreg
46    ; CHECK: frame-setup CFI_INSTRUCTION def_cfa $r11, 8
47    ; CHECK: $sp = frame-setup SUBri killed $sp, 912, 14 /* CC::al */, $noreg, $noreg
48    ; CHECK: $sp = frame-setup SUBri killed $sp, 4096, 14 /* CC::al */, $noreg, $noreg
49    ; CHECK: $r0 = MOVi 0, 14 /* CC::al */, $noreg, $noreg
50    ; CHECK: $r1 = MOVi 0, 14 /* CC::al */, $noreg, $noreg
51    ; CHECK: $r2 = MOVi 0, 14 /* CC::al */, $noreg, $noreg
52    ; CHECK: $r3 = MOVi 0, 14 /* CC::al */, $noreg, $noreg
53    ; CHECK: $r4 = MOVi 0, 14 /* CC::al */, $noreg, $noreg
54    ; CHECK: $r10 = SUBri killed $r11, 4096, 14 /* CC::al */, $noreg, $noreg
55    ; CHECK: STRi12 killed $lr, killed $r10, -916, 14 /* CC::al */, $noreg :: (store (s32) into %stack.2)
56    ; CHECK: BL @_Z3barv, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit killed $r1, implicit killed $r2, implicit killed $r3, implicit killed $r4, implicit-def $sp
57    $r0 = MOVi 0, 14, $noreg, $noreg
58    $r1 = MOVi 0, 14, $noreg, $noreg
59    $r2 = MOVi 0, 14, $noreg, $noreg
60    $r3 = MOVi 0, 14, $noreg, $noreg
61    $r4 = MOVi 0, 14, $noreg, $noreg
62    STRi12 killed $lr, %stack.2, 0, 14, $noreg :: (store (s32) into %stack.2)
63    BL @_Z3barv, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit killed $r1, implicit killed $r2, implicit killed $r3, implicit killed $r4, implicit-def $sp
64
65...
66