xref: /llvm-project/llvm/test/CodeGen/ARM/prefetch.ll (revision bed1c7f061aa12417aa081e334afdba45767b938)
1; RUN: llc -mtriple=thumb-eabi -mattr=-thumb2 %s -o - | FileCheck %s -check-prefix CHECK-T1
2; RUN: llc -mtriple=thumb-eabi -mattr=+v7 %s -o - | FileCheck %s -check-prefix=THUMB2
3; RUN: llc -mtriple=thumb-eabi -mattr=+v7 -mattr=+mp %s -o - | FileCheck %s -check-prefix=THUMB2-MP
4; RUN: llc -mtriple=arm-eabi -mattr=+v7 %s -o - | FileCheck %s -check-prefix=ARM
5; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a9 %s -o - | FileCheck %s -check-prefix=ARM-MP
6; rdar://8601536
7
8; CHECK-T1-NOT: pld
9
10define void @t1(ptr %ptr) nounwind  {
11entry:
12; ARM-LABEL: t1:
13; ARM-NOT: pldw [r0]
14; ARM: pld [r0]
15
16; ARM-MP-LABEL: t1:
17; ARM-MP: pldw [r0]
18; ARM-MP: pld [r0]
19
20; THUMB2-LABEL: t1:
21; THUMB2-NOT: pldw [r0]
22; THUMB2: pld [r0]
23  tail call void @llvm.prefetch( ptr %ptr, i32 1, i32 3, i32 1 )
24  tail call void @llvm.prefetch( ptr %ptr, i32 0, i32 3, i32 1 )
25  ret void
26}
27
28define void @t2(ptr %ptr) nounwind  {
29entry:
30; ARM-LABEL: t2:
31; ARM: pld [r0, #1023]
32
33; THUMB2-LABEL: t2:
34; THUMB2: pld [r0, #1023]
35  %tmp = getelementptr i8, ptr %ptr, i32 1023
36  tail call void @llvm.prefetch( ptr %tmp, i32 0, i32 3, i32 1 )
37  ret void
38}
39
40define void @t3(i32 %base, i32 %offset) nounwind  {
41entry:
42; ARM-LABEL: t3:
43; ARM: pld [r0, r1, lsr #2]
44
45; THUMB2-LABEL: t3:
46; THUMB2: lsrs r1, r1, #2
47; THUMB2: pld [r0, r1]
48  %tmp1 = lshr i32 %offset, 2
49  %tmp2 = add i32 %base, %tmp1
50  %tmp3 = inttoptr i32 %tmp2 to ptr
51  tail call void @llvm.prefetch( ptr %tmp3, i32 0, i32 3, i32 1 )
52  ret void
53}
54
55define void @t4(i32 %base, i32 %offset) nounwind  {
56entry:
57; ARM-LABEL: t4:
58; ARM: pld [r0, r1, lsl #2]
59
60; THUMB2-LABEL: t4:
61; THUMB2: pld [r0, r1, lsl #2]
62  %tmp1 = shl i32 %offset, 2
63  %tmp2 = add i32 %base, %tmp1
64  %tmp3 = inttoptr i32 %tmp2 to ptr
65  tail call void @llvm.prefetch( ptr %tmp3, i32 0, i32 3, i32 1 )
66  ret void
67}
68
69declare void @llvm.prefetch(ptr, i32, i32, i32) nounwind
70
71define void @t5(ptr %ptr) nounwind  {
72entry:
73; ARM-LABEL: t5:
74; ARM: pli [r0]
75
76; THUMB2-LABEL: t5:
77; THUMB2: pli [r0]
78  tail call void @llvm.prefetch( ptr %ptr, i32 0, i32 3, i32 0 )
79  ret void
80}
81
82define void @t6() {
83entry:
84;ARM-LABEL: t6:
85;ARM: pld [sp]
86;ARM: pld [sp, #50]
87;ARM: pld [sp, #-50]
88
89;THUMB2-LABEL: t6:
90;THUMB2: pld [sp]
91;THUMB2: pld [sp, #50]
92;THUMB2: pld [sp, #-50]
93
94%red = alloca [100 x i8], align 1
95%0 = getelementptr inbounds [100 x i8], ptr %red, i32 0, i32 50
96%1 = getelementptr inbounds [100 x i8], ptr %red, i32 0, i32 -50
97call void @llvm.prefetch(ptr %red, i32 0, i32 3, i32 1)
98call void @llvm.prefetch(ptr %0, i32 0, i32 3, i32 1)
99call void @llvm.prefetch(ptr %1, i32 0, i32 3, i32 1)
100ret void
101}
102
103define void @t7() {
104entry:
105;ARM-LABEL: t7:
106;ARM-MP: pldw [sp]
107;ARM-MP: pldw [sp, #50]
108;ARM-MP: pldw [sp, #-50]
109
110;THUMB2-MP-LABEL: t7:
111;THUMB2-MP: pldw [sp]
112;THUMB2-MP: pldw [sp, #50]
113;THUMB2-MP: pldw [sp, #-50]
114
115%red = alloca [100 x i8], align 1
116%0 = getelementptr inbounds [100 x i8], ptr %red, i32 0, i32 50
117%1 = getelementptr inbounds [100 x i8], ptr %red, i32 0, i32 -50
118call void @llvm.prefetch(ptr %red, i32 1, i32 3, i32 1)
119call void @llvm.prefetch(ptr %0, i32 1, i32 3, i32 1)
120call void @llvm.prefetch(ptr %1, i32 1, i32 3, i32 1)
121ret void
122}
123
124define void @t8() {
125entry:
126;ARM-LABEL: t8:
127;ARM: pli [sp]
128;ARM: pli [sp, #50]
129;ARM: pli [sp, #-50]
130
131;THUMB2-LABEL: t8:
132;THUMB2: pli [sp]
133;THUMB2: pli [sp, #50]
134;THUMB2: pli [sp, #-50]
135
136%red = alloca [100 x i8], align 1
137%0 = getelementptr inbounds [100 x i8], ptr %red, i32 0, i32 50
138%1 = getelementptr inbounds [100 x i8], ptr %red, i32 0, i32 -50
139call void @llvm.prefetch(ptr %red, i32 0, i32 3, i32 0)
140call void @llvm.prefetch(ptr %0, i32 0, i32 3, i32 0)
141call void @llvm.prefetch(ptr %1, i32 0, i32 3, i32 0)
142ret void
143}
144