xref: /llvm-project/llvm/test/CodeGen/ARM/pr59317.ll (revision ee31a4a7029f2f6fda5f416e7eb67ca3907d9e36)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=arm %s -o - | FileCheck --check-prefix=arm %s
3; RUN: llc -mtriple=armeb %s -o - | FileCheck --check-prefix=armeb %s
4
5define i1 @pr59317(i16 %F) {
6; arm-LABEL: pr59317:
7; arm:       @ %bb.0: @ %BB
8; arm-NEXT:    sub sp, sp, #8
9; arm-NEXT:    mov r0, #0
10; arm-NEXT:    add sp, sp, #8
11; arm-NEXT:    mov pc, lr
12;
13; armeb-LABEL: pr59317:
14; armeb:       @ %bb.0: @ %BB
15; armeb-NEXT:    sub sp, sp, #8
16; armeb-NEXT:    mov r0, #0
17; armeb-NEXT:    add sp, sp, #8
18; armeb-NEXT:    mov pc, lr
19BB:
20  %E = extractelement <1 x i16> <i16 -1>, i16 %F
21  %RP = alloca i64, align 8
22  %B = shl i16 %E, %E
23  %C1 = icmp ugt i16 %B, %F
24  ret i1 %C1
25}
26