xref: /llvm-project/llvm/test/CodeGen/ARM/pr32545.ll (revision bed1c7f061aa12417aa081e334afdba45767b938)
1; RUN: llc %s -o - | FileCheck %s
2
3target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
4target triple = "armv7--linux-gnueabi"
5
6; CHECK: vld1.16	{[[DREG:d[0-9]+]][0]}, {{.*}}
7; CHECK: vmovl.u8	[[QREG:q[0-9]+]], [[DREG]]
8; CHECK: vmovl.u16	[[QREG]], [[DREG]]
9
10define void @f(i32 %dstStride, ptr %indvars.iv, ptr %zz) {
11entry:
12  br label %for.body
13
14for.body:
15  %tmp = load <2 x i8>, ptr %zz, align 1
16  %tmp1 = extractelement <2 x i8> %tmp, i32 0
17  %.lhs.rhs = zext i8 %tmp1 to i32
18  call void @g(i32 %.lhs.rhs)
19  br label %for.body
20}
21
22declare void @g(i32)
23