xref: /llvm-project/llvm/test/CodeGen/ARM/no-fpu.ll (revision bed1c7f061aa12417aa081e334afdba45767b938)
1; RUN: llc < %s -mtriple=armv7-none-gnueabi -mattr=-neon,-fpregs | FileCheck --check-prefix=NONEON-NOVFP %s
2; RUN: llc < %s -mtriple=armv7-none-gnueabi -mattr=-neon | FileCheck --check-prefix=NONEON %s
3; RUN: llc < %s -mtriple=armv7-none-gnueabi -mattr=-fpregs | FileCheck --check-prefix=NOVFP %s
4; RUN: llc < %s -mtriple=armv7-none-gnueabi -mattr=-neon,+vfp2 | FileCheck --check-prefix=NONEON-VFP %s
5
6; Check no NEON instructions are selected when feature is disabled.
7define void @neonop(ptr nocapture readonly %a, ptr nocapture %b) #0 {
8  %wide.load = load <2 x i64>, ptr %a, align 8
9  ; NONEON-NOVFP-NOT: vld1.64
10  ; NONEON-NOT: vld1.64
11  %add = add <2 x i64> %wide.load, %wide.load
12  ; NONEON-NOVFP-NOT: vadd.i64
13  ; NONEON-NOT: vadd.i64
14  store <2 x i64> %add, ptr %b, align 8
15  ; NONEON-NOVFP-NOT: vst1.64
16  ; NONEON-NOT: vst1.64
17  ret void
18}
19
20; Likewise with VFP instructions.
21define double @fpmult(double %a, double %b) {
22  %res = fmul double %a, %b
23  ; NONEON-NOVFP-NOT: vmov
24  ; NONEON-NOVFP-NOT: vmul.f64
25  ; NOVFP-NOT: vmov
26  ; NOVFP-NOT: vmul.f64
27  ; NONEON-VFP: vmov
28  ; NONEON-VFP: vmul.f64
29  ret double %res
30}
31
32