xref: /llvm-project/llvm/test/CodeGen/ARM/minnum-maxnum-intrinsics.ll (revision e0ed0333f0fed2e73f805afd58b61176a87aa3ad) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=armv7 -mattr=+neon %s -o - | FileCheck %s --check-prefix=ARMV7
3; RUN: llc -mtriple=armv7 -mattr=+fp-armv8 %s -o - | FileCheck %s --check-prefix=ARMV8
4; RUN: llc -mtriple=armv8.2a -mattr=+fp-armv8 %s -o - | FileCheck %s --check-prefix=ARMV8
5; RUN: llc -mtriple=armv8.1m-none-none-eabi -mattr=+mve.fp,+fp64 %s -o - | FileCheck %s --check-prefix=ARMV8M
6
7declare float @llvm.minnum.f32(float, float)
8declare float @llvm.maxnum.f32(float, float)
9declare double @llvm.minnum.f64(double, double)
10declare double @llvm.maxnum.f64(double, double)
11declare <4 x float> @llvm.minnum.v4f32(<4 x float>, <4 x float>)
12declare <4 x float> @llvm.maxnum.v4f32(<4 x float>, <4 x float>)
13declare <2 x double> @llvm.minnum.v2f64(<2 x double>, <2 x double>)
14declare <2 x double> @llvm.maxnum.v2f64(<2 x double>, <2 x double>)
15
16define float @fminnum32_intrinsic(float %x, float %y) {
17; ARMV7-LABEL: fminnum32_intrinsic:
18; ARMV7:       @ %bb.0:
19; ARMV7-NEXT:    vmov s0, r1
20; ARMV7-NEXT:    vmov s2, r0
21; ARMV7-NEXT:    vcmp.f32 s2, s0
22; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
23; ARMV7-NEXT:    vmovlt.f32 s0, s2
24; ARMV7-NEXT:    vmov r0, s0
25; ARMV7-NEXT:    bx lr
26;
27; ARMV8-LABEL: fminnum32_intrinsic:
28; ARMV8:       @ %bb.0:
29; ARMV8-NEXT:    vmov s0, r1
30; ARMV8-NEXT:    vmov s2, r0
31; ARMV8-NEXT:    vminnm.f32 s0, s2, s0
32; ARMV8-NEXT:    vmov r0, s0
33; ARMV8-NEXT:    bx lr
34;
35; ARMV8M-LABEL: fminnum32_intrinsic:
36; ARMV8M:       @ %bb.0:
37; ARMV8M-NEXT:    vmov s0, r1
38; ARMV8M-NEXT:    vmov s2, r0
39; ARMV8M-NEXT:    vminnm.f32 s0, s2, s0
40; ARMV8M-NEXT:    vmov r0, s0
41; ARMV8M-NEXT:    bx lr
42  %a = call nnan float @llvm.minnum.f32(float %x, float %y)
43  ret float %a
44}
45
46define float @fminnum32_nsz_intrinsic(float %x, float %y) {
47; ARMV7-LABEL: fminnum32_nsz_intrinsic:
48; ARMV7:       @ %bb.0:
49; ARMV7-NEXT:    vmov s0, r1
50; ARMV7-NEXT:    vmov s2, r0
51; ARMV7-NEXT:    vmin.f32 d0, d1, d0
52; ARMV7-NEXT:    vmov r0, s0
53; ARMV7-NEXT:    bx lr
54;
55; ARMV8-LABEL: fminnum32_nsz_intrinsic:
56; ARMV8:       @ %bb.0:
57; ARMV8-NEXT:    vmov s0, r1
58; ARMV8-NEXT:    vmov s2, r0
59; ARMV8-NEXT:    vminnm.f32 s0, s2, s0
60; ARMV8-NEXT:    vmov r0, s0
61; ARMV8-NEXT:    bx lr
62;
63; ARMV8M-LABEL: fminnum32_nsz_intrinsic:
64; ARMV8M:       @ %bb.0:
65; ARMV8M-NEXT:    vmov s0, r1
66; ARMV8M-NEXT:    vmov s2, r0
67; ARMV8M-NEXT:    vminnm.f32 s0, s2, s0
68; ARMV8M-NEXT:    vmov r0, s0
69; ARMV8M-NEXT:    bx lr
70  %a = call nnan nsz float @llvm.minnum.f32(float %x, float %y)
71  ret float %a
72}
73
74define float @fminnum32_non_zero_intrinsic(float %x) {
75; ARMV7-LABEL: fminnum32_non_zero_intrinsic:
76; ARMV7:       @ %bb.0:
77; ARMV7-NEXT:    vmov.f32 s0, #-1.000000e+00
78; ARMV7-NEXT:    vmov s2, r0
79; ARMV7-NEXT:    vmin.f32 d0, d1, d0
80; ARMV7-NEXT:    vmov r0, s0
81; ARMV7-NEXT:    bx lr
82;
83; ARMV8-LABEL: fminnum32_non_zero_intrinsic:
84; ARMV8:       @ %bb.0:
85; ARMV8-NEXT:    vmov.f32 s0, #-1.000000e+00
86; ARMV8-NEXT:    vmov s2, r0
87; ARMV8-NEXT:    vminnm.f32 s0, s2, s0
88; ARMV8-NEXT:    vmov r0, s0
89; ARMV8-NEXT:    bx lr
90;
91; ARMV8M-LABEL: fminnum32_non_zero_intrinsic:
92; ARMV8M:       @ %bb.0:
93; ARMV8M-NEXT:    vmov.f32 s0, #-1.000000e+00
94; ARMV8M-NEXT:    vmov s2, r0
95; ARMV8M-NEXT:    vminnm.f32 s0, s2, s0
96; ARMV8M-NEXT:    vmov r0, s0
97; ARMV8M-NEXT:    bx lr
98  %a = call nnan float @llvm.minnum.f32(float %x, float -1.0)
99  ret float %a
100}
101
102define float @fmaxnum32_intrinsic(float %x, float %y) {
103; ARMV7-LABEL: fmaxnum32_intrinsic:
104; ARMV7:       @ %bb.0:
105; ARMV7-NEXT:    vmov s0, r1
106; ARMV7-NEXT:    vmov s2, r0
107; ARMV7-NEXT:    vcmp.f32 s2, s0
108; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
109; ARMV7-NEXT:    vmovgt.f32 s0, s2
110; ARMV7-NEXT:    vmov r0, s0
111; ARMV7-NEXT:    bx lr
112;
113; ARMV8-LABEL: fmaxnum32_intrinsic:
114; ARMV8:       @ %bb.0:
115; ARMV8-NEXT:    vmov s0, r1
116; ARMV8-NEXT:    vmov s2, r0
117; ARMV8-NEXT:    vmaxnm.f32 s0, s2, s0
118; ARMV8-NEXT:    vmov r0, s0
119; ARMV8-NEXT:    bx lr
120;
121; ARMV8M-LABEL: fmaxnum32_intrinsic:
122; ARMV8M:       @ %bb.0:
123; ARMV8M-NEXT:    vmov s0, r1
124; ARMV8M-NEXT:    vmov s2, r0
125; ARMV8M-NEXT:    vmaxnm.f32 s0, s2, s0
126; ARMV8M-NEXT:    vmov r0, s0
127; ARMV8M-NEXT:    bx lr
128  %a = call nnan float @llvm.maxnum.f32(float %x, float %y)
129  ret float %a
130}
131
132define float @fmaxnum32_nsz_intrinsic(float %x, float %y) {
133; ARMV7-LABEL: fmaxnum32_nsz_intrinsic:
134; ARMV7:       @ %bb.0:
135; ARMV7-NEXT:    vmov s0, r1
136; ARMV7-NEXT:    vmov s2, r0
137; ARMV7-NEXT:    vmax.f32 d0, d1, d0
138; ARMV7-NEXT:    vmov r0, s0
139; ARMV7-NEXT:    bx lr
140;
141; ARMV8-LABEL: fmaxnum32_nsz_intrinsic:
142; ARMV8:       @ %bb.0:
143; ARMV8-NEXT:    vmov s0, r1
144; ARMV8-NEXT:    vmov s2, r0
145; ARMV8-NEXT:    vmaxnm.f32 s0, s2, s0
146; ARMV8-NEXT:    vmov r0, s0
147; ARMV8-NEXT:    bx lr
148;
149; ARMV8M-LABEL: fmaxnum32_nsz_intrinsic:
150; ARMV8M:       @ %bb.0:
151; ARMV8M-NEXT:    vmov s0, r1
152; ARMV8M-NEXT:    vmov s2, r0
153; ARMV8M-NEXT:    vmaxnm.f32 s0, s2, s0
154; ARMV8M-NEXT:    vmov r0, s0
155; ARMV8M-NEXT:    bx lr
156  %a = call nnan nsz float @llvm.maxnum.f32(float %x, float %y)
157  ret float %a
158}
159
160define float @fmaxnum32_zero_intrinsic(float %x) {
161; ARMV7-LABEL: fmaxnum32_zero_intrinsic:
162; ARMV7:       @ %bb.0:
163; ARMV7-NEXT:    vmov s0, r0
164; ARMV7-NEXT:    vldr s2, .LCPI5_0
165; ARMV7-NEXT:    vcmp.f32 s0, #0
166; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
167; ARMV7-NEXT:    vmovgt.f32 s2, s0
168; ARMV7-NEXT:    vmov r0, s2
169; ARMV7-NEXT:    bx lr
170; ARMV7-NEXT:    .p2align 2
171; ARMV7-NEXT:  @ %bb.1:
172; ARMV7-NEXT:  .LCPI5_0:
173; ARMV7-NEXT:    .long 0x00000000 @ float 0
174;
175; ARMV8-LABEL: fmaxnum32_zero_intrinsic:
176; ARMV8:       @ %bb.0:
177; ARMV8-NEXT:    vldr s0, .LCPI5_0
178; ARMV8-NEXT:    vmov s2, r0
179; ARMV8-NEXT:    vmaxnm.f32 s0, s2, s0
180; ARMV8-NEXT:    vmov r0, s0
181; ARMV8-NEXT:    bx lr
182; ARMV8-NEXT:    .p2align 2
183; ARMV8-NEXT:  @ %bb.1:
184; ARMV8-NEXT:  .LCPI5_0:
185; ARMV8-NEXT:    .long 0x00000000 @ float 0
186;
187; ARMV8M-LABEL: fmaxnum32_zero_intrinsic:
188; ARMV8M:       @ %bb.0:
189; ARMV8M-NEXT:    vldr s0, .LCPI5_0
190; ARMV8M-NEXT:    vmov s2, r0
191; ARMV8M-NEXT:    vmaxnm.f32 s0, s2, s0
192; ARMV8M-NEXT:    vmov r0, s0
193; ARMV8M-NEXT:    bx lr
194; ARMV8M-NEXT:    .p2align 2
195; ARMV8M-NEXT:  @ %bb.1:
196; ARMV8M-NEXT:  .LCPI5_0:
197; ARMV8M-NEXT:    .long 0x00000000 @ float 0
198  %a = call nnan float @llvm.maxnum.f32(float %x, float 0.0)
199  ret float %a
200}
201
202define float @fmaxnum32_non_zero_intrinsic(float %x) {
203; ARMV7-LABEL: fmaxnum32_non_zero_intrinsic:
204; ARMV7:       @ %bb.0:
205; ARMV7-NEXT:    vmov.f32 s0, #1.000000e+00
206; ARMV7-NEXT:    vmov s2, r0
207; ARMV7-NEXT:    vmax.f32 d0, d1, d0
208; ARMV7-NEXT:    vmov r0, s0
209; ARMV7-NEXT:    bx lr
210;
211; ARMV8-LABEL: fmaxnum32_non_zero_intrinsic:
212; ARMV8:       @ %bb.0:
213; ARMV8-NEXT:    vmov.f32 s0, #1.000000e+00
214; ARMV8-NEXT:    vmov s2, r0
215; ARMV8-NEXT:    vmaxnm.f32 s0, s2, s0
216; ARMV8-NEXT:    vmov r0, s0
217; ARMV8-NEXT:    bx lr
218;
219; ARMV8M-LABEL: fmaxnum32_non_zero_intrinsic:
220; ARMV8M:       @ %bb.0:
221; ARMV8M-NEXT:    vmov.f32 s0, #1.000000e+00
222; ARMV8M-NEXT:    vmov s2, r0
223; ARMV8M-NEXT:    vmaxnm.f32 s0, s2, s0
224; ARMV8M-NEXT:    vmov r0, s0
225; ARMV8M-NEXT:    bx lr
226  %a = call nnan float @llvm.maxnum.f32(float %x, float 1.0)
227  ret float %a
228}
229
230define double @fminnum64_intrinsic(double %x, double %y) {
231; ARMV7-LABEL: fminnum64_intrinsic:
232; ARMV7:       @ %bb.0:
233; ARMV7-NEXT:    vmov d16, r2, r3
234; ARMV7-NEXT:    vmov d17, r0, r1
235; ARMV7-NEXT:    vcmp.f64 d17, d16
236; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
237; ARMV7-NEXT:    vmovlt.f64 d16, d17
238; ARMV7-NEXT:    vmov r0, r1, d16
239; ARMV7-NEXT:    bx lr
240;
241; ARMV8-LABEL: fminnum64_intrinsic:
242; ARMV8:       @ %bb.0:
243; ARMV8-NEXT:    vmov d16, r2, r3
244; ARMV8-NEXT:    vmov d17, r0, r1
245; ARMV8-NEXT:    vminnm.f64 d16, d17, d16
246; ARMV8-NEXT:    vmov r0, r1, d16
247; ARMV8-NEXT:    bx lr
248;
249; ARMV8M-LABEL: fminnum64_intrinsic:
250; ARMV8M:       @ %bb.0:
251; ARMV8M-NEXT:    vmov d0, r2, r3
252; ARMV8M-NEXT:    vmov d1, r0, r1
253; ARMV8M-NEXT:    vminnm.f64 d0, d1, d0
254; ARMV8M-NEXT:    vmov r0, r1, d0
255; ARMV8M-NEXT:    bx lr
256  %a = call nnan double @llvm.minnum.f64(double %x, double %y)
257  ret double %a
258}
259
260define double @fminnum64_nsz_intrinsic(double %x, double %y) {
261; ARMV7-LABEL: fminnum64_nsz_intrinsic:
262; ARMV7:       @ %bb.0:
263; ARMV7-NEXT:    vmov d16, r2, r3
264; ARMV7-NEXT:    vmov d17, r0, r1
265; ARMV7-NEXT:    vcmp.f64 d17, d16
266; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
267; ARMV7-NEXT:    vmovlt.f64 d16, d17
268; ARMV7-NEXT:    vmov r0, r1, d16
269; ARMV7-NEXT:    bx lr
270;
271; ARMV8-LABEL: fminnum64_nsz_intrinsic:
272; ARMV8:       @ %bb.0:
273; ARMV8-NEXT:    vmov d16, r2, r3
274; ARMV8-NEXT:    vmov d17, r0, r1
275; ARMV8-NEXT:    vminnm.f64 d16, d17, d16
276; ARMV8-NEXT:    vmov r0, r1, d16
277; ARMV8-NEXT:    bx lr
278;
279; ARMV8M-LABEL: fminnum64_nsz_intrinsic:
280; ARMV8M:       @ %bb.0:
281; ARMV8M-NEXT:    vmov d0, r2, r3
282; ARMV8M-NEXT:    vmov d1, r0, r1
283; ARMV8M-NEXT:    vminnm.f64 d0, d1, d0
284; ARMV8M-NEXT:    vmov r0, r1, d0
285; ARMV8M-NEXT:    bx lr
286  %a = call nnan nsz double @llvm.minnum.f64(double %x, double %y)
287  ret double %a
288}
289
290define double @fminnum64_zero_intrinsic(double %x) {
291; ARMV7-LABEL: fminnum64_zero_intrinsic:
292; ARMV7:       @ %bb.0:
293; ARMV7-NEXT:    vldr d16, .LCPI9_0
294; ARMV7-NEXT:    vmov d17, r0, r1
295; ARMV7-NEXT:    vcmp.f64 d17, d16
296; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
297; ARMV7-NEXT:    vmovlt.f64 d16, d17
298; ARMV7-NEXT:    vmov r0, r1, d16
299; ARMV7-NEXT:    bx lr
300; ARMV7-NEXT:    .p2align 3
301; ARMV7-NEXT:  @ %bb.1:
302; ARMV7-NEXT:  .LCPI9_0:
303; ARMV7-NEXT:    .long 0 @ double -0
304; ARMV7-NEXT:    .long 2147483648
305;
306; ARMV8-LABEL: fminnum64_zero_intrinsic:
307; ARMV8:       @ %bb.0:
308; ARMV8-NEXT:    vldr d16, .LCPI9_0
309; ARMV8-NEXT:    vmov d17, r0, r1
310; ARMV8-NEXT:    vminnm.f64 d16, d17, d16
311; ARMV8-NEXT:    vmov r0, r1, d16
312; ARMV8-NEXT:    bx lr
313; ARMV8-NEXT:    .p2align 3
314; ARMV8-NEXT:  @ %bb.1:
315; ARMV8-NEXT:  .LCPI9_0:
316; ARMV8-NEXT:    .long 0 @ double -0
317; ARMV8-NEXT:    .long 2147483648
318;
319; ARMV8M-LABEL: fminnum64_zero_intrinsic:
320; ARMV8M:       @ %bb.0:
321; ARMV8M-NEXT:    vldr d0, .LCPI9_0
322; ARMV8M-NEXT:    vmov d1, r0, r1
323; ARMV8M-NEXT:    vminnm.f64 d0, d1, d0
324; ARMV8M-NEXT:    vmov r0, r1, d0
325; ARMV8M-NEXT:    bx lr
326; ARMV8M-NEXT:    .p2align 3
327; ARMV8M-NEXT:  @ %bb.1:
328; ARMV8M-NEXT:  .LCPI9_0:
329; ARMV8M-NEXT:    .long 0 @ double -0
330; ARMV8M-NEXT:    .long 2147483648
331  %a = call nnan double @llvm.minnum.f64(double %x, double -0.0)
332  ret double %a
333}
334
335define double @fminnum64_non_zero_intrinsic(double %x) {
336; ARMV7-LABEL: fminnum64_non_zero_intrinsic:
337; ARMV7:       @ %bb.0:
338; ARMV7-NEXT:    vmov.f64 d16, #-1.000000e+00
339; ARMV7-NEXT:    vmov d17, r0, r1
340; ARMV7-NEXT:    vcmp.f64 d17, d16
341; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
342; ARMV7-NEXT:    vmovlt.f64 d16, d17
343; ARMV7-NEXT:    vmov r0, r1, d16
344; ARMV7-NEXT:    bx lr
345;
346; ARMV8-LABEL: fminnum64_non_zero_intrinsic:
347; ARMV8:       @ %bb.0:
348; ARMV8-NEXT:    vmov.f64 d16, #-1.000000e+00
349; ARMV8-NEXT:    vmov d17, r0, r1
350; ARMV8-NEXT:    vminnm.f64 d16, d17, d16
351; ARMV8-NEXT:    vmov r0, r1, d16
352; ARMV8-NEXT:    bx lr
353;
354; ARMV8M-LABEL: fminnum64_non_zero_intrinsic:
355; ARMV8M:       @ %bb.0:
356; ARMV8M-NEXT:    vmov.f64 d0, #-1.000000e+00
357; ARMV8M-NEXT:    vmov d1, r0, r1
358; ARMV8M-NEXT:    vminnm.f64 d0, d1, d0
359; ARMV8M-NEXT:    vmov r0, r1, d0
360; ARMV8M-NEXT:    bx lr
361  %a = call nnan double @llvm.minnum.f64(double %x, double -1.0)
362  ret double %a
363}
364
365define double@fmaxnum64_intrinsic(double %x, double %y) {
366; ARMV7-LABEL: fmaxnum64_intrinsic:
367; ARMV7:       @ %bb.0:
368; ARMV7-NEXT:    vmov d16, r2, r3
369; ARMV7-NEXT:    vmov d17, r0, r1
370; ARMV7-NEXT:    vcmp.f64 d17, d16
371; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
372; ARMV7-NEXT:    vmovgt.f64 d16, d17
373; ARMV7-NEXT:    vmov r0, r1, d16
374; ARMV7-NEXT:    bx lr
375;
376; ARMV8-LABEL: fmaxnum64_intrinsic:
377; ARMV8:       @ %bb.0:
378; ARMV8-NEXT:    vmov d16, r2, r3
379; ARMV8-NEXT:    vmov d17, r0, r1
380; ARMV8-NEXT:    vmaxnm.f64 d16, d17, d16
381; ARMV8-NEXT:    vmov r0, r1, d16
382; ARMV8-NEXT:    bx lr
383;
384; ARMV8M-LABEL: fmaxnum64_intrinsic:
385; ARMV8M:       @ %bb.0:
386; ARMV8M-NEXT:    vmov d0, r2, r3
387; ARMV8M-NEXT:    vmov d1, r0, r1
388; ARMV8M-NEXT:    vmaxnm.f64 d0, d1, d0
389; ARMV8M-NEXT:    vmov r0, r1, d0
390; ARMV8M-NEXT:    bx lr
391  %a = call nnan double @llvm.maxnum.f64(double %x, double %y)
392  ret double %a
393}
394
395define double@fmaxnum64_nsz_intrinsic(double %x, double %y) {
396; ARMV7-LABEL: fmaxnum64_nsz_intrinsic:
397; ARMV7:       @ %bb.0:
398; ARMV7-NEXT:    vmov d16, r2, r3
399; ARMV7-NEXT:    vmov d17, r0, r1
400; ARMV7-NEXT:    vcmp.f64 d17, d16
401; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
402; ARMV7-NEXT:    vmovgt.f64 d16, d17
403; ARMV7-NEXT:    vmov r0, r1, d16
404; ARMV7-NEXT:    bx lr
405;
406; ARMV8-LABEL: fmaxnum64_nsz_intrinsic:
407; ARMV8:       @ %bb.0:
408; ARMV8-NEXT:    vmov d16, r2, r3
409; ARMV8-NEXT:    vmov d17, r0, r1
410; ARMV8-NEXT:    vmaxnm.f64 d16, d17, d16
411; ARMV8-NEXT:    vmov r0, r1, d16
412; ARMV8-NEXT:    bx lr
413;
414; ARMV8M-LABEL: fmaxnum64_nsz_intrinsic:
415; ARMV8M:       @ %bb.0:
416; ARMV8M-NEXT:    vmov d0, r2, r3
417; ARMV8M-NEXT:    vmov d1, r0, r1
418; ARMV8M-NEXT:    vmaxnm.f64 d0, d1, d0
419; ARMV8M-NEXT:    vmov r0, r1, d0
420; ARMV8M-NEXT:    bx lr
421  %a = call nnan nsz double @llvm.maxnum.f64(double %x, double %y)
422  ret double %a
423}
424
425define double @fmaxnum64_zero_intrinsic(double %x) {
426; ARMV7-LABEL: fmaxnum64_zero_intrinsic:
427; ARMV7:       @ %bb.0:
428; ARMV7-NEXT:    vmov d16, r0, r1
429; ARMV7-NEXT:    vcmp.f64 d16, #0
430; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
431; ARMV7-NEXT:    vmov.i32 d17, #0x0
432; ARMV7-NEXT:    vmovgt.f64 d17, d16
433; ARMV7-NEXT:    vmov r0, r1, d17
434; ARMV7-NEXT:    bx lr
435;
436; ARMV8-LABEL: fmaxnum64_zero_intrinsic:
437; ARMV8:       @ %bb.0:
438; ARMV8-NEXT:    vmov.i32 d16, #0x0
439; ARMV8-NEXT:    vmov d17, r0, r1
440; ARMV8-NEXT:    vmaxnm.f64 d16, d17, d16
441; ARMV8-NEXT:    vmov r0, r1, d16
442; ARMV8-NEXT:    bx lr
443;
444; ARMV8M-LABEL: fmaxnum64_zero_intrinsic:
445; ARMV8M:       @ %bb.0:
446; ARMV8M-NEXT:    vldr d0, .LCPI13_0
447; ARMV8M-NEXT:    vmov d1, r0, r1
448; ARMV8M-NEXT:    vmaxnm.f64 d0, d1, d0
449; ARMV8M-NEXT:    vmov r0, r1, d0
450; ARMV8M-NEXT:    bx lr
451; ARMV8M-NEXT:    .p2align 3
452; ARMV8M-NEXT:  @ %bb.1:
453; ARMV8M-NEXT:  .LCPI13_0:
454; ARMV8M-NEXT:    .long 0 @ double 0
455; ARMV8M-NEXT:    .long 0
456  %a = call nnan double @llvm.maxnum.f64(double %x, double 0.0)
457  ret double %a
458}
459
460define double @fmaxnum64_non_zero_intrinsic(double %x) {
461; ARMV7-LABEL: fmaxnum64_non_zero_intrinsic:
462; ARMV7:       @ %bb.0:
463; ARMV7-NEXT:    vmov.f64 d16, #1.000000e+00
464; ARMV7-NEXT:    vmov d17, r0, r1
465; ARMV7-NEXT:    vcmp.f64 d17, d16
466; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
467; ARMV7-NEXT:    vmovgt.f64 d16, d17
468; ARMV7-NEXT:    vmov r0, r1, d16
469; ARMV7-NEXT:    bx lr
470;
471; ARMV8-LABEL: fmaxnum64_non_zero_intrinsic:
472; ARMV8:       @ %bb.0:
473; ARMV8-NEXT:    vmov.f64 d16, #1.000000e+00
474; ARMV8-NEXT:    vmov d17, r0, r1
475; ARMV8-NEXT:    vmaxnm.f64 d16, d17, d16
476; ARMV8-NEXT:    vmov r0, r1, d16
477; ARMV8-NEXT:    bx lr
478;
479; ARMV8M-LABEL: fmaxnum64_non_zero_intrinsic:
480; ARMV8M:       @ %bb.0:
481; ARMV8M-NEXT:    vmov.f64 d0, #1.000000e+00
482; ARMV8M-NEXT:    vmov d1, r0, r1
483; ARMV8M-NEXT:    vmaxnm.f64 d0, d1, d0
484; ARMV8M-NEXT:    vmov r0, r1, d0
485; ARMV8M-NEXT:    bx lr
486  %a = call nnan double @llvm.maxnum.f64(double %x, double 1.0)
487  ret double %a
488}
489
490define <4 x float> @fminnumv432_intrinsic(<4 x float> %x, <4 x float> %y) {
491; ARMV7-LABEL: fminnumv432_intrinsic:
492; ARMV7:       @ %bb.0:
493; ARMV7-NEXT:    mov r12, sp
494; ARMV7-NEXT:    vld1.64 {d0, d1}, [r12]
495; ARMV7-NEXT:    vmov d3, r2, r3
496; ARMV7-NEXT:    vmov d2, r0, r1
497; ARMV7-NEXT:    vcmp.f32 s6, s2
498; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
499; ARMV7-NEXT:    vcmp.f32 s7, s3
500; ARMV7-NEXT:    vmovlt.f32 s2, s6
501; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
502; ARMV7-NEXT:    vcmp.f32 s5, s1
503; ARMV7-NEXT:    vmovlt.f32 s3, s7
504; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
505; ARMV7-NEXT:    vcmp.f32 s4, s0
506; ARMV7-NEXT:    vmovlt.f32 s1, s5
507; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
508; ARMV7-NEXT:    vmovlt.f32 s0, s4
509; ARMV7-NEXT:    vmov r2, r3, d1
510; ARMV7-NEXT:    vmov r0, r1, d0
511; ARMV7-NEXT:    bx lr
512;
513; ARMV8-LABEL: fminnumv432_intrinsic:
514; ARMV8:       @ %bb.0:
515; ARMV8-NEXT:    vmov d17, r2, r3
516; ARMV8-NEXT:    vmov d16, r0, r1
517; ARMV8-NEXT:    mov r0, sp
518; ARMV8-NEXT:    vld1.64 {d18, d19}, [r0]
519; ARMV8-NEXT:    vminnm.f32 q8, q8, q9
520; ARMV8-NEXT:    vmov r0, r1, d16
521; ARMV8-NEXT:    vmov r2, r3, d17
522; ARMV8-NEXT:    bx lr
523;
524; ARMV8M-LABEL: fminnumv432_intrinsic:
525; ARMV8M:       @ %bb.0:
526; ARMV8M-NEXT:    vmov d0, r0, r1
527; ARMV8M-NEXT:    mov r0, sp
528; ARMV8M-NEXT:    vldrw.u32 q1, [r0]
529; ARMV8M-NEXT:    vmov d1, r2, r3
530; ARMV8M-NEXT:    vminnm.f32 q0, q0, q1
531; ARMV8M-NEXT:    vmov r0, r1, d0
532; ARMV8M-NEXT:    vmov r2, r3, d1
533; ARMV8M-NEXT:    bx lr
534  %a = call nnan <4 x float> @llvm.minnum.v4f32(<4 x float> %x, <4 x float> %y)
535  ret <4 x float> %a
536}
537
538define <4 x float> @fminnumv432_nsz_intrinsic(<4 x float> %x, <4 x float> %y) {
539; ARMV7-LABEL: fminnumv432_nsz_intrinsic:
540; ARMV7:       @ %bb.0:
541; ARMV7-NEXT:    vmov d17, r2, r3
542; ARMV7-NEXT:    vmov d16, r0, r1
543; ARMV7-NEXT:    mov r0, sp
544; ARMV7-NEXT:    vld1.64 {d18, d19}, [r0]
545; ARMV7-NEXT:    vmin.f32 q8, q8, q9
546; ARMV7-NEXT:    vmov r0, r1, d16
547; ARMV7-NEXT:    vmov r2, r3, d17
548; ARMV7-NEXT:    bx lr
549;
550; ARMV8-LABEL: fminnumv432_nsz_intrinsic:
551; ARMV8:       @ %bb.0:
552; ARMV8-NEXT:    vmov d17, r2, r3
553; ARMV8-NEXT:    vmov d16, r0, r1
554; ARMV8-NEXT:    mov r0, sp
555; ARMV8-NEXT:    vld1.64 {d18, d19}, [r0]
556; ARMV8-NEXT:    vminnm.f32 q8, q8, q9
557; ARMV8-NEXT:    vmov r0, r1, d16
558; ARMV8-NEXT:    vmov r2, r3, d17
559; ARMV8-NEXT:    bx lr
560;
561; ARMV8M-LABEL: fminnumv432_nsz_intrinsic:
562; ARMV8M:       @ %bb.0:
563; ARMV8M-NEXT:    vmov d0, r0, r1
564; ARMV8M-NEXT:    mov r0, sp
565; ARMV8M-NEXT:    vldrw.u32 q1, [r0]
566; ARMV8M-NEXT:    vmov d1, r2, r3
567; ARMV8M-NEXT:    vminnm.f32 q0, q0, q1
568; ARMV8M-NEXT:    vmov r0, r1, d0
569; ARMV8M-NEXT:    vmov r2, r3, d1
570; ARMV8M-NEXT:    bx lr
571  %a = call nnan nsz <4 x float> @llvm.minnum.v4f32(<4 x float> %x, <4 x float> %y)
572  ret <4 x float> %a
573}
574
575define <4 x float> @fminnumv432_non_zero_intrinsic(<4 x float> %x) {
576; ARMV7-LABEL: fminnumv432_non_zero_intrinsic:
577; ARMV7:       @ %bb.0:
578; ARMV7-NEXT:    vmov d19, r2, r3
579; ARMV7-NEXT:    vmov.f32 q8, #-1.000000e+00
580; ARMV7-NEXT:    vmov d18, r0, r1
581; ARMV7-NEXT:    vmin.f32 q8, q9, q8
582; ARMV7-NEXT:    vmov r0, r1, d16
583; ARMV7-NEXT:    vmov r2, r3, d17
584; ARMV7-NEXT:    bx lr
585;
586; ARMV8-LABEL: fminnumv432_non_zero_intrinsic:
587; ARMV8:       @ %bb.0:
588; ARMV8-NEXT:    vmov d17, r2, r3
589; ARMV8-NEXT:    vmov d16, r0, r1
590; ARMV8-NEXT:    vmov.f32 q9, #-1.000000e+00
591; ARMV8-NEXT:    vminnm.f32 q8, q8, q9
592; ARMV8-NEXT:    vmov r0, r1, d16
593; ARMV8-NEXT:    vmov r2, r3, d17
594; ARMV8-NEXT:    bx lr
595;
596; ARMV8M-LABEL: fminnumv432_non_zero_intrinsic:
597; ARMV8M:       @ %bb.0:
598; ARMV8M-NEXT:    vmov d1, r2, r3
599; ARMV8M-NEXT:    vmov.f32 q1, #-1.000000e+00
600; ARMV8M-NEXT:    vmov d0, r0, r1
601; ARMV8M-NEXT:    vminnm.f32 q0, q0, q1
602; ARMV8M-NEXT:    vmov r0, r1, d0
603; ARMV8M-NEXT:    vmov r2, r3, d1
604; ARMV8M-NEXT:    bx lr
605  %a = call nnan <4 x float> @llvm.minnum.v4f32(<4 x float> %x, <4 x float><float -1.0, float -1.0, float -1.0, float -1.0>)
606  ret <4 x float> %a
607}
608
609define <4 x float> @fminnumv432_one_zero_intrinsic(<4 x float> %x) {
610; ARMV7-LABEL: fminnumv432_one_zero_intrinsic:
611; ARMV7:       @ %bb.0:
612; ARMV7-NEXT:    vmov d1, r2, r3
613; ARMV7-NEXT:    vldr s8, .LCPI18_0
614; ARMV7-NEXT:    vmov d0, r0, r1
615; ARMV7-NEXT:    vmov.f32 s10, #-1.000000e+00
616; ARMV7-NEXT:    vcmp.f32 s1, #0
617; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
618; ARMV7-NEXT:    vmov.f32 s4, s3
619; ARMV7-NEXT:    vmin.f32 d6, d2, d5
620; ARMV7-NEXT:    vmin.f32 d3, d1, d5
621; ARMV7-NEXT:    vmin.f32 d2, d0, d5
622; ARMV7-NEXT:    vmovlt.f32 s8, s1
623; ARMV7-NEXT:    vmov.f32 s5, s8
624; ARMV7-NEXT:    vmov.f32 s7, s12
625; ARMV7-NEXT:    vmov r0, r1, d2
626; ARMV7-NEXT:    vmov r2, r3, d3
627; ARMV7-NEXT:    bx lr
628; ARMV7-NEXT:    .p2align 2
629; ARMV7-NEXT:  @ %bb.1:
630; ARMV7-NEXT:  .LCPI18_0:
631; ARMV7-NEXT:    .long 0x00000000 @ float 0
632;
633; ARMV8-LABEL: fminnumv432_one_zero_intrinsic:
634; ARMV8:       @ %bb.0:
635; ARMV8-NEXT:    vmov d17, r2, r3
636; ARMV8-NEXT:    vmov d16, r0, r1
637; ARMV8-NEXT:    adr r0, .LCPI18_0
638; ARMV8-NEXT:    vld1.64 {d18, d19}, [r0:128]
639; ARMV8-NEXT:    vminnm.f32 q8, q8, q9
640; ARMV8-NEXT:    vmov r0, r1, d16
641; ARMV8-NEXT:    vmov r2, r3, d17
642; ARMV8-NEXT:    bx lr
643; ARMV8-NEXT:    .p2align 4
644; ARMV8-NEXT:  @ %bb.1:
645; ARMV8-NEXT:  .LCPI18_0:
646; ARMV8-NEXT:    .long 0xbf800000 @ float -1
647; ARMV8-NEXT:    .long 0x00000000 @ float 0
648; ARMV8-NEXT:    .long 0xbf800000 @ float -1
649; ARMV8-NEXT:    .long 0xbf800000 @ float -1
650;
651; ARMV8M-LABEL: fminnumv432_one_zero_intrinsic:
652; ARMV8M:       @ %bb.0:
653; ARMV8M-NEXT:    vmov d0, r0, r1
654; ARMV8M-NEXT:    adr r0, .LCPI18_0
655; ARMV8M-NEXT:    vldrw.u32 q1, [r0]
656; ARMV8M-NEXT:    vmov d1, r2, r3
657; ARMV8M-NEXT:    vminnm.f32 q0, q0, q1
658; ARMV8M-NEXT:    vmov r0, r1, d0
659; ARMV8M-NEXT:    vmov r2, r3, d1
660; ARMV8M-NEXT:    bx lr
661; ARMV8M-NEXT:    .p2align 4
662; ARMV8M-NEXT:  @ %bb.1:
663; ARMV8M-NEXT:  .LCPI18_0:
664; ARMV8M-NEXT:    .long 0xbf800000 @ float -1
665; ARMV8M-NEXT:    .long 0x00000000 @ float 0
666; ARMV8M-NEXT:    .long 0xbf800000 @ float -1
667; ARMV8M-NEXT:    .long 0xbf800000 @ float -1
668  %a = call nnan <4 x float> @llvm.minnum.v4f32(<4 x float> %x, <4 x float><float -1.0, float 0.0, float -1.0, float -1.0>)
669  ret <4 x float> %a
670}
671
672define <4 x float> @fmaxnumv432_intrinsic(<4 x float> %x, <4 x float> %y) {
673; ARMV7-LABEL: fmaxnumv432_intrinsic:
674; ARMV7:       @ %bb.0:
675; ARMV7-NEXT:    mov r12, sp
676; ARMV7-NEXT:    vld1.64 {d0, d1}, [r12]
677; ARMV7-NEXT:    vmov d3, r2, r3
678; ARMV7-NEXT:    vmov d2, r0, r1
679; ARMV7-NEXT:    vcmp.f32 s6, s2
680; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
681; ARMV7-NEXT:    vcmp.f32 s7, s3
682; ARMV7-NEXT:    vmovgt.f32 s2, s6
683; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
684; ARMV7-NEXT:    vcmp.f32 s5, s1
685; ARMV7-NEXT:    vmovgt.f32 s3, s7
686; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
687; ARMV7-NEXT:    vcmp.f32 s4, s0
688; ARMV7-NEXT:    vmovgt.f32 s1, s5
689; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
690; ARMV7-NEXT:    vmovgt.f32 s0, s4
691; ARMV7-NEXT:    vmov r2, r3, d1
692; ARMV7-NEXT:    vmov r0, r1, d0
693; ARMV7-NEXT:    bx lr
694;
695; ARMV8-LABEL: fmaxnumv432_intrinsic:
696; ARMV8:       @ %bb.0:
697; ARMV8-NEXT:    vmov d17, r2, r3
698; ARMV8-NEXT:    vmov d16, r0, r1
699; ARMV8-NEXT:    mov r0, sp
700; ARMV8-NEXT:    vld1.64 {d18, d19}, [r0]
701; ARMV8-NEXT:    vmaxnm.f32 q8, q8, q9
702; ARMV8-NEXT:    vmov r0, r1, d16
703; ARMV8-NEXT:    vmov r2, r3, d17
704; ARMV8-NEXT:    bx lr
705;
706; ARMV8M-LABEL: fmaxnumv432_intrinsic:
707; ARMV8M:       @ %bb.0:
708; ARMV8M-NEXT:    vmov d0, r0, r1
709; ARMV8M-NEXT:    mov r0, sp
710; ARMV8M-NEXT:    vldrw.u32 q1, [r0]
711; ARMV8M-NEXT:    vmov d1, r2, r3
712; ARMV8M-NEXT:    vmaxnm.f32 q0, q0, q1
713; ARMV8M-NEXT:    vmov r0, r1, d0
714; ARMV8M-NEXT:    vmov r2, r3, d1
715; ARMV8M-NEXT:    bx lr
716  %a = call nnan <4 x float> @llvm.maxnum.v4f32(<4 x float> %x, <4 x float> %y)
717  ret <4 x float> %a
718}
719
720define <4 x float> @fmaxnumv432_nsz_intrinsic(<4 x float> %x, <4 x float> %y) {
721; ARMV7-LABEL: fmaxnumv432_nsz_intrinsic:
722; ARMV7:       @ %bb.0:
723; ARMV7-NEXT:    vmov d17, r2, r3
724; ARMV7-NEXT:    vmov d16, r0, r1
725; ARMV7-NEXT:    mov r0, sp
726; ARMV7-NEXT:    vld1.64 {d18, d19}, [r0]
727; ARMV7-NEXT:    vmax.f32 q8, q8, q9
728; ARMV7-NEXT:    vmov r0, r1, d16
729; ARMV7-NEXT:    vmov r2, r3, d17
730; ARMV7-NEXT:    bx lr
731;
732; ARMV8-LABEL: fmaxnumv432_nsz_intrinsic:
733; ARMV8:       @ %bb.0:
734; ARMV8-NEXT:    vmov d17, r2, r3
735; ARMV8-NEXT:    vmov d16, r0, r1
736; ARMV8-NEXT:    mov r0, sp
737; ARMV8-NEXT:    vld1.64 {d18, d19}, [r0]
738; ARMV8-NEXT:    vmaxnm.f32 q8, q8, q9
739; ARMV8-NEXT:    vmov r0, r1, d16
740; ARMV8-NEXT:    vmov r2, r3, d17
741; ARMV8-NEXT:    bx lr
742;
743; ARMV8M-LABEL: fmaxnumv432_nsz_intrinsic:
744; ARMV8M:       @ %bb.0:
745; ARMV8M-NEXT:    vmov d0, r0, r1
746; ARMV8M-NEXT:    mov r0, sp
747; ARMV8M-NEXT:    vldrw.u32 q1, [r0]
748; ARMV8M-NEXT:    vmov d1, r2, r3
749; ARMV8M-NEXT:    vmaxnm.f32 q0, q0, q1
750; ARMV8M-NEXT:    vmov r0, r1, d0
751; ARMV8M-NEXT:    vmov r2, r3, d1
752; ARMV8M-NEXT:    bx lr
753  %a = call nnan nsz <4 x float> @llvm.maxnum.v4f32(<4 x float> %x, <4 x float> %y)
754  ret <4 x float> %a
755}
756
757define <4 x float> @fmaxnumv432_zero_intrinsic(<4 x float> %x) {
758; ARMV7-LABEL: fmaxnumv432_zero_intrinsic:
759; ARMV7:       @ %bb.0:
760; ARMV7-NEXT:    vmov d3, r2, r3
761; ARMV7-NEXT:    vldr s0, .LCPI21_0
762; ARMV7-NEXT:    vmov d2, r0, r1
763; ARMV7-NEXT:    vcmp.f32 s6, #0
764; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
765; ARMV7-NEXT:    vmov.f32 s2, s0
766; ARMV7-NEXT:    vcmp.f32 s7, #0
767; ARMV7-NEXT:    vmovgt.f32 s2, s6
768; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
769; ARMV7-NEXT:    vmov.f32 s3, s0
770; ARMV7-NEXT:    vcmp.f32 s5, #0
771; ARMV7-NEXT:    vmovgt.f32 s3, s7
772; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
773; ARMV7-NEXT:    vmov.f32 s1, s0
774; ARMV7-NEXT:    vcmp.f32 s4, #0
775; ARMV7-NEXT:    vmovgt.f32 s1, s5
776; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
777; ARMV7-NEXT:    vmovgt.f32 s0, s4
778; ARMV7-NEXT:    vmov r2, r3, d1
779; ARMV7-NEXT:    vmov r0, r1, d0
780; ARMV7-NEXT:    bx lr
781; ARMV7-NEXT:    .p2align 2
782; ARMV7-NEXT:  @ %bb.1:
783; ARMV7-NEXT:  .LCPI21_0:
784; ARMV7-NEXT:    .long 0x00000000 @ float 0
785;
786; ARMV8-LABEL: fmaxnumv432_zero_intrinsic:
787; ARMV8:       @ %bb.0:
788; ARMV8-NEXT:    vmov d17, r2, r3
789; ARMV8-NEXT:    vmov d16, r0, r1
790; ARMV8-NEXT:    vmov.i32 q9, #0x0
791; ARMV8-NEXT:    vmaxnm.f32 q8, q8, q9
792; ARMV8-NEXT:    vmov r0, r1, d16
793; ARMV8-NEXT:    vmov r2, r3, d17
794; ARMV8-NEXT:    bx lr
795;
796; ARMV8M-LABEL: fmaxnumv432_zero_intrinsic:
797; ARMV8M:       @ %bb.0:
798; ARMV8M-NEXT:    vmov d1, r2, r3
799; ARMV8M-NEXT:    vmov.i32 q1, #0x0
800; ARMV8M-NEXT:    vmov d0, r0, r1
801; ARMV8M-NEXT:    vmaxnm.f32 q0, q0, q1
802; ARMV8M-NEXT:    vmov r0, r1, d0
803; ARMV8M-NEXT:    vmov r2, r3, d1
804; ARMV8M-NEXT:    bx lr
805  %a = call nnan <4 x float> @llvm.maxnum.v4f32(<4 x float> %x, <4 x float><float 0.0, float 0.0, float 0.0, float 0.0>)
806  ret <4 x float> %a
807}
808
809define <4 x float> @fmaxnumv432_minus_zero_intrinsic(<4 x float> %x) {
810; ARMV7-LABEL: fmaxnumv432_minus_zero_intrinsic:
811; ARMV7:       @ %bb.0:
812; ARMV7-NEXT:    vldr s0, .LCPI22_0
813; ARMV7-NEXT:    vmov d3, r2, r3
814; ARMV7-NEXT:    vmov d2, r0, r1
815; ARMV7-NEXT:    vcmp.f32 s6, s0
816; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
817; ARMV7-NEXT:    vcmp.f32 s7, s0
818; ARMV7-NEXT:    vmov.f32 s2, s0
819; ARMV7-NEXT:    vmovgt.f32 s2, s6
820; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
821; ARMV7-NEXT:    vcmp.f32 s5, s0
822; ARMV7-NEXT:    vmov.f32 s3, s0
823; ARMV7-NEXT:    vmovgt.f32 s3, s7
824; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
825; ARMV7-NEXT:    vcmp.f32 s4, s0
826; ARMV7-NEXT:    vmov.f32 s1, s0
827; ARMV7-NEXT:    vmovgt.f32 s1, s5
828; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
829; ARMV7-NEXT:    vmovgt.f32 s0, s4
830; ARMV7-NEXT:    vmov r2, r3, d1
831; ARMV7-NEXT:    vmov r0, r1, d0
832; ARMV7-NEXT:    bx lr
833; ARMV7-NEXT:    .p2align 2
834; ARMV7-NEXT:  @ %bb.1:
835; ARMV7-NEXT:  .LCPI22_0:
836; ARMV7-NEXT:    .long 0x80000000 @ float -0
837;
838; ARMV8-LABEL: fmaxnumv432_minus_zero_intrinsic:
839; ARMV8:       @ %bb.0:
840; ARMV8-NEXT:    vmov d17, r2, r3
841; ARMV8-NEXT:    vmov d16, r0, r1
842; ARMV8-NEXT:    vmov.i32 q9, #0x80000000
843; ARMV8-NEXT:    vmaxnm.f32 q8, q8, q9
844; ARMV8-NEXT:    vmov r0, r1, d16
845; ARMV8-NEXT:    vmov r2, r3, d17
846; ARMV8-NEXT:    bx lr
847;
848; ARMV8M-LABEL: fmaxnumv432_minus_zero_intrinsic:
849; ARMV8M:       @ %bb.0:
850; ARMV8M-NEXT:    vmov d1, r2, r3
851; ARMV8M-NEXT:    vmov.i32 q1, #0x80000000
852; ARMV8M-NEXT:    vmov d0, r0, r1
853; ARMV8M-NEXT:    vmaxnm.f32 q0, q0, q1
854; ARMV8M-NEXT:    vmov r0, r1, d0
855; ARMV8M-NEXT:    vmov r2, r3, d1
856; ARMV8M-NEXT:    bx lr
857  %a = call nnan <4 x float> @llvm.maxnum.v4f32(<4 x float> %x, <4 x float><float -0.0, float -0.0, float -0.0, float -0.0>)
858  ret <4 x float> %a
859}
860
861define <4 x float> @fmaxnumv432_non_zero_intrinsic(<4 x float> %x) {
862; ARMV7-LABEL: fmaxnumv432_non_zero_intrinsic:
863; ARMV7:       @ %bb.0:
864; ARMV7-NEXT:    vmov d19, r2, r3
865; ARMV7-NEXT:    vmov.f32 q8, #1.000000e+00
866; ARMV7-NEXT:    vmov d18, r0, r1
867; ARMV7-NEXT:    vmax.f32 q8, q9, q8
868; ARMV7-NEXT:    vmov r0, r1, d16
869; ARMV7-NEXT:    vmov r2, r3, d17
870; ARMV7-NEXT:    bx lr
871;
872; ARMV8-LABEL: fmaxnumv432_non_zero_intrinsic:
873; ARMV8:       @ %bb.0:
874; ARMV8-NEXT:    vmov d17, r2, r3
875; ARMV8-NEXT:    vmov d16, r0, r1
876; ARMV8-NEXT:    vmov.f32 q9, #1.000000e+00
877; ARMV8-NEXT:    vmaxnm.f32 q8, q8, q9
878; ARMV8-NEXT:    vmov r0, r1, d16
879; ARMV8-NEXT:    vmov r2, r3, d17
880; ARMV8-NEXT:    bx lr
881;
882; ARMV8M-LABEL: fmaxnumv432_non_zero_intrinsic:
883; ARMV8M:       @ %bb.0:
884; ARMV8M-NEXT:    vmov d1, r2, r3
885; ARMV8M-NEXT:    vmov.f32 q1, #1.000000e+00
886; ARMV8M-NEXT:    vmov d0, r0, r1
887; ARMV8M-NEXT:    vmaxnm.f32 q0, q0, q1
888; ARMV8M-NEXT:    vmov r0, r1, d0
889; ARMV8M-NEXT:    vmov r2, r3, d1
890; ARMV8M-NEXT:    bx lr
891  %a = call nnan <4 x float> @llvm.maxnum.v4f32(<4 x float> %x, <4 x float><float 1.0, float 1.0, float 1.0, float 1.0>)
892  ret <4 x float> %a
893}
894
895define <2 x double> @fminnumv264_intrinsic(<2 x double> %x, <2 x double> %y) {
896; ARMV7-LABEL: fminnumv264_intrinsic:
897; ARMV7:       @ %bb.0:
898; ARMV7-NEXT:    mov r12, sp
899; ARMV7-NEXT:    vld1.64 {d16, d17}, [r12]
900; ARMV7-NEXT:    vmov d18, r0, r1
901; ARMV7-NEXT:    vcmp.f64 d18, d16
902; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
903; ARMV7-NEXT:    vmov d19, r2, r3
904; ARMV7-NEXT:    vcmp.f64 d19, d17
905; ARMV7-NEXT:    vmovlt.f64 d16, d18
906; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
907; ARMV7-NEXT:    vmov r0, r1, d16
908; ARMV7-NEXT:    vmovlt.f64 d17, d19
909; ARMV7-NEXT:    vmov r2, r3, d17
910; ARMV7-NEXT:    bx lr
911;
912; ARMV8-LABEL: fminnumv264_intrinsic:
913; ARMV8:       @ %bb.0:
914; ARMV8-NEXT:    mov r12, sp
915; ARMV8-NEXT:    vld1.64 {d16, d17}, [r12]
916; ARMV8-NEXT:    vmov d19, r0, r1
917; ARMV8-NEXT:    vmov d18, r2, r3
918; ARMV8-NEXT:    vminnm.f64 d19, d19, d16
919; ARMV8-NEXT:    vminnm.f64 d16, d18, d17
920; ARMV8-NEXT:    vmov r0, r1, d19
921; ARMV8-NEXT:    vmov r2, r3, d16
922; ARMV8-NEXT:    bx lr
923;
924; ARMV8M-LABEL: fminnumv264_intrinsic:
925; ARMV8M:       @ %bb.0:
926; ARMV8M-NEXT:    mov r12, sp
927; ARMV8M-NEXT:    vmov d0, r0, r1
928; ARMV8M-NEXT:    vldrw.u32 q1, [r12]
929; ARMV8M-NEXT:    vmov d1, r2, r3
930; ARMV8M-NEXT:    vcmp.f64 d2, d0
931; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
932; ARMV8M-NEXT:    vcmp.f64 d3, d1
933; ARMV8M-NEXT:    vselgt.f64 d0, d0, d2
934; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
935; ARMV8M-NEXT:    vmov r0, r1, d0
936; ARMV8M-NEXT:    vselgt.f64 d0, d1, d3
937; ARMV8M-NEXT:    vmov r2, r3, d0
938; ARMV8M-NEXT:    bx lr
939  %a = call nnan <2 x double> @llvm.minnum.v2f64(<2 x double> %x, <2 x double> %y)
940  ret <2 x double> %a
941}
942
943define <2 x double> @fminnumv264_nsz_intrinsic(<2 x double> %x, <2 x double> %y) {
944; ARMV7-LABEL: fminnumv264_nsz_intrinsic:
945; ARMV7:       @ %bb.0:
946; ARMV7-NEXT:    mov r12, sp
947; ARMV7-NEXT:    vld1.64 {d16, d17}, [r12]
948; ARMV7-NEXT:    vmov d18, r0, r1
949; ARMV7-NEXT:    vcmp.f64 d18, d16
950; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
951; ARMV7-NEXT:    vmov d19, r2, r3
952; ARMV7-NEXT:    vcmp.f64 d19, d17
953; ARMV7-NEXT:    vmovlt.f64 d16, d18
954; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
955; ARMV7-NEXT:    vmov r0, r1, d16
956; ARMV7-NEXT:    vmovlt.f64 d17, d19
957; ARMV7-NEXT:    vmov r2, r3, d17
958; ARMV7-NEXT:    bx lr
959;
960; ARMV8-LABEL: fminnumv264_nsz_intrinsic:
961; ARMV8:       @ %bb.0:
962; ARMV8-NEXT:    mov r12, sp
963; ARMV8-NEXT:    vld1.64 {d16, d17}, [r12]
964; ARMV8-NEXT:    vmov d19, r0, r1
965; ARMV8-NEXT:    vmov d18, r2, r3
966; ARMV8-NEXT:    vminnm.f64 d19, d19, d16
967; ARMV8-NEXT:    vminnm.f64 d16, d18, d17
968; ARMV8-NEXT:    vmov r0, r1, d19
969; ARMV8-NEXT:    vmov r2, r3, d16
970; ARMV8-NEXT:    bx lr
971;
972; ARMV8M-LABEL: fminnumv264_nsz_intrinsic:
973; ARMV8M:       @ %bb.0:
974; ARMV8M-NEXT:    mov r12, sp
975; ARMV8M-NEXT:    vmov d0, r0, r1
976; ARMV8M-NEXT:    vldrw.u32 q1, [r12]
977; ARMV8M-NEXT:    vmov d1, r2, r3
978; ARMV8M-NEXT:    vcmp.f64 d2, d0
979; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
980; ARMV8M-NEXT:    vcmp.f64 d3, d1
981; ARMV8M-NEXT:    vselgt.f64 d0, d0, d2
982; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
983; ARMV8M-NEXT:    vmov r0, r1, d0
984; ARMV8M-NEXT:    vselgt.f64 d0, d1, d3
985; ARMV8M-NEXT:    vmov r2, r3, d0
986; ARMV8M-NEXT:    bx lr
987  %a = call nnan nsz <2 x double> @llvm.minnum.v2f64(<2 x double> %x, <2 x double> %y)
988  ret <2 x double> %a
989}
990
991define <2 x double> @fminnumv264_non_zero_intrinsic(<2 x double> %x) {
992; ARMV7-LABEL: fminnumv264_non_zero_intrinsic:
993; ARMV7:       @ %bb.0:
994; ARMV7-NEXT:    vmov.f64 d16, #1.000000e+00
995; ARMV7-NEXT:    vmov d17, r0, r1
996; ARMV7-NEXT:    vcmp.f64 d17, d16
997; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
998; ARMV7-NEXT:    vmov d18, r2, r3
999; ARMV7-NEXT:    vcmp.f64 d18, d16
1000; ARMV7-NEXT:    vmov.f64 d19, d16
1001; ARMV7-NEXT:    vmovlt.f64 d19, d17
1002; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
1003; ARMV7-NEXT:    vmov r0, r1, d19
1004; ARMV7-NEXT:    vmovlt.f64 d16, d18
1005; ARMV7-NEXT:    vmov r2, r3, d16
1006; ARMV7-NEXT:    bx lr
1007;
1008; ARMV8-LABEL: fminnumv264_non_zero_intrinsic:
1009; ARMV8:       @ %bb.0:
1010; ARMV8-NEXT:    vmov.f64 d16, #1.000000e+00
1011; ARMV8-NEXT:    vmov d18, r0, r1
1012; ARMV8-NEXT:    vmov d17, r2, r3
1013; ARMV8-NEXT:    vminnm.f64 d18, d18, d16
1014; ARMV8-NEXT:    vminnm.f64 d16, d17, d16
1015; ARMV8-NEXT:    vmov r0, r1, d18
1016; ARMV8-NEXT:    vmov r2, r3, d16
1017; ARMV8-NEXT:    bx lr
1018;
1019; ARMV8M-LABEL: fminnumv264_non_zero_intrinsic:
1020; ARMV8M:       @ %bb.0:
1021; ARMV8M-NEXT:    vmov d1, r0, r1
1022; ARMV8M-NEXT:    vmov.f64 d0, #1.000000e+00
1023; ARMV8M-NEXT:    vcmp.f64 d0, d1
1024; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1025; ARMV8M-NEXT:    vmov d2, r2, r3
1026; ARMV8M-NEXT:    vcmp.f64 d0, d2
1027; ARMV8M-NEXT:    vselgt.f64 d1, d1, d0
1028; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1029; ARMV8M-NEXT:    vmov r0, r1, d1
1030; ARMV8M-NEXT:    vselgt.f64 d0, d2, d0
1031; ARMV8M-NEXT:    vmov r2, r3, d0
1032; ARMV8M-NEXT:    bx lr
1033  %a = call nnan <2 x double> @llvm.minnum.v2f64(<2 x double> %x, <2 x double><double 1.0, double 1.0>)
1034  ret <2 x double> %a
1035}
1036
1037define <2 x double> @fminnumv264_one_zero_intrinsic(<2 x double> %x) {
1038; ARMV7-LABEL: fminnumv264_one_zero_intrinsic:
1039; ARMV7:       @ %bb.0:
1040; ARMV7-NEXT:    vmov d18, r2, r3
1041; ARMV7-NEXT:    vcmp.f64 d18, #0
1042; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
1043; ARMV7-NEXT:    vmov d19, r0, r1
1044; ARMV7-NEXT:    vmov.f64 d16, #-1.000000e+00
1045; ARMV7-NEXT:    vcmp.f64 d19, d16
1046; ARMV7-NEXT:    vmov.i32 d17, #0x0
1047; ARMV7-NEXT:    vmovlt.f64 d17, d18
1048; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
1049; ARMV7-NEXT:    vmov r2, r3, d17
1050; ARMV7-NEXT:    vmovlt.f64 d16, d19
1051; ARMV7-NEXT:    vmov r0, r1, d16
1052; ARMV7-NEXT:    bx lr
1053;
1054; ARMV8-LABEL: fminnumv264_one_zero_intrinsic:
1055; ARMV8:       @ %bb.0:
1056; ARMV8-NEXT:    vmov.f64 d16, #-1.000000e+00
1057; ARMV8-NEXT:    vmov d18, r0, r1
1058; ARMV8-NEXT:    vmov.i32 d17, #0x0
1059; ARMV8-NEXT:    vminnm.f64 d16, d18, d16
1060; ARMV8-NEXT:    vmov d19, r2, r3
1061; ARMV8-NEXT:    vminnm.f64 d17, d19, d17
1062; ARMV8-NEXT:    vmov r0, r1, d16
1063; ARMV8-NEXT:    vmov r2, r3, d17
1064; ARMV8-NEXT:    bx lr
1065;
1066; ARMV8M-LABEL: fminnumv264_one_zero_intrinsic:
1067; ARMV8M:       @ %bb.0:
1068; ARMV8M-NEXT:    vmov d1, r2, r3
1069; ARMV8M-NEXT:    vldr d0, .LCPI27_0
1070; ARMV8M-NEXT:    vcmp.f64 d1, #0
1071; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1072; ARMV8M-NEXT:    vmov d2, r0, r1
1073; ARMV8M-NEXT:    vmov.f64 d3, #-1.000000e+00
1074; ARMV8M-NEXT:    vcmp.f64 d3, d2
1075; ARMV8M-NEXT:    vmovlt.f64 d0, d1
1076; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1077; ARMV8M-NEXT:    vmov r2, r3, d0
1078; ARMV8M-NEXT:    vselgt.f64 d1, d2, d3
1079; ARMV8M-NEXT:    vmov r0, r1, d1
1080; ARMV8M-NEXT:    bx lr
1081; ARMV8M-NEXT:    .p2align 3
1082; ARMV8M-NEXT:  @ %bb.1:
1083; ARMV8M-NEXT:  .LCPI27_0:
1084; ARMV8M-NEXT:    .long 0 @ double 0
1085; ARMV8M-NEXT:    .long 0
1086  %a = call nnan <2 x double> @llvm.minnum.v2f64(<2 x double> %x, <2 x double><double -1.0, double 0.0>)
1087  ret <2 x double> %a
1088}
1089
1090define <2 x double> @fmaxnumv264_intrinsic(<2 x double> %x, <2 x double> %y) {
1091; ARMV7-LABEL: fmaxnumv264_intrinsic:
1092; ARMV7:       @ %bb.0:
1093; ARMV7-NEXT:    mov r12, sp
1094; ARMV7-NEXT:    vld1.64 {d16, d17}, [r12]
1095; ARMV7-NEXT:    vmov d18, r0, r1
1096; ARMV7-NEXT:    vcmp.f64 d18, d16
1097; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
1098; ARMV7-NEXT:    vmov d19, r2, r3
1099; ARMV7-NEXT:    vcmp.f64 d19, d17
1100; ARMV7-NEXT:    vmovgt.f64 d16, d18
1101; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
1102; ARMV7-NEXT:    vmov r0, r1, d16
1103; ARMV7-NEXT:    vmovgt.f64 d17, d19
1104; ARMV7-NEXT:    vmov r2, r3, d17
1105; ARMV7-NEXT:    bx lr
1106;
1107; ARMV8-LABEL: fmaxnumv264_intrinsic:
1108; ARMV8:       @ %bb.0:
1109; ARMV8-NEXT:    mov r12, sp
1110; ARMV8-NEXT:    vld1.64 {d16, d17}, [r12]
1111; ARMV8-NEXT:    vmov d19, r0, r1
1112; ARMV8-NEXT:    vmov d18, r2, r3
1113; ARMV8-NEXT:    vmaxnm.f64 d19, d19, d16
1114; ARMV8-NEXT:    vmaxnm.f64 d16, d18, d17
1115; ARMV8-NEXT:    vmov r0, r1, d19
1116; ARMV8-NEXT:    vmov r2, r3, d16
1117; ARMV8-NEXT:    bx lr
1118;
1119; ARMV8M-LABEL: fmaxnumv264_intrinsic:
1120; ARMV8M:       @ %bb.0:
1121; ARMV8M-NEXT:    mov r12, sp
1122; ARMV8M-NEXT:    vmov d1, r0, r1
1123; ARMV8M-NEXT:    vldrw.u32 q1, [r12]
1124; ARMV8M-NEXT:    vmov d0, r2, r3
1125; ARMV8M-NEXT:    vcmp.f64 d1, d2
1126; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1127; ARMV8M-NEXT:    vcmp.f64 d0, d3
1128; ARMV8M-NEXT:    vselgt.f64 d1, d1, d2
1129; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1130; ARMV8M-NEXT:    vmov r0, r1, d1
1131; ARMV8M-NEXT:    vselgt.f64 d0, d0, d3
1132; ARMV8M-NEXT:    vmov r2, r3, d0
1133; ARMV8M-NEXT:    bx lr
1134  %a = call nnan <2 x double> @llvm.maxnum.v2f64(<2 x double> %x, <2 x double> %y)
1135  ret <2 x double> %a
1136}
1137
1138define <2 x double> @fmaxnumv264_nsz_intrinsic(<2 x double> %x, <2 x double> %y) {
1139; ARMV7-LABEL: fmaxnumv264_nsz_intrinsic:
1140; ARMV7:       @ %bb.0:
1141; ARMV7-NEXT:    mov r12, sp
1142; ARMV7-NEXT:    vld1.64 {d16, d17}, [r12]
1143; ARMV7-NEXT:    vmov d18, r0, r1
1144; ARMV7-NEXT:    vcmp.f64 d18, d16
1145; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
1146; ARMV7-NEXT:    vmov d19, r2, r3
1147; ARMV7-NEXT:    vcmp.f64 d19, d17
1148; ARMV7-NEXT:    vmovgt.f64 d16, d18
1149; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
1150; ARMV7-NEXT:    vmov r0, r1, d16
1151; ARMV7-NEXT:    vmovgt.f64 d17, d19
1152; ARMV7-NEXT:    vmov r2, r3, d17
1153; ARMV7-NEXT:    bx lr
1154;
1155; ARMV8-LABEL: fmaxnumv264_nsz_intrinsic:
1156; ARMV8:       @ %bb.0:
1157; ARMV8-NEXT:    mov r12, sp
1158; ARMV8-NEXT:    vld1.64 {d16, d17}, [r12]
1159; ARMV8-NEXT:    vmov d19, r0, r1
1160; ARMV8-NEXT:    vmov d18, r2, r3
1161; ARMV8-NEXT:    vmaxnm.f64 d19, d19, d16
1162; ARMV8-NEXT:    vmaxnm.f64 d16, d18, d17
1163; ARMV8-NEXT:    vmov r0, r1, d19
1164; ARMV8-NEXT:    vmov r2, r3, d16
1165; ARMV8-NEXT:    bx lr
1166;
1167; ARMV8M-LABEL: fmaxnumv264_nsz_intrinsic:
1168; ARMV8M:       @ %bb.0:
1169; ARMV8M-NEXT:    mov r12, sp
1170; ARMV8M-NEXT:    vmov d1, r0, r1
1171; ARMV8M-NEXT:    vldrw.u32 q1, [r12]
1172; ARMV8M-NEXT:    vmov d0, r2, r3
1173; ARMV8M-NEXT:    vcmp.f64 d1, d2
1174; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1175; ARMV8M-NEXT:    vcmp.f64 d0, d3
1176; ARMV8M-NEXT:    vselgt.f64 d1, d1, d2
1177; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1178; ARMV8M-NEXT:    vmov r0, r1, d1
1179; ARMV8M-NEXT:    vselgt.f64 d0, d0, d3
1180; ARMV8M-NEXT:    vmov r2, r3, d0
1181; ARMV8M-NEXT:    bx lr
1182  %a = call nnan nsz <2 x double> @llvm.maxnum.v2f64(<2 x double> %x, <2 x double> %y)
1183  ret <2 x double> %a
1184}
1185
1186define <2 x double> @fmaxnumv264_zero_intrinsic(<2 x double> %x) {
1187; ARMV7-LABEL: fmaxnumv264_zero_intrinsic:
1188; ARMV7:       @ %bb.0:
1189; ARMV7-NEXT:    vmov d18, r0, r1
1190; ARMV7-NEXT:    vldr d16, .LCPI30_0
1191; ARMV7-NEXT:    vcmp.f64 d18, #0
1192; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
1193; ARMV7-NEXT:    vmov d19, r2, r3
1194; ARMV7-NEXT:    vcmp.f64 d19, d16
1195; ARMV7-NEXT:    vmov.i32 d17, #0x0
1196; ARMV7-NEXT:    vmovgt.f64 d17, d18
1197; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
1198; ARMV7-NEXT:    vmov r0, r1, d17
1199; ARMV7-NEXT:    vmovgt.f64 d16, d19
1200; ARMV7-NEXT:    vmov r2, r3, d16
1201; ARMV7-NEXT:    bx lr
1202; ARMV7-NEXT:    .p2align 3
1203; ARMV7-NEXT:  @ %bb.1:
1204; ARMV7-NEXT:  .LCPI30_0:
1205; ARMV7-NEXT:    .long 0 @ double -0
1206; ARMV7-NEXT:    .long 2147483648
1207;
1208; ARMV8-LABEL: fmaxnumv264_zero_intrinsic:
1209; ARMV8:       @ %bb.0:
1210; ARMV8-NEXT:    vldr d16, .LCPI30_0
1211; ARMV8-NEXT:    vmov d18, r2, r3
1212; ARMV8-NEXT:    vmov.i32 d17, #0x0
1213; ARMV8-NEXT:    vmov d19, r0, r1
1214; ARMV8-NEXT:    vmaxnm.f64 d16, d18, d16
1215; ARMV8-NEXT:    vmaxnm.f64 d17, d19, d17
1216; ARMV8-NEXT:    vmov r2, r3, d16
1217; ARMV8-NEXT:    vmov r0, r1, d17
1218; ARMV8-NEXT:    bx lr
1219; ARMV8-NEXT:    .p2align 3
1220; ARMV8-NEXT:  @ %bb.1:
1221; ARMV8-NEXT:  .LCPI30_0:
1222; ARMV8-NEXT:    .long 0 @ double -0
1223; ARMV8-NEXT:    .long 2147483648
1224;
1225; ARMV8M-LABEL: fmaxnumv264_zero_intrinsic:
1226; ARMV8M:       @ %bb.0:
1227; ARMV8M-NEXT:    vmov d2, r0, r1
1228; ARMV8M-NEXT:    vldr d0, .LCPI30_0
1229; ARMV8M-NEXT:    vcmp.f64 d2, #0
1230; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1231; ARMV8M-NEXT:    vmov d1, r2, r3
1232; ARMV8M-NEXT:    vcmp.f64 d1, d0
1233; ARMV8M-NEXT:    vldr d3, .LCPI30_1
1234; ARMV8M-NEXT:    vselgt.f64 d2, d2, d3
1235; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1236; ARMV8M-NEXT:    vmov r0, r1, d2
1237; ARMV8M-NEXT:    vselgt.f64 d0, d1, d0
1238; ARMV8M-NEXT:    vmov r2, r3, d0
1239; ARMV8M-NEXT:    bx lr
1240; ARMV8M-NEXT:    .p2align 3
1241; ARMV8M-NEXT:  @ %bb.1:
1242; ARMV8M-NEXT:  .LCPI30_0:
1243; ARMV8M-NEXT:    .long 0 @ double -0
1244; ARMV8M-NEXT:    .long 2147483648
1245; ARMV8M-NEXT:  .LCPI30_1:
1246; ARMV8M-NEXT:    .long 0 @ double 0
1247; ARMV8M-NEXT:    .long 0
1248  %a = call nnan <2 x double> @llvm.maxnum.v2f64(<2 x double> %x, <2 x double><double 0.0, double -0.0>)
1249  ret <2 x double> %a
1250}
1251
1252define <2 x double> @fmaxnumv264_minus_zero_intrinsic(<2 x double> %x) {
1253; ARMV7-LABEL: fmaxnumv264_minus_zero_intrinsic:
1254; ARMV7:       @ %bb.0:
1255; ARMV7-NEXT:    vldr d16, .LCPI31_0
1256; ARMV7-NEXT:    vmov d17, r0, r1
1257; ARMV7-NEXT:    vmov d18, r2, r3
1258; ARMV7-NEXT:    vcmp.f64 d17, d16
1259; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
1260; ARMV7-NEXT:    vcmp.f64 d18, d16
1261; ARMV7-NEXT:    vmov.f64 d19, d16
1262; ARMV7-NEXT:    vmovgt.f64 d19, d17
1263; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
1264; ARMV7-NEXT:    vmov r0, r1, d19
1265; ARMV7-NEXT:    vmovgt.f64 d16, d18
1266; ARMV7-NEXT:    vmov r2, r3, d16
1267; ARMV7-NEXT:    bx lr
1268; ARMV7-NEXT:    .p2align 3
1269; ARMV7-NEXT:  @ %bb.1:
1270; ARMV7-NEXT:  .LCPI31_0:
1271; ARMV7-NEXT:    .long 0 @ double -0
1272; ARMV7-NEXT:    .long 2147483648
1273;
1274; ARMV8-LABEL: fmaxnumv264_minus_zero_intrinsic:
1275; ARMV8:       @ %bb.0:
1276; ARMV8-NEXT:    vldr d16, .LCPI31_0
1277; ARMV8-NEXT:    vmov d18, r0, r1
1278; ARMV8-NEXT:    vmov d17, r2, r3
1279; ARMV8-NEXT:    vmaxnm.f64 d18, d18, d16
1280; ARMV8-NEXT:    vmaxnm.f64 d16, d17, d16
1281; ARMV8-NEXT:    vmov r0, r1, d18
1282; ARMV8-NEXT:    vmov r2, r3, d16
1283; ARMV8-NEXT:    bx lr
1284; ARMV8-NEXT:    .p2align 3
1285; ARMV8-NEXT:  @ %bb.1:
1286; ARMV8-NEXT:  .LCPI31_0:
1287; ARMV8-NEXT:    .long 0 @ double -0
1288; ARMV8-NEXT:    .long 2147483648
1289;
1290; ARMV8M-LABEL: fmaxnumv264_minus_zero_intrinsic:
1291; ARMV8M:       @ %bb.0:
1292; ARMV8M-NEXT:    vldr d0, .LCPI31_0
1293; ARMV8M-NEXT:    vmov d1, r0, r1
1294; ARMV8M-NEXT:    vmov d2, r2, r3
1295; ARMV8M-NEXT:    vcmp.f64 d1, d0
1296; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1297; ARMV8M-NEXT:    vcmp.f64 d2, d0
1298; ARMV8M-NEXT:    vselgt.f64 d1, d1, d0
1299; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1300; ARMV8M-NEXT:    vmov r0, r1, d1
1301; ARMV8M-NEXT:    vselgt.f64 d0, d2, d0
1302; ARMV8M-NEXT:    vmov r2, r3, d0
1303; ARMV8M-NEXT:    bx lr
1304; ARMV8M-NEXT:    .p2align 3
1305; ARMV8M-NEXT:  @ %bb.1:
1306; ARMV8M-NEXT:  .LCPI31_0:
1307; ARMV8M-NEXT:    .long 0 @ double -0
1308; ARMV8M-NEXT:    .long 2147483648
1309  %a = call nnan <2 x double> @llvm.maxnum.v2f64(<2 x double> %x, <2 x double><double -0.0, double -0.0>)
1310  ret <2 x double> %a
1311}
1312
1313define <2 x double> @fmaxnumv264_non_zero_intrinsic(<2 x double> %x) {
1314; ARMV7-LABEL: fmaxnumv264_non_zero_intrinsic:
1315; ARMV7:       @ %bb.0:
1316; ARMV7-NEXT:    vmov.f64 d16, #1.000000e+00
1317; ARMV7-NEXT:    vmov d17, r0, r1
1318; ARMV7-NEXT:    vcmp.f64 d17, d16
1319; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
1320; ARMV7-NEXT:    vmov d18, r2, r3
1321; ARMV7-NEXT:    vcmp.f64 d18, d16
1322; ARMV7-NEXT:    vmov.f64 d19, d16
1323; ARMV7-NEXT:    vmovgt.f64 d19, d17
1324; ARMV7-NEXT:    vmrs APSR_nzcv, fpscr
1325; ARMV7-NEXT:    vmov r0, r1, d19
1326; ARMV7-NEXT:    vmovgt.f64 d16, d18
1327; ARMV7-NEXT:    vmov r2, r3, d16
1328; ARMV7-NEXT:    bx lr
1329;
1330; ARMV8-LABEL: fmaxnumv264_non_zero_intrinsic:
1331; ARMV8:       @ %bb.0:
1332; ARMV8-NEXT:    vmov.f64 d16, #1.000000e+00
1333; ARMV8-NEXT:    vmov d18, r0, r1
1334; ARMV8-NEXT:    vmov d17, r2, r3
1335; ARMV8-NEXT:    vmaxnm.f64 d18, d18, d16
1336; ARMV8-NEXT:    vmaxnm.f64 d16, d17, d16
1337; ARMV8-NEXT:    vmov r0, r1, d18
1338; ARMV8-NEXT:    vmov r2, r3, d16
1339; ARMV8-NEXT:    bx lr
1340;
1341; ARMV8M-LABEL: fmaxnumv264_non_zero_intrinsic:
1342; ARMV8M:       @ %bb.0:
1343; ARMV8M-NEXT:    vmov.f64 d0, #1.000000e+00
1344; ARMV8M-NEXT:    vmov d1, r0, r1
1345; ARMV8M-NEXT:    vcmp.f64 d1, d0
1346; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1347; ARMV8M-NEXT:    vmov d2, r2, r3
1348; ARMV8M-NEXT:    vcmp.f64 d2, d0
1349; ARMV8M-NEXT:    vselgt.f64 d1, d1, d0
1350; ARMV8M-NEXT:    vmrs APSR_nzcv, fpscr
1351; ARMV8M-NEXT:    vmov r0, r1, d1
1352; ARMV8M-NEXT:    vselgt.f64 d0, d2, d0
1353; ARMV8M-NEXT:    vmov r2, r3, d0
1354; ARMV8M-NEXT:    bx lr
1355  %a = call nnan <2 x double> @llvm.maxnum.v2f64(<2 x double> %x, <2 x double><double 1.0, double 1.0>)
1356  ret <2 x double> %a
1357}
1358
1359define void @pr65820(ptr %y, <4 x float> %splat) {
1360; ARMV7-LABEL: pr65820:
1361; ARMV7:       @ %bb.0: @ %entry
1362; ARMV7-NEXT:    vmov d16, r2, r3
1363; ARMV7-NEXT:    vdup.32 q8, d16[0]
1364; ARMV7-NEXT:    vcgt.f32 q9, q8, #0
1365; ARMV7-NEXT:    vand q8, q8, q9
1366; ARMV7-NEXT:    vst1.32 {d16, d17}, [r0]
1367; ARMV7-NEXT:    bx lr
1368;
1369; ARMV8-LABEL: pr65820:
1370; ARMV8:       @ %bb.0: @ %entry
1371; ARMV8-NEXT:    vmov d16, r2, r3
1372; ARMV8-NEXT:    vmov.i32 q9, #0x0
1373; ARMV8-NEXT:    vdup.32 q8, d16[0]
1374; ARMV8-NEXT:    vmaxnm.f32 q8, q8, q9
1375; ARMV8-NEXT:    vst1.32 {d16, d17}, [r0]
1376; ARMV8-NEXT:    bx lr
1377;
1378; ARMV8M-LABEL: pr65820:
1379; ARMV8M:       @ %bb.0: @ %entry
1380; ARMV8M-NEXT:    vmov d0, r2, r3
1381; ARMV8M-NEXT:    vmov r1, s0
1382; ARMV8M-NEXT:    vmov.i32 q0, #0x0
1383; ARMV8M-NEXT:    vdup.32 q1, r1
1384; ARMV8M-NEXT:    vmaxnm.f32 q0, q1, q0
1385; ARMV8M-NEXT:    vstrw.32 q0, [r0]
1386; ARMV8M-NEXT:    bx lr
1387entry:
1388  %broadcast.splat = shufflevector <4 x float> %splat, <4 x float> zeroinitializer, <4 x i32> zeroinitializer
1389  %0 = fcmp ogt <4 x float> %broadcast.splat, zeroinitializer
1390  %1 = select <4 x i1> %0, <4 x float> %broadcast.splat, <4 x float> zeroinitializer
1391  store <4 x float> %1, ptr %y, align 4
1392  ret void
1393}
1394