xref: /llvm-project/llvm/test/CodeGen/ARM/memset-inline.ll (revision bed1c7f061aa12417aa081e334afdba45767b938)
1; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 -pre-RA-sched=source -disable-post-ra | FileCheck %s -check-prefix=CHECK-7A
2; RUN: llc < %s -mtriple=thumbv6m -pre-RA-sched=source -disable-post-ra -mattr=+strict-align | FileCheck %s -check-prefix=CHECK-6M
3
4define void @t1(ptr nocapture %c) nounwind optsize {
5entry:
6; CHECK-7A-LABEL: t1:
7; CHECK-7A: movs r1, #0
8; CHECK-7A: strd r1, r1, [r0]
9; CHECK-7A: str r1, [r0, #8]
10; CHECK-6M-LABEL: t1:
11; CHECK-6M: movs r1, #0
12; CHECK-6M: str r1, [r0]
13; CHECK-6M: str r1, [r0, #4]
14; CHECK-6M: str r1, [r0, #8]
15  call void @llvm.memset.p0.i64(ptr align 8 %c, i8 0, i64 12, i1 false)
16  ret void
17}
18
19define void @t2() nounwind ssp {
20entry:
21; CHECK-7A-LABEL: t2:
22; CHECK-7A: vmov.i32 {{q[0-9]+}}, #0x0
23; CHECK-7A: movs r1, #10
24; CHECK-7A: vst1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r2], r1
25; CHECK-7A: vst1.16 {d{{[0-9]+}}, d{{[0-9]+}}}, [r2]
26; CHECK-6M-LABEL: t2:
27; CHECK-6M: movs [[REG:r[0-9]+]], #0
28; CHECK-6M-DAG: str  [[REG]], [sp, #20]
29; CHECK-6M-DAG: str  [[REG]], [sp, #16]
30; CHECK-6M-DAG: str  [[REG]], [sp, #12]
31; CHECK-6M-DAG: str  [[REG]], [sp, #8]
32; CHECK-6M-DAG: str  [[REG]], [sp, #4]
33; CHECK-6M-DAG: str  [[REG]], [sp]
34  %buf = alloca [26 x i8], align 1
35  call void @llvm.memset.p0.i32(ptr %buf, i8 0, i32 26, i1 false)
36  call void @something(ptr %buf) nounwind
37  ret void
38}
39
40define void @t3(ptr %p) {
41entry:
42; CHECK-7A-LABEL: t3:
43; CHECK-7A: muls [[REG:r[0-9]+]],
44; CHECK-7A: str  [[REG]],
45; CHECK-6M-LABEL: t3:
46; CHECK-6M-NOT: muls
47; CHECK-6M: strb [[REG:r[0-9]+]],
48; CHECK-6M: strb [[REG]],
49; CHECK-6M: strb [[REG]],
50; CHECK-6M: strb [[REG]],
51  br label %for.body
52
53for.body:
54  %i = phi i32 [ 0, %entry ], [ %inc, %for.body ]
55  %0 = trunc i32 %i to i8
56  call void @llvm.memset.p0.i32(ptr %p, i8 %0, i32 4, i1 false)
57  call void @something(ptr %p)
58  %inc = add nuw nsw i32 %i, 1
59  %exitcond = icmp eq i32 %inc, 255
60  br i1 %exitcond, label %for.end, label %for.body
61
62for.end:
63  ret void
64}
65
66define void @t4(ptr %p) {
67entry:
68; CHECK-7A-LABEL: t4:
69; CHECK-7A: muls [[REG:r[0-9]+]],
70; CHECK-7A: str  [[REG]],
71; CHECK-6M-LABEL: t4:
72; CHECK-6M: muls [[REG:r[0-9]+]],
73; CHECK-6M: strh [[REG]],
74; CHECK-6M: strh [[REG]],
75  br label %for.body
76
77for.body:
78  %i = phi i32 [ 0, %entry ], [ %inc, %for.body ]
79  %0 = trunc i32 %i to i8
80  call void @llvm.memset.p0.i32(ptr align 2 %p, i8 %0, i32 4, i1 false)
81  call void @something(ptr %p)
82  %inc = add nuw nsw i32 %i, 1
83  %exitcond = icmp eq i32 %inc, 255
84  br i1 %exitcond, label %for.end, label %for.body
85
86for.end:
87  ret void
88}
89
90declare void @something(ptr) nounwind
91declare void @llvm.memset.p0.i32(ptr nocapture, i8, i32, i1) nounwind
92declare void @llvm.memset.p0.i64(ptr nocapture, i8, i64, i1) nounwind
93