xref: /llvm-project/llvm/test/CodeGen/ARM/memset-align.ll (revision bed1c7f061aa12417aa081e334afdba45767b938)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=thumbv8-unknown-linux-android -o - | FileCheck %s
3
4%struct.af = type <{ i64, i64, i8, i8, i8, [5 x i8] }>
5
6define void @test() {
7; CHECK-LABEL: test:
8; CHECK:       @ %bb.0: @ %entry
9; CHECK-NEXT:    .save {r7, lr}
10; CHECK-NEXT:    push {r7, lr}
11; CHECK-NEXT:    .pad #24
12; CHECK-NEXT:    sub sp, #24
13; CHECK-NEXT:    vmov.i32 q8, #0x0
14; CHECK-NEXT:    mov r0, sp
15; CHECK-NEXT:    mov.w r1, #-1
16; CHECK-NEXT:    mov r2, r0
17; CHECK-NEXT:    strd r1, r1, [sp, #8]
18; CHECK-NEXT:    strd r1, r1, [sp]
19; CHECK-NEXT:    vst1.64 {d16, d17}, [r2]!
20; CHECK-NEXT:    str r1, [r2]
21; CHECK-NEXT:    str r1, [sp, #20]
22; CHECK-NEXT:    movs r1, #0
23; CHECK-NEXT:    str.w r1, [sp, #15]
24; CHECK-NEXT:    bl callee
25; CHECK-NEXT:    add sp, #24
26; CHECK-NEXT:    pop {r7, pc}
27entry:
28  %a = alloca %struct.af, align 8
29  call void @llvm.memset.p0.i64(ptr align 8 %a, i8 -1, i64 24, i1 false)
30  call void @llvm.memset.p0.i64(ptr align 8 %a, i8 0, i64 19, i1 false)
31  call void @callee(ptr %a)
32  ret void
33}
34
35declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg)
36declare void @callee(ptr) local_unnamed_addr #1
37