xref: /llvm-project/llvm/test/CodeGen/ARM/memcpy-ldm-stm.ll (revision bed1c7f061aa12417aa081e334afdba45767b938)
1; RUN: llc -mtriple=thumbv6m-eabi -verify-machineinstrs %s -o - | \
2; RUN:    FileCheck %s --check-prefix=CHECK --check-prefix=CHECKV6
3; RUN: llc -mtriple=thumbv6m-eabi -O=0 -verify-machineinstrs %s -o - | \
4; RUN:    FileCheck %s --check-prefix=CHECK --check-prefix=CHECKV6
5; RUN: llc -mtriple=thumbv7a-eabi -mattr=-neon -verify-machineinstrs %s -o - | \
6; RUN:    FileCheck %s --check-prefix=CHECK --check-prefix=CHECKV7
7; RUN: llc -mtriple=armv7a-eabi -mattr=-neon -verify-machineinstrs %s -o - | \
8; RUN:    FileCheck %s --check-prefix=CHECK --check-prefix=CHECKV7
9
10@d = external global [64 x i32]
11@s = external global [64 x i32]
12
13; Function Attrs: nounwind
14define void @t1() #0 {
15entry:
16; CHECK-LABEL: t1:
17; CHECKV6: ldr [[LB:r[0-7]]],
18; CHECKV6-NEXT: ldr [[SB:r[0-7]]],
19; We use '[rl0-9]+' to allow 'r0'..'r12', 'lr'
20; CHECKV7: movt [[LB:[rl0-9]+]], :upper16:d
21; CHECKV7-NEXT: movt [[SB:[rl0-9]+]], :upper16:s
22; CHECK-NEXT: ldm{{(\.w)?}} [[LB]]!,
23; CHECK-NEXT: stm{{(\.w)?}} [[SB]]!,
24; Think of the monstrosity '[[[LB]]]' as '[ [[LB]] ]' without the spaces.
25; CHECK-NEXT: ldrb{{(\.w)?}} {{.*}}, [[[LB]]]
26; CHECK-NEXT: strb{{(\.w)?}} {{.*}}, [[[SB]]]
27    tail call void @llvm.memcpy.p0.p0.i32(ptr align 4 @s, ptr align 4 @d, i32 17, i1 false)
28    ret void
29}
30
31; Function Attrs: nounwind
32define void @t2() #0 {
33entry:
34; CHECK-LABEL: t2:
35; CHECKV6: ldr [[LB:r[0-7]]],
36; CHECKV6-NEXT: ldr [[SB:r[0-7]]],
37; CHECKV6-NEXT: ldm{{(\.w)?}} [[LB]]!,
38; CHECKV6-NEXT: stm{{(\.w)?}} [[SB]]!,
39; CHECKV6-DAG: ldrh{{(\.w)?}} {{.*}}, [[[LB]]]
40; CHECKV6-DAG: ldrb{{(\.w)?}} {{.*}}, [[[LB]], #2]
41; CHECKV6-DAG: strb{{(\.w)?}} {{.*}}, [[[SB]], #2]
42; CHECKV6-DAG: strh{{(\.w)?}} {{.*}}, [[[SB]]]
43; CHECKV7: movt [[LB:[rl0-9]+]], :upper16:d
44; CHECKV7-NEXT: movt [[SB:[rl0-9]+]], :upper16:s
45; CHECKV7: ldr{{(\.w)?}} {{.*}}, [[[LB]], #11]
46; CHECKV7-NEXT: str{{(\.w)?}} {{.*}}, [[[SB]], #11]
47    tail call void @llvm.memcpy.p0.p0.i32(ptr align 4 @s, ptr align 4 @d, i32 15, i1 false)
48    ret void
49}
50
51; PR23768
52%struct.T = type { i8, i64, i8 }
53
54@copy = external global %struct.T, align 8
55@etest = external global %struct.T, align 8
56
57define void @t3() {
58  call void @llvm.memcpy.p0.p0.i32(
59     ptr align 8 @copy,
60     ptr align 8 @etest,
61     i32 24, i1 false)
62  call void @llvm.memcpy.p0.p0.i32(
63     ptr align 8 @copy,
64     ptr align 8 @etest,
65     i32 24, i1 false)
66  ret void
67}
68
69%struct.S = type { [12 x i32] }
70
71; CHECK-LABEL: test3
72define void @test3(ptr %d, ptr %s) #0 {
73  tail call void @llvm.memcpy.p0.p0.i32(ptr align 4 %d, ptr align 4 %s, i32 48, i1 false)
74; 3 ldm/stm pairs in v6; 2 in v7
75; CHECK: ldm{{(\.w)?}} {{[rl0-9]+!?}}, [[REGLIST1:{.*}]]
76; CHECK: stm{{(\.w)?}} {{[rl0-9]+!?}}, [[REGLIST1]]
77; CHECK: ldm{{(\.w)?}} {{[rl0-9]+!?}}, [[REGLIST2:{.*}]]
78; CHECK: stm{{(\.w)?}} {{[rl0-9]+!?}}, [[REGLIST2]]
79; CHECKV6: ldm {{r[0-7]!?}}, [[REGLIST3:{.*}]]
80; CHECKV6: stm {{r[0-7]!?}}, [[REGLIST3]]
81; CHECKV7-NOT: ldm
82; CHECKV7-NOT: stm
83  %arrayidx = getelementptr inbounds %struct.S, ptr %s, i32 0, i32 0, i32 1
84  tail call void @g(ptr %arrayidx) #3
85  ret void
86}
87
88declare void @g(ptr)
89
90; Set "frame-pointer"="all" to increase register pressure
91attributes #0 = { "frame-pointer"="all" }
92
93; Function Attrs: nounwind
94declare void @llvm.memcpy.p0.p0.i32(ptr nocapture, ptr nocapture readonly, i32, i1) #1
95