xref: /llvm-project/llvm/test/CodeGen/ARM/memcpy-inline.ll (revision bed1c7f061aa12417aa081e334afdba45767b938)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 -pre-RA-sched=source -disable-post-ra | FileCheck %s
3; RUN: llc < %s -mtriple=thumbv6m-none-eabi -mcpu=cortex-m0 -pre-RA-sched=source -disable-post-ra -mattr=+strict-align | FileCheck %s --check-prefix=CHECK-T1
4%struct.x = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 }
5
6@src = external global %struct.x
7@dst = external global %struct.x
8
9@.str1 = private unnamed_addr constant [31 x i8] c"DHRYSTONE PROGRAM, SOME STRING\00", align 1
10@.str2 = private unnamed_addr constant [36 x i8] c"DHRYSTONE PROGRAM, SOME STRING BLAH\00", align 1
11@.str3 = private unnamed_addr constant [24 x i8] c"DHRYSTONE PROGRAM, SOME\00", align 1
12@.str4 = private unnamed_addr constant [18 x i8] c"DHRYSTONE PROGR  \00", align 1
13@.str5 = private unnamed_addr constant [7 x i8] c"DHRYST\00", align 1
14@.str6 = private unnamed_addr constant [14 x i8] c"/tmp/rmXXXXXX\00", align 1
15@spool.splbuf = internal global [512 x i8] zeroinitializer, align 16
16
17define i32 @t0() {
18; CHECK-LABEL: t0:
19; CHECK:       @ %bb.0: @ %entry
20; CHECK-NEXT:    movw r0, :lower16:(L_dst$non_lazy_ptr-(LPC0_0+4))
21; CHECK-NEXT:    movt r0, :upper16:(L_dst$non_lazy_ptr-(LPC0_0+4))
22; CHECK-NEXT:  LPC0_0:
23; CHECK-NEXT:    add r0, pc
24; CHECK-NEXT:    ldr r0, [r0]
25; CHECK-NEXT:    movw r1, :lower16:(L_src$non_lazy_ptr-(LPC0_1+4))
26; CHECK-NEXT:    movt r1, :upper16:(L_src$non_lazy_ptr-(LPC0_1+4))
27; CHECK-NEXT:  LPC0_1:
28; CHECK-NEXT:    add r1, pc
29; CHECK-NEXT:    ldr r1, [r1]
30; CHECK-NEXT:    ldr.w r2, [r1, #7]
31; CHECK-NEXT:    str.w r2, [r0, #7]
32; CHECK-NEXT:    vldr d16, [r1]
33; CHECK-NEXT:    vstr d16, [r0]
34; CHECK-NEXT:    movs r0, #0
35; CHECK-NEXT:    bx lr
36;
37; CHECK-T1-LABEL: t0:
38; CHECK-T1:       @ %bb.0: @ %entry
39; CHECK-T1-NEXT:    ldr r0, .LCPI0_0
40; CHECK-T1-NEXT:    ldrb r1, [r0, #10]
41; CHECK-T1-NEXT:    ldr r2, .LCPI0_1
42; CHECK-T1-NEXT:    strb r1, [r2, #10]
43; CHECK-T1-NEXT:    ldrh r1, [r0, #8]
44; CHECK-T1-NEXT:    strh r1, [r2, #8]
45; CHECK-T1-NEXT:    ldr r1, [r0]
46; CHECK-T1-NEXT:    ldr r0, [r0, #4]
47; CHECK-T1-NEXT:    str r1, [r2]
48; CHECK-T1-NEXT:    str r0, [r2, #4]
49; CHECK-T1-NEXT:    movs r0, #0
50; CHECK-T1-NEXT:    bx lr
51; CHECK-T1-NEXT:    .p2align 2
52; CHECK-T1-NEXT:  @ %bb.1:
53; CHECK-T1-NEXT:  .LCPI0_0:
54; CHECK-T1-NEXT:    .long src
55; CHECK-T1-NEXT:  .LCPI0_1:
56; CHECK-T1-NEXT:    .long dst
57entry:
58  call void @llvm.memcpy.p0.p0.i32(ptr align 8 @dst, ptr align 8 @src, i32 11, i1 false)
59  ret i32 0
60}
61
62define void @t1(ptr nocapture %C) nounwind {
63; CHECK-LABEL: t1:
64; CHECK:       @ %bb.0: @ %entry
65; CHECK-NEXT:    movw r1, :lower16:(L_.str1-(LPC1_0+4))
66; CHECK-NEXT:    movt r1, :upper16:(L_.str1-(LPC1_0+4))
67; CHECK-NEXT:  LPC1_0:
68; CHECK-NEXT:    add r1, pc
69; CHECK-NEXT:    movs r2, #15
70; CHECK-NEXT:    vld1.8 {d16, d17}, [r1], r2
71; CHECK-NEXT:    vst1.8 {d16, d17}, [r0], r2
72; CHECK-NEXT:    vld1.8 {d16, d17}, [r1]
73; CHECK-NEXT:    vst1.8 {d16, d17}, [r0]
74; CHECK-NEXT:    bx lr
75;
76; CHECK-T1-LABEL: t1:
77; CHECK-T1:       @ %bb.0: @ %entry
78; CHECK-T1-NEXT:    .save {r7, lr}
79; CHECK-T1-NEXT:    push {r7, lr}
80; CHECK-T1-NEXT:    ldr r1, .LCPI1_0
81; CHECK-T1-NEXT:    movs r2, #31
82; CHECK-T1-NEXT:    bl __aeabi_memcpy
83; CHECK-T1-NEXT:    pop {r7, pc}
84; CHECK-T1-NEXT:    .p2align 2
85; CHECK-T1-NEXT:  @ %bb.1:
86; CHECK-T1-NEXT:  .LCPI1_0:
87; CHECK-T1-NEXT:    .long .L.str1
88entry:
89  tail call void @llvm.memcpy.p0.p0.i64(ptr %C, ptr @.str1, i64 31, i1 false)
90  ret void
91}
92
93define void @t2(ptr nocapture %C) nounwind {
94; CHECK-LABEL: t2:
95; CHECK:       @ %bb.0: @ %entry
96; CHECK-NEXT:    movw r1, :lower16:(L_.str2-(LPC2_0+4))
97; CHECK-NEXT:    movt r1, :upper16:(L_.str2-(LPC2_0+4))
98; CHECK-NEXT:  LPC2_0:
99; CHECK-NEXT:    add r1, pc
100; CHECK-NEXT:    vld1.8 {d16, d17}, [r1]!
101; CHECK-NEXT:    vst1.8 {d16, d17}, [r0]!
102; CHECK-NEXT:    vld1.64 {d16, d17}, [r1]
103; CHECK-NEXT:    vst1.8 {d16, d17}, [r0]!
104; CHECK-NEXT:    movw r1, #16716
105; CHECK-NEXT:    movt r1, #72
106; CHECK-NEXT:    str r1, [r0]
107; CHECK-NEXT:    bx lr
108;
109; CHECK-T1-LABEL: t2:
110; CHECK-T1:       @ %bb.0: @ %entry
111; CHECK-T1-NEXT:    .save {r7, lr}
112; CHECK-T1-NEXT:    push {r7, lr}
113; CHECK-T1-NEXT:    ldr r1, .LCPI2_0
114; CHECK-T1-NEXT:    movs r2, #36
115; CHECK-T1-NEXT:    bl __aeabi_memcpy
116; CHECK-T1-NEXT:    pop {r7, pc}
117; CHECK-T1-NEXT:    .p2align 2
118; CHECK-T1-NEXT:  @ %bb.1:
119; CHECK-T1-NEXT:  .LCPI2_0:
120; CHECK-T1-NEXT:    .long .L.str2
121entry:
122  tail call void @llvm.memcpy.p0.p0.i64(ptr %C, ptr @.str2, i64 36, i1 false)
123  ret void
124}
125
126define void @t3(ptr nocapture %C) nounwind {
127; CHECK-LABEL: t3:
128; CHECK:       @ %bb.0: @ %entry
129; CHECK-NEXT:    movw r1, :lower16:(L_.str3-(LPC3_0+4))
130; CHECK-NEXT:    movt r1, :upper16:(L_.str3-(LPC3_0+4))
131; CHECK-NEXT:  LPC3_0:
132; CHECK-NEXT:    add r1, pc
133; CHECK-NEXT:    vld1.8 {d16, d17}, [r1]!
134; CHECK-NEXT:    vst1.8 {d16, d17}, [r0]!
135; CHECK-NEXT:    vldr d16, [r1]
136; CHECK-NEXT:    vst1.8 {d16}, [r0]
137; CHECK-NEXT:    bx lr
138;
139; CHECK-T1-LABEL: t3:
140; CHECK-T1:       @ %bb.0: @ %entry
141; CHECK-T1-NEXT:    .save {r7, lr}
142; CHECK-T1-NEXT:    push {r7, lr}
143; CHECK-T1-NEXT:    ldr r1, .LCPI3_0
144; CHECK-T1-NEXT:    movs r2, #24
145; CHECK-T1-NEXT:    bl __aeabi_memcpy
146; CHECK-T1-NEXT:    pop {r7, pc}
147; CHECK-T1-NEXT:    .p2align 2
148; CHECK-T1-NEXT:  @ %bb.1:
149; CHECK-T1-NEXT:  .LCPI3_0:
150; CHECK-T1-NEXT:    .long .L.str3
151entry:
152  tail call void @llvm.memcpy.p0.p0.i64(ptr %C, ptr @.str3, i64 24, i1 false)
153  ret void
154}
155
156define void @t4(ptr nocapture %C) nounwind {
157; CHECK-LABEL: t4:
158; CHECK:       @ %bb.0: @ %entry
159; CHECK-NEXT:    movw r1, :lower16:(L_.str4-(LPC4_0+4))
160; CHECK-NEXT:    movt r1, :upper16:(L_.str4-(LPC4_0+4))
161; CHECK-NEXT:  LPC4_0:
162; CHECK-NEXT:    add r1, pc
163; CHECK-NEXT:    vld1.64 {d16, d17}, [r1]
164; CHECK-NEXT:    vst1.8 {d16, d17}, [r0]!
165; CHECK-NEXT:    movs r1, #32
166; CHECK-NEXT:    strh r1, [r0]
167; CHECK-NEXT:    bx lr
168;
169; CHECK-T1-LABEL: t4:
170; CHECK-T1:       @ %bb.0: @ %entry
171; CHECK-T1-NEXT:    .save {r7, lr}
172; CHECK-T1-NEXT:    push {r7, lr}
173; CHECK-T1-NEXT:    ldr r1, .LCPI4_0
174; CHECK-T1-NEXT:    movs r2, #18
175; CHECK-T1-NEXT:    bl __aeabi_memcpy
176; CHECK-T1-NEXT:    pop {r7, pc}
177; CHECK-T1-NEXT:    .p2align 2
178; CHECK-T1-NEXT:  @ %bb.1:
179; CHECK-T1-NEXT:  .LCPI4_0:
180; CHECK-T1-NEXT:    .long .L.str4
181entry:
182  tail call void @llvm.memcpy.p0.p0.i64(ptr %C, ptr @.str4, i64 18, i1 false)
183  ret void
184}
185
186define void @t5(ptr nocapture %C) nounwind {
187; CHECK-LABEL: t5:
188; CHECK:       @ %bb.0: @ %entry
189; CHECK-NEXT:    movw r1, #21337
190; CHECK-NEXT:    movt r1, #84
191; CHECK-NEXT:    str.w r1, [r0, #3]
192; CHECK-NEXT:    movw r1, #18500
193; CHECK-NEXT:    movt r1, #22866
194; CHECK-NEXT:    str r1, [r0]
195; CHECK-NEXT:    bx lr
196;
197; CHECK-T1-LABEL: t5:
198; CHECK-T1:       @ %bb.0: @ %entry
199; CHECK-T1-NEXT:    .save {r7, lr}
200; CHECK-T1-NEXT:    push {r7, lr}
201; CHECK-T1-NEXT:    ldr r1, .LCPI5_0
202; CHECK-T1-NEXT:    movs r2, #7
203; CHECK-T1-NEXT:    bl __aeabi_memcpy
204; CHECK-T1-NEXT:    pop {r7, pc}
205; CHECK-T1-NEXT:    .p2align 2
206; CHECK-T1-NEXT:  @ %bb.1:
207; CHECK-T1-NEXT:  .LCPI5_0:
208; CHECK-T1-NEXT:    .long .L.str5
209entry:
210  tail call void @llvm.memcpy.p0.p0.i64(ptr %C, ptr @.str5, i64 7, i1 false)
211  ret void
212}
213
214define void @t6() nounwind {
215; CHECK-LABEL: t6:
216; CHECK:       @ %bb.0: @ %entry
217; CHECK-NEXT:    movw r0, :lower16:(L_.str6-(LPC6_0+4))
218; CHECK-NEXT:    movt r0, :upper16:(L_.str6-(LPC6_0+4))
219; CHECK-NEXT:  LPC6_0:
220; CHECK-NEXT:    add r0, pc
221; CHECK-NEXT:    vldr d16, [r0]
222; CHECK-NEXT:    movw r1, :lower16:(_spool.splbuf-(LPC6_1+4))
223; CHECK-NEXT:    movt r1, :upper16:(_spool.splbuf-(LPC6_1+4))
224; CHECK-NEXT:  LPC6_1:
225; CHECK-NEXT:    add r1, pc
226; CHECK-NEXT:    vstr d16, [r1]
227; CHECK-NEXT:    adds r1, #6
228; CHECK-NEXT:    adds r0, #6
229; CHECK-NEXT:    vld1.16 {d16}, [r0]
230; CHECK-NEXT:    vst1.16 {d16}, [r1]
231; CHECK-NEXT:    bx lr
232;
233; CHECK-T1-LABEL: t6:
234; CHECK-T1:       @ %bb.0: @ %entry
235; CHECK-T1-NEXT:    ldr r0, .LCPI6_0
236; CHECK-T1-NEXT:    movs r1, #88
237; CHECK-T1-NEXT:    strh r1, [r0, #12]
238; CHECK-T1-NEXT:    ldr r1, .LCPI6_1
239; CHECK-T1-NEXT:    ldr r2, .LCPI6_2
240; CHECK-T1-NEXT:    ldr r3, .LCPI6_3
241; CHECK-T1-NEXT:    str r3, [r0]
242; CHECK-T1-NEXT:    str r2, [r0, #4]
243; CHECK-T1-NEXT:    str r1, [r0, #8]
244; CHECK-T1-NEXT:    bx lr
245; CHECK-T1-NEXT:    .p2align 2
246; CHECK-T1-NEXT:  @ %bb.1:
247; CHECK-T1-NEXT:  .LCPI6_0:
248; CHECK-T1-NEXT:    .long spool.splbuf
249; CHECK-T1-NEXT:  .LCPI6_1:
250; CHECK-T1-NEXT:    .long 1482184792 @ 0x58585858
251; CHECK-T1-NEXT:  .LCPI6_2:
252; CHECK-T1-NEXT:    .long 1483567663 @ 0x586d722f
253; CHECK-T1-NEXT:  .LCPI6_3:
254; CHECK-T1-NEXT:    .long 1886221359 @ 0x706d742f
255entry:
256  call void @llvm.memcpy.p0.p0.i64(ptr @spool.splbuf, ptr @.str6, i64 14, i1 false)
257  ret void
258}
259
260%struct.Foo = type { i32, i32, i32, i32 }
261
262define void @t7(ptr nocapture %a, ptr nocapture %b) nounwind {
263; CHECK-LABEL: t7:
264; CHECK:       @ %bb.0: @ %entry
265; CHECK-NEXT:    vld1.32 {d16, d17}, [r1]
266; CHECK-NEXT:    vst1.32 {d16, d17}, [r0]
267; CHECK-NEXT:    bx lr
268;
269; CHECK-T1-LABEL: t7:
270; CHECK-T1:       @ %bb.0: @ %entry
271; CHECK-T1-NEXT:    ldr r2, [r1, #12]
272; CHECK-T1-NEXT:    str r2, [r0, #12]
273; CHECK-T1-NEXT:    ldr r2, [r1, #8]
274; CHECK-T1-NEXT:    str r2, [r0, #8]
275; CHECK-T1-NEXT:    ldr r2, [r1, #4]
276; CHECK-T1-NEXT:    str r2, [r0, #4]
277; CHECK-T1-NEXT:    ldr r1, [r1]
278; CHECK-T1-NEXT:    str r1, [r0]
279; CHECK-T1-NEXT:    bx lr
280entry:
281  tail call void @llvm.memcpy.p0.p0.i32(ptr align 4 %a, ptr align 4 %b, i32 16, i1 false)
282  ret void
283}
284
285declare void @llvm.memcpy.p0.p0.i32(ptr nocapture, ptr nocapture, i32, i1) nounwind
286declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) nounwind
287