1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc %s -o - -run-pass=machine-sink -mtriple=arm-none-eabi | FileCheck %s 3 4--- | 5 target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64" 6 target triple = "arm-none-unknown-eabi" 7 8 %struct.anon = type { i32, i32 } 9 10 @e = external constant [2 x %struct.anon], align 4 11 12 define arm_aapcscc void @g(ptr noalias %a, ptr %b, i32 %x) { 13 entry: 14 %c = getelementptr inbounds [2 x %struct.anon], ptr @e, i32 0, i32 %x, i32 0 15 %l1 = load i32, ptr %c, align 4 16 %d = getelementptr inbounds [2 x %struct.anon], ptr @e, i32 0, i32 %x, i32 1 17 %l2 = load i32, ptr %d, align 4 18 br i1 undef, label %land.lhs.true, label %if.end 19 20 land.lhs.true: ; preds = %entry 21 br label %if.end 22 23 if.end: ; preds = %land.lhs.true, %entry 24 %h.0 = phi i32 [ %l1, %entry ], [ 0, %land.lhs.true ] 25 ret void 26 } 27 28... 29--- 30name: g 31tracksRegLiveness: true 32registers: 33 - { id: 0, class: gpr, preferred-register: '' } 34 - { id: 1, class: gpr, preferred-register: '' } 35 - { id: 2, class: gpr, preferred-register: '' } 36 - { id: 6, class: gpr, preferred-register: '' } 37 - { id: 7, class: gpr, preferred-register: '' } 38 - { id: 8, class: gpr, preferred-register: '' } 39 - { id: 9, class: gprnopc, preferred-register: '' } 40liveins: 41 - { reg: '$r0', virtual-reg: '%8' } 42 - { reg: '$r1', virtual-reg: '%9' } 43body: | 44 ; CHECK-LABEL: name: g 45 ; CHECK: bb.0: 46 ; CHECK: successors: %bb.1(0x40000000), %bb.3(0x40000000) 47 ; CHECK: liveins: $r0, $r1 48 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r1 49 ; CHECK: [[COPY1:%[0-9]+]]:gprnopc = COPY $r0 50 ; CHECK: [[LDR_PRE_REG:%[0-9]+]]:gpr, [[LDR_PRE_REG1:%[0-9]+]]:gpr = LDR_PRE_REG [[COPY]], killed [[COPY1]], 16387, 14 /* CC::al */, $noreg :: (load (s32) from %ir.c) 51 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14 /* CC::al */, $noreg, $noreg 52 ; CHECK: CMPri [[MOVi]], 0, 14 /* CC::al */, $noreg, implicit-def $cpsr 53 ; CHECK: Bcc %bb.1, 0 /* CC::eq */, $cpsr 54 ; CHECK: bb.3: 55 ; CHECK: successors: %bb.2(0x80000000) 56 ; CHECK: B %bb.2 57 ; CHECK: bb.1: 58 ; CHECK: successors: %bb.2(0x80000000) 59 ; CHECK: bb.2: 60 ; CHECK: [[PHI:%[0-9]+]]:gpr = PHI [[LDR_PRE_REG]], %bb.3, [[MOVi]], %bb.1 61 ; CHECK: CMPri [[MOVi]], 0, 14 /* CC::al */, $noreg, implicit-def $cpsr 62 ; CHECK: [[LDRi12_:%[0-9]+]]:gpr = LDRi12 killed [[LDR_PRE_REG1]], 4, 14 /* CC::al */, $noreg :: (load (s32) from %ir.d) 63 ; CHECK: MOVPCLR 14 /* CC::al */, $noreg 64 bb.0: 65 liveins: $r0, $r1 66 successors: %bb.1(0x40000000), %bb.2(0x40000000) 67 68 %8:gpr = COPY $r1 69 %9:gprnopc = COPY $r0 70 %0:gpr, %6:gpr = LDR_PRE_REG %8, killed %9, 16387, 14, $noreg :: (load (s32) from %ir.c) 71 %7:gpr = MOVi 0, 14, $noreg, $noreg 72 CMPri %7, 0, 14, $noreg, implicit-def $cpsr 73 Bcc %bb.2, 1, $cpsr 74 B %bb.1 75 76 bb.1: 77 successors: %bb.2(0x80000000) 78 79 bb.2: 80 81 %2:gpr = PHI %0, %bb.0, %7, %bb.1 82 CMPri %7, 0, 14, $noreg, implicit-def $cpsr 83 %1:gpr = LDRi12 killed %6, 4, 14, $noreg :: (load (s32) from %ir.d) 84 MOVPCLR 14, $noreg 85 86... 87