xref: /llvm-project/llvm/test/CodeGen/ARM/machine-sink-multidef.ll (revision 02ba5b8c6b9f0c1ce6df421db5dd5eb307d7d27d)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=arm-none-eabi | FileCheck %s
3
4%struct.anon.1.19.23.27.35.49.55.57.59.61.89.95 = type { i32, i32 }
5
6@e = external constant [2 x %struct.anon.1.19.23.27.35.49.55.57.59.61.89.95], align 4
7@f = external global i32, align 4
8
9define arm_aapcscc void @g() {
10; CHECK-LABEL: g:
11; CHECK:       @ %bb.0: @ %entry
12; CHECK-NEXT:    ldr r0, .LCPI0_0
13; CHECK-NEXT:    mov r2, #0
14; CHECK-NEXT:    ldr r1, .LCPI0_1
15; CHECK-NEXT:    cmp r2, #0
16; CHECK-NEXT:    ldr r0, [r0]
17; CHECK-NEXT:    ldr r0, [r1, r0, lsl #3]!
18; CHECK-NEXT:    moveq r0, #0
19; CHECK-NEXT:    cmp r2, #0
20; CHECK-NEXT:    movne pc, lr
21; CHECK-NEXT:  .LBB0_1: @ %if.then5
22; CHECK-NEXT:    .save {r11, lr}
23; CHECK-NEXT:    push {r11, lr}
24; CHECK-NEXT:    ldr r1, [r1, #4]
25; CHECK-NEXT:    bl k
26; CHECK-NEXT:    .p2align 2
27; CHECK-NEXT:  @ %bb.2:
28; CHECK-NEXT:  .LCPI0_0:
29; CHECK-NEXT:    .long f
30; CHECK-NEXT:  .LCPI0_1:
31; CHECK-NEXT:    .long e
32entry:
33  %0 = load i32, ptr @f, align 4
34  %c = getelementptr inbounds [2 x %struct.anon.1.19.23.27.35.49.55.57.59.61.89.95], ptr @e, i32 0, i32 %0, i32 0
35  %1 = load i32, ptr %c, align 4
36  %d = getelementptr inbounds [2 x %struct.anon.1.19.23.27.35.49.55.57.59.61.89.95], ptr @e, i32 0, i32 %0, i32 1
37  %2 = load i32, ptr %d, align 4
38  br i1 undef, label %land.lhs.true, label %if.end
39
40land.lhs.true:                                    ; preds = %entry
41  br label %if.end
42
43if.end:                                           ; preds = %land.lhs.true, %entry
44  %h.0 = phi i32 [ %1, %entry ], [ 0, %land.lhs.true ]
45  br i1 undef, label %if.end7, label %if.then5
46
47if.then5:                                         ; preds = %if.end
48  %call6 = call arm_aapcscc i32 @k(i32 %h.0, i32 %2)
49  unreachable
50
51if.end7:                                          ; preds = %if.end
52  ret void
53}
54
55declare arm_aapcscc i32 @k(...)
56
57