xref: /llvm-project/llvm/test/CodeGen/ARM/lrint-conv.ll (revision 6d7bf5e8df5455fa32cc437f7043bbb0a0607d49) 
1; RUN: llc < %s -mtriple=arm-eabi -float-abi=soft | FileCheck %s --check-prefix=SOFTFP
2; RUN: llc < %s -mtriple=arm-eabi -float-abi=hard | FileCheck %s --check-prefix=HARDFP
3
4; SOFTFP-LABEL: testmsws_builtin:
5; SOFTFP:       bl      lrintf
6; HARDFP-LABEL: testmsws_builtin:
7; HARDFP:       bl      lrintf
8define i32 @testmsws_builtin(float %x) {
9entry:
10  %0 = tail call i32 @llvm.lrint.i32.f32(float %x)
11  ret i32 %0
12}
13
14; SOFTFP-LABEL: testmswd_builtin:
15; SOFTFP:       bl      lrint
16; HARDFP-LABEL: testmswd_builtin:
17; HARDFP:       bl      lrint
18define i32 @testmswd_builtin(double %x) {
19entry:
20  %0 = tail call i32 @llvm.lrint.i32.f64(double %x)
21  ret i32 %0
22}
23
24declare i32 @llvm.lrint.i32.f32(float) nounwind readnone
25declare i32 @llvm.lrint.i32.f64(double) nounwind readnone
26