xref: /llvm-project/llvm/test/CodeGen/ARM/lower-vmax.ll (revision 7bff37783f72ed99e4cdd0fd7dad1bf1f119f793)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=arm-eabihf -mattr=+neon < %s | FileCheck -check-prefixes=CHECK-NO_NEON %s
3; RUN: llc -mtriple=arm-eabihf -mattr=+neon,+neonfp < %s | FileCheck -check-prefixes=CHECK-NEON %s
4
5define float @max_f32(float, float) {
6; CHECK-NO_NEON-LABEL: max_f32:
7; CHECK-NO_NEON:       @ %bb.0:
8; CHECK-NO_NEON-NEXT:    vcmp.f32 s1, s0
9; CHECK-NO_NEON-NEXT:    vmrs APSR_nzcv, fpscr
10; CHECK-NO_NEON-NEXT:    vmovgt.f32 s0, s1
11; CHECK-NO_NEON-NEXT:    mov pc, lr
12;
13; CHECK-NEON-LABEL: max_f32:
14; CHECK-NEON:       @ %bb.0:
15; CHECK-NEON-NEXT:    vcmp.f32 s1, s0
16; CHECK-NEON-NEXT:    vmrs APSR_nzcv, fpscr
17; CHECK-NEON-NEXT:    vmovgt.f32 s0, s1
18; CHECK-NEON-NEXT:    mov pc, lr
19  %3 = call nnan float @llvm.maxnum.f32(float %1, float %0)
20  ret float %3
21}
22
23declare float @llvm.maxnum.f32(float, float) #1
24
25define float @min_f32(float, float) {
26; CHECK-NO_NEON-LABEL: min_f32:
27; CHECK-NO_NEON:       @ %bb.0:
28; CHECK-NO_NEON-NEXT:    vcmp.f32 s1, s0
29; CHECK-NO_NEON-NEXT:    vmrs APSR_nzcv, fpscr
30; CHECK-NO_NEON-NEXT:    vmovlt.f32 s0, s1
31; CHECK-NO_NEON-NEXT:    mov pc, lr
32;
33; CHECK-NEON-LABEL: min_f32:
34; CHECK-NEON:       @ %bb.0:
35; CHECK-NEON-NEXT:    vcmp.f32 s1, s0
36; CHECK-NEON-NEXT:    vmrs APSR_nzcv, fpscr
37; CHECK-NEON-NEXT:    vmovlt.f32 s0, s1
38; CHECK-NEON-NEXT:    mov pc, lr
39  %3 = call nnan float @llvm.minnum.f32(float %1, float %0)
40  ret float %3
41}
42
43declare float @llvm.minnum.f32(float, float) #1
44
45