1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5 2; RUN: llc -mtriple=arm-none-eabi -stop-after=finalize-isel < %s | FileCheck %s 3 4define void @test(ptr %vol_one, ptr %p_in, ptr %p_out, i32 %n) { 5 ; CHECK-LABEL: name: test 6 ; CHECK: bb.0.entry: 7 ; CHECK-NEXT: liveins: $r0, $r1, $r2 8 ; CHECK-NEXT: {{ $}} 9 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $r2 10 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $r1 11 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr = COPY $r0 12 ; CHECK-NEXT: [[LDRi12_:%[0-9]+]]:gpr = LDRi12 [[COPY1]], 0, 14 /* CC::al */, $noreg :: (load (s32) from %ir.p_in) 13 ; CHECK-NEXT: STRi12 killed [[LDRi12_]], [[COPY2]], 0, 14 /* CC::al */, $noreg :: (volatile store (s32) into %ir.vol_one) 14 ; CHECK-NEXT: [[LDRi12_1:%[0-9]+]]:gpr = LDRi12 [[COPY2]], 4, 14 /* CC::al */, $noreg :: (volatile load (s32) from %ir.vol_two) 15 ; CHECK-NEXT: STRi12 killed [[LDRi12_1]], [[COPY]], 0, 14 /* CC::al */, $noreg :: (store (s32) into %ir.p_out) 16 ; CHECK-NEXT: MOVPCLR 14 /* CC::al */, $noreg 17entry: 18 %vol_two = getelementptr inbounds i8, ptr %vol_one, i32 4 19 %a = load float, ptr %p_in, align 4 20 store volatile float %a, ptr %vol_one, align 4 21 %b = load volatile float, ptr %vol_two, align 4 22 store float %b, ptr %p_out, align 4 23 ret void 24} 25