1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=armv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s 3; Check if the f32 load / store pair are optimized to i32 load / store. 4; rdar://8944252 5 6define void @t(i32 %width, ptr nocapture %src, ptr nocapture %dst, i32 %index) nounwind { 7; CHECK-LABEL: t: 8; CHECK: @ %bb.0: @ %entry 9; CHECK-NEXT: cmp r0, #0 10; CHECK-NEXT: bxeq lr 11; CHECK-NEXT: LBB0_1: @ %bb 12; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 13; CHECK-NEXT: ldr r9, [r1], r3 14; CHECK-NEXT: subs r0, r0, #1 15; CHECK-NEXT: str r9, [r2], #4 16; CHECK-NEXT: bne LBB0_1 17; CHECK-NEXT: @ %bb.2: @ %return 18; CHECK-NEXT: bx lr 19entry: 20 %0 = icmp eq i32 %width, 0 21 br i1 %0, label %return, label %bb 22 23bb: 24 %j.05 = phi i32 [ %2, %bb ], [ 0, %entry ] 25 %tmp = mul i32 %j.05, %index 26 %uglygep = getelementptr i8, ptr %src, i32 %tmp 27 %dst_addr.03 = getelementptr float, ptr %dst, i32 %j.05 28 %1 = load float, ptr %uglygep, align 4 29 store float %1, ptr %dst_addr.03, align 4 30 %2 = add i32 %j.05, 1 31 %exitcond = icmp eq i32 %2, %width 32 br i1 %exitcond, label %return, label %bb 33 34return: 35 ret void 36} 37 38@a1 = local_unnamed_addr global float 0.000000e+00, align 4 39@a2 = local_unnamed_addr global float 0.000000e+00, align 4 40@a3 = local_unnamed_addr global float 0.000000e+00, align 4 41@a4 = local_unnamed_addr global float 0.000000e+00, align 4 42@a5 = local_unnamed_addr global float 0.000000e+00, align 4 43@a6 = local_unnamed_addr global float 0.000000e+00, align 4 44@a7 = local_unnamed_addr global float 0.000000e+00, align 4 45@a8 = local_unnamed_addr global float 0.000000e+00, align 4 46 47 48declare void @_Z3fooddddddddddddddd(float, float, float, float, float, float, float, float) 49 50; Because this test function is trying to pass float argument by stack, 51; it can be optimized to i32 load / store 52define signext i32 @test() { 53%1 = load float, ptr @a1, align 4 54%2 = load float, ptr @a2, align 4 55%3 = load float, ptr @a3, align 4 56%4 = load float, ptr @a4, align 4 57%5 = load float, ptr @a5, align 4 58%6 = load float, ptr @a6, align 4 59%7 = load float, ptr @a7, align 4 60%8 = load float, ptr @a8, align 4 61tail call void @_Z3fooddddddddddddddd(float %1, float %2, float %3, float %4, float %5, float %6, float %7, float %8) 62ret i32 0 63} 64 65; CHECK-LABEL: _test: 66; CHECK: ldr r3, [pc, r3] 67; CHECK: ldr r2, [pc, r2] 68; CHECK: ldr r1, [pc, r1] 69; CHECK: ldr r0, [pc, r0] 70; CHECK: ldr r9, [pc, r9] 71; CHECK: ldr r12, [pc, r12] 72; CHECK: ldr lr, [pc, lr] 73; CHECK: stm sp, {r9, r12, lr} 74; CHECK: ldr r4, [pc, r4] 75; CHECK: str r4, [sp, #12] 76; CHECK: bl __Z3fooddddddddddddddd 77