xref: /llvm-project/llvm/test/CodeGen/ARM/ldr_frame.ll (revision bed1c7f061aa12417aa081e334afdba45767b938)
1; RUN: llc -mtriple=arm-eabi -mattr=+v4t %s -o - | FileCheck %s
2
3; CHECK-LABEL: f1
4; CHECK-NOT: mov
5define i32 @f1() {
6	%buf = alloca [32 x i32], align 4
7	%tmp1 = load i32, ptr %buf
8	ret i32 %tmp1
9}
10
11; CHECK-LABEL: f2
12; CHECK-NOT: mov
13define i32 @f2() {
14	%buf = alloca [32 x i8], align 4
15	%tmp1 = load i8, ptr %buf
16        %tmp2 = zext i8 %tmp1 to i32
17	ret i32 %tmp2
18}
19
20; CHECK-LABEL: f3
21; CHECK-NOT: mov
22define i32 @f3() {
23	%buf = alloca [32 x i32], align 4
24	%tmp = getelementptr [32 x i32], ptr %buf, i32 0, i32 32
25	%tmp1 = load i32, ptr %tmp
26	ret i32 %tmp1
27}
28
29; CHECK-LABEL: f4
30; CHECK-NOT: mov
31define i32 @f4() {
32	%buf = alloca [32 x i8], align 4
33	%tmp = getelementptr [32 x i8], ptr %buf, i32 0, i32 2
34	%tmp1 = load i8, ptr %tmp
35        %tmp2 = zext i8 %tmp1 to i32
36	ret i32 %tmp2
37}
38