xref: /llvm-project/llvm/test/CodeGen/ARM/ldaex-stlex.ll (revision bed1c7f061aa12417aa081e334afdba45767b938)
1; RUN: llc < %s -mtriple=armv8-apple-darwin   | FileCheck %s
2; RUN: llc < %s -mtriple=thumbv8-apple-darwin | FileCheck %s
3
4%0 = type { i32, i32 }
5
6; CHECK-LABEL: f0:
7; CHECK: ldaexd
8define i64 @f0(ptr %p) nounwind readonly {
9entry:
10  %ldaexd = tail call %0 @llvm.arm.ldaexd(ptr %p)
11  %0 = extractvalue %0 %ldaexd, 1
12  %1 = extractvalue %0 %ldaexd, 0
13  %2 = zext i32 %0 to i64
14  %3 = zext i32 %1 to i64
15  %shl = shl nuw i64 %2, 32
16  %4 = or i64 %shl, %3
17  ret i64 %4
18}
19
20; CHECK-LABEL: f1:
21; CHECK: stlexd
22define i32 @f1(ptr %ptr, i64 %val) nounwind {
23entry:
24  %tmp4 = trunc i64 %val to i32
25  %tmp6 = lshr i64 %val, 32
26  %tmp7 = trunc i64 %tmp6 to i32
27  %stlexd = tail call i32 @llvm.arm.stlexd(i32 %tmp4, i32 %tmp7, ptr %ptr)
28  ret i32 %stlexd
29}
30
31declare %0 @llvm.arm.ldaexd(ptr) nounwind readonly
32declare i32 @llvm.arm.stlexd(i32, i32, ptr) nounwind
33
34; CHECK-LABEL: test_load_i8:
35; CHECK: ldaexb r0, [r0]
36; CHECK-NOT: uxtb
37; CHECK-NOT: and
38define zeroext i8 @test_load_i8(ptr %addr) {
39  %val = call i32 @llvm.arm.ldaex.p0(ptr elementtype(i8) %addr)
40  %val8 = trunc i32 %val to i8
41  ret i8 %val8
42}
43
44; CHECK-LABEL: test_load_i16:
45; CHECK: ldaexh r0, [r0]
46; CHECK-NOT: uxth
47; CHECK-NOT: and
48define zeroext i16 @test_load_i16(ptr %addr) {
49  %val = call i32 @llvm.arm.ldaex.p0(ptr elementtype(i16) %addr)
50  %val16 = trunc i32 %val to i16
51  ret i16 %val16
52}
53
54; CHECK-LABEL: test_load_i32:
55; CHECK: ldaex r0, [r0]
56define i32 @test_load_i32(ptr %addr) {
57  %val = call i32 @llvm.arm.ldaex.p0(ptr elementtype(i32) %addr)
58  ret i32 %val
59}
60
61declare i32 @llvm.arm.ldaex.p0(ptr) nounwind readonly
62
63; CHECK-LABEL: test_store_i8:
64; CHECK-NOT: uxtb
65; CHECK: stlexb r0, r1, [r2]
66define i32 @test_store_i8(i32, i8 %val, ptr %addr) {
67  %extval = zext i8 %val to i32
68  %res = call i32 @llvm.arm.stlex.p0(i32 %extval, ptr elementtype(i8) %addr)
69  ret i32 %res
70}
71
72; CHECK-LABEL: test_store_i16:
73; CHECK-NOT: uxth
74; CHECK: stlexh r0, r1, [r2]
75define i32 @test_store_i16(i32, i16 %val, ptr %addr) {
76  %extval = zext i16 %val to i32
77  %res = call i32 @llvm.arm.stlex.p0(i32 %extval, ptr elementtype(i16) %addr)
78  ret i32 %res
79}
80
81; CHECK-LABEL: test_store_i32:
82; CHECK: stlex r0, r1, [r2]
83define i32 @test_store_i32(i32, i32 %val, ptr %addr) {
84  %res = call i32 @llvm.arm.stlex.p0(i32 %val, ptr elementtype(i32) %addr)
85  ret i32 %res
86}
87
88declare i32 @llvm.arm.stlex.p0(i32, ptr) nounwind
89