1*4c3e1e3cSJon Roelofs; RUN: llc -mtriple=thumb-none-eabi %s -o - -mcpu=cortex-m0 -asm-print-latency=1 | FileCheck %s --match-full-lines --check-prefix=ON 2*4c3e1e3cSJon Roelofs; RUN: llc -mtriple=thumb-none-eabi %s -o - -mcpu=cortex-m0 -asm-print-latency=0 | FileCheck %s --match-full-lines --check-prefix=OFF 3*4c3e1e3cSJon Roelofs; RUN: llc -mtriple=thumb-none-eabi %s -o - -mcpu=cortex-m0 | FileCheck %s --match-full-lines --check-prefix=OFF 4*4c3e1e3cSJon Roelofs 5*4c3e1e3cSJon Roelofsdefine i64 @load_i64(ptr %ptr){ 6*4c3e1e3cSJon Roelofs; ON: ldr r2, [r0] @ Latency: 4 7*4c3e1e3cSJon Roelofs; ON: ldr r1, [r0, #4] @ Latency: 4 8*4c3e1e3cSJon Roelofs; ON: mov r0, r2 @ Latency: 2 9*4c3e1e3cSJon Roelofs; ON: bx lr 10*4c3e1e3cSJon Roelofs; OFF: ldr r2, [r0] 11*4c3e1e3cSJon Roelofs; OFF: ldr r1, [r0, #4] 12*4c3e1e3cSJon Roelofs; OFF: mov r0, r2 13*4c3e1e3cSJon Roelofs; OFf: bx lr 14*4c3e1e3cSJon Roelofs %a = load i64, ptr %ptr 15*4c3e1e3cSJon Roelofs ret i64 %a 16*4c3e1e3cSJon Roelofs} 17