1; RUN: llc -mtriple=thumb-none-eabi %s -o - -mcpu=cortex-m0 -asm-print-latency=1 | FileCheck %s --match-full-lines --check-prefix=ON 2; RUN: llc -mtriple=thumb-none-eabi %s -o - -mcpu=cortex-m0 -asm-print-latency=0 | FileCheck %s --match-full-lines --check-prefix=OFF 3; RUN: llc -mtriple=thumb-none-eabi %s -o - -mcpu=cortex-m0 | FileCheck %s --match-full-lines --check-prefix=OFF 4 5define i64 @load_i64(ptr %ptr){ 6; ON: ldr r2, [r0] @ Latency: 4 7; ON: ldr r1, [r0, #4] @ Latency: 4 8; ON: mov r0, r2 @ Latency: 2 9; ON: bx lr 10; OFF: ldr r2, [r0] 11; OFF: ldr r1, [r0, #4] 12; OFF: mov r0, r2 13; OFf: bx lr 14 %a = load i64, ptr %ptr 15 ret i64 %a 16} 17