xref: /llvm-project/llvm/test/CodeGen/ARM/large-vector.ll (revision dc8a41de34933bc10c4d5d89c539dd0dc80d59cc)
1; RUN: llc -mtriple=thumbv7k-apple-watchos %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-V7K
2; RUN: llc -mtriple=thumbv7-linux-gnueabihf %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AAPCS
3; RUN: llc -mtriple=thumbv7-apple-ios %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-APCS
4
5define <32 x i8> @test_consume_arg([9 x double], <32 x i8> %vec) {
6; CHECK-LABEL: test_consume_arg:
7
8; CHECK-V7K: add r[[BASE:[0-9]+]], sp, #16
9; CHECK-V7K: vld1.64 {d0, d1}, [r[[BASE]]:128]
10; CHECK-V7K: add r[[BASE:[0-9]+]], sp, #32
11; CHECK-V7K: vld1.64 {d2, d3}, [r[[BASE]]:128]
12
13; CHECK-AAPCS: add r[[BASE:[0-9]+]], sp, #8
14; CHECK-AAPCS: vld1.64 {d0, d1}, [r[[BASE]]]
15; CHECK-AAPCS: add r[[BASE:[0-9]+]], sp, #24
16; CHECK-AAPCS: vld1.64 {d2, d3}, [r[[BASE]]]
17
18; CHECK-APCS: add r[[BASE:[0-9]+]], sp, #76
19; CHECK-APCS: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[BASE]]]
20; CHECK-APCS: add r[[BASE:[0-9]+]], sp, #60
21; CHECK-APCS: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[BASE]]]
22
23  ret <32 x i8> %vec
24}
25
26define void @test_produce_arg() {
27; CHECK-LABEL: test_produce_arg:
28
29; CHECK-V7K: add r[[BASE:[0-9]+]], sp, #16
30; CHECK-V7K: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[BASE]]:128]!
31; CHECK-V7K: vst1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[BASE]]:128]
32
33; CHECK-AAPCS: add r[[BASE:[0-9]+]], sp, #8
34; CHECK-AAPCS: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[BASE]]]!
35; CHECK-AAPCS: vst1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[BASE]]]
36
37; CHECK-APCS: mov r[[R4:[0-9]+]], sp
38; CHECK-APCS: mov r[[BASE:[0-9]+]], sp
39; CHECK-APCS: str {{r[0-9]+}}, [r[[BASE]]], #60
40; CHECK-APCS: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[BASE]]]!
41; CHECK-APCS: vst1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[BASE]]]
42
43call <32 x i8> @test_consume_arg([9 x double] undef, <32 x i8> zeroinitializer)
44  ret void
45}
46