xref: /llvm-project/llvm/test/CodeGen/ARM/inlineasm-fp-half.ll (revision 9ee4fe63bc0ad4c685760272e464c1591bfc16ea) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2
3; No FP16/BF16
4; RUN: llc -mtriple=arm-none-eabi     -mattr=+armv8-a,+fp-armv8,-fullfp16,-bf16,-neon %s -o - | FileCheck %s --check-prefix=NO-FP16-SOFTFP
5; RUN: llc -mtriple=thumb-none-eabi   -mattr=+armv8-a,+fp-armv8,-fullfp16,-bf16,-neon %s -o - | FileCheck %s --check-prefix=NO-FP16-SOFTFP
6; RUN: llc -mtriple=arm-none-eabi     -mattr=+armv8-a,+fp-armv8,-fullfp16,-bf16,+neon %s -o - | FileCheck %s --check-prefix=NO-FP16-SOFTFP
7; RUN: llc -mtriple=thumb-none-eabi   -mattr=+armv8-a,+fp-armv8,-fullfp16,-bf16,+neon %s -o - | FileCheck %s --check-prefix=NO-FP16-SOFTFP
8; RUN: llc -mtriple=arm-none-eabihf   -mattr=+armv8-a,+fp-armv8,-fullfp16,-bf16,-neon %s -o - | FileCheck %s --check-prefix=NO-FP16-HARD
9; RUN: llc -mtriple=thumb-none-eabihf -mattr=+armv8-a,+fp-armv8,-fullfp16,-bf16,-neon %s -o - | FileCheck %s --check-prefix=NO-FP16-HARD
10; RUN: llc -mtriple=arm-none-eabihf   -mattr=+armv8-a,+fp-armv8,-fullfp16,-bf16,+neon %s -o - | FileCheck %s --check-prefix=NO-FP16-HARD
11; RUN: llc -mtriple=thumb-none-eabihf -mattr=+armv8-a,+fp-armv8,-fullfp16,-bf16,+neon %s -o - | FileCheck %s --check-prefix=NO-FP16-HARD
12
13; With FP16, Without BF16
14; RUN: llc -mtriple=arm-none-eabi     -mattr=+armv8-a,+fp-armv8,+fullfp16,-bf16,-neon %s -o - | FileCheck %s --check-prefix=FP16-SOFTFP
15; RUN: llc -mtriple=thumb-none-eabi   -mattr=+armv8-a,+fp-armv8,+fullfp16,-bf16,-neon %s -o - | FileCheck %s --check-prefix=FP16-SOFTFP
16; RUN: llc -mtriple=arm-none-eabi     -mattr=+armv8-a,+fp-armv8,+fullfp16,-bf16,+neon %s -o - | FileCheck %s --check-prefix=FP16-SOFTFP
17; RUN: llc -mtriple=thumb-none-eabi   -mattr=+armv8-a,+fp-armv8,+fullfp16,-bf16,+neon %s -o - | FileCheck %s --check-prefix=FP16-SOFTFP
18; RUN: llc -mtriple=arm-none-eabihf   -mattr=+armv8-a,+fp-armv8,+fullfp16,-bf16,-neon %s -o - | FileCheck %s --check-prefix=FP16-HARD
19; RUN: llc -mtriple=thumb-none-eabihf -mattr=+armv8-a,+fp-armv8,+fullfp16,-bf16,-neon %s -o - | FileCheck %s --check-prefix=FP16-HARD
20; RUN: llc -mtriple=arm-none-eabihf   -mattr=+armv8-a,+fp-armv8,+fullfp16,-bf16,+neon %s -o - | FileCheck %s --check-prefix=FP16-HARD
21; RUN: llc -mtriple=thumb-none-eabihf -mattr=+armv8-a,+fp-armv8,+fullfp16,-bf16,+neon %s -o - | FileCheck %s --check-prefix=FP16-HARD
22
23; With FP16/BF16
24; RUN: llc -mtriple=arm-none-eabi     -mattr=+armv8-a,+fp-armv8,+fullfp16,+bf16,-neon %s -o - | FileCheck %s --check-prefix=BF16-SOFTFP
25; RUN: llc -mtriple=thumb-none-eabi   -mattr=+armv8-a,+fp-armv8,+fullfp16,+bf16,-neon %s -o - | FileCheck %s --check-prefix=BF16-SOFTFP
26; RUN: llc -mtriple=arm-none-eabi     -mattr=+armv8-a,+fp-armv8,+fullfp16,+bf16,+neon %s -o - | FileCheck %s --check-prefix=SIMD-BF16-SOFTFP
27; RUN: llc -mtriple=thumb-none-eabi   -mattr=+armv8-a,+fp-armv8,+fullfp16,+bf16,+neon %s -o - | FileCheck %s --check-prefix=SIMD-BF16-SOFTFP
28; RUN: llc -mtriple=arm-none-eabihf   -mattr=+armv8-a,+fp-armv8,+fullfp16,+bf16,-neon %s -o - | FileCheck %s --check-prefix=BF16-HARD
29; RUN: llc -mtriple=thumb-none-eabihf -mattr=+armv8-a,+fp-armv8,+fullfp16,+bf16,-neon %s -o - | FileCheck %s --check-prefix=BF16-HARD
30; RUN: llc -mtriple=arm-none-eabihf   -mattr=+armv8-a,+fp-armv8,+fullfp16,+bf16,+neon %s -o - | FileCheck %s --check-prefix=SIMD-BF16-HARD
31; RUN: llc -mtriple=thumb-none-eabihf -mattr=+armv8-a,+fp-armv8,+fullfp16,+bf16,+neon %s -o - | FileCheck %s --check-prefix=SIMD-BF16-HARD
32
33; This test ensures that we can use `w` and `t` constraints to allocate
34; S-registers for 16-bit FP inputs and outputs for inline assembly, with either
35; the softfp or hard float ABIs. (With the soft abi, no S-regs are available).
36
37define half @half_t(half %x) nounwind {
38; NO-FP16-SOFTFP-LABEL: half_t:
39; NO-FP16-SOFTFP:       @ %bb.0: @ %entry
40; NO-FP16-SOFTFP-NEXT:    vmov s0, r0
41; NO-FP16-SOFTFP-NEXT:    @APP
42; NO-FP16-SOFTFP-NEXT:    vmov.f32 s0, s0
43; NO-FP16-SOFTFP-NEXT:    @NO_APP
44; NO-FP16-SOFTFP-NEXT:    vmov r0, s0
45; NO-FP16-SOFTFP-NEXT:    bx lr
46;
47; NO-FP16-HARD-LABEL: half_t:
48; NO-FP16-HARD:       @ %bb.0: @ %entry
49; NO-FP16-HARD-NEXT:    @APP
50; NO-FP16-HARD-NEXT:    vmov.f32 s0, s0
51; NO-FP16-HARD-NEXT:    @NO_APP
52; NO-FP16-HARD-NEXT:    bx lr
53;
54; FP16-SOFTFP-LABEL: half_t:
55; FP16-SOFTFP:       @ %bb.0: @ %entry
56; FP16-SOFTFP-NEXT:    vmov.f16 s0, r0
57; FP16-SOFTFP-NEXT:    vmov.f16 r0, s0
58; FP16-SOFTFP-NEXT:    vmov s0, r0
59; FP16-SOFTFP-NEXT:    @APP
60; FP16-SOFTFP-NEXT:    vmov.f32 s0, s0
61; FP16-SOFTFP-NEXT:    @NO_APP
62; FP16-SOFTFP-NEXT:    vmov r0, s0
63; FP16-SOFTFP-NEXT:    bx lr
64;
65; FP16-HARD-LABEL: half_t:
66; FP16-HARD:       @ %bb.0: @ %entry
67; FP16-HARD-NEXT:    vmov.f16 r0, s0
68; FP16-HARD-NEXT:    vmov s0, r0
69; FP16-HARD-NEXT:    @APP
70; FP16-HARD-NEXT:    vmov.f32 s0, s0
71; FP16-HARD-NEXT:    @NO_APP
72; FP16-HARD-NEXT:    bx lr
73;
74; BF16-SOFTFP-LABEL: half_t:
75; BF16-SOFTFP:       @ %bb.0: @ %entry
76; BF16-SOFTFP-NEXT:    vmov.f16 s0, r0
77; BF16-SOFTFP-NEXT:    vmov.f16 r0, s0
78; BF16-SOFTFP-NEXT:    vmov s0, r0
79; BF16-SOFTFP-NEXT:    @APP
80; BF16-SOFTFP-NEXT:    vmov.f32 s0, s0
81; BF16-SOFTFP-NEXT:    @NO_APP
82; BF16-SOFTFP-NEXT:    vmov r0, s0
83; BF16-SOFTFP-NEXT:    bx lr
84;
85; SIMD-BF16-SOFTFP-LABEL: half_t:
86; SIMD-BF16-SOFTFP:       @ %bb.0: @ %entry
87; SIMD-BF16-SOFTFP-NEXT:    vmov.f16 s0, r0
88; SIMD-BF16-SOFTFP-NEXT:    vmov.f16 r0, s0
89; SIMD-BF16-SOFTFP-NEXT:    vmov s0, r0
90; SIMD-BF16-SOFTFP-NEXT:    @APP
91; SIMD-BF16-SOFTFP-NEXT:    vmov.f32 s0, s0
92; SIMD-BF16-SOFTFP-NEXT:    @NO_APP
93; SIMD-BF16-SOFTFP-NEXT:    vmov r0, s0
94; SIMD-BF16-SOFTFP-NEXT:    bx lr
95;
96; BF16-HARD-LABEL: half_t:
97; BF16-HARD:       @ %bb.0: @ %entry
98; BF16-HARD-NEXT:    vmov.f16 r0, s0
99; BF16-HARD-NEXT:    vmov s0, r0
100; BF16-HARD-NEXT:    @APP
101; BF16-HARD-NEXT:    vmov.f32 s0, s0
102; BF16-HARD-NEXT:    @NO_APP
103; BF16-HARD-NEXT:    bx lr
104;
105; SIMD-BF16-HARD-LABEL: half_t:
106; SIMD-BF16-HARD:       @ %bb.0: @ %entry
107; SIMD-BF16-HARD-NEXT:    vmov.f16 r0, s0
108; SIMD-BF16-HARD-NEXT:    vmov s0, r0
109; SIMD-BF16-HARD-NEXT:    @APP
110; SIMD-BF16-HARD-NEXT:    vmov.f32 s0, s0
111; SIMD-BF16-HARD-NEXT:    @NO_APP
112; SIMD-BF16-HARD-NEXT:    bx lr
113entry:
114  %0 = tail call half asm "vmov $0, $1", "=t,t"(half %x)
115  ret half %0
116}
117
118define half @half_w(half %x) nounwind {
119; NO-FP16-SOFTFP-LABEL: half_w:
120; NO-FP16-SOFTFP:       @ %bb.0: @ %entry
121; NO-FP16-SOFTFP-NEXT:    vmov s0, r0
122; NO-FP16-SOFTFP-NEXT:    @APP
123; NO-FP16-SOFTFP-NEXT:    vmov.f32 s0, s0
124; NO-FP16-SOFTFP-NEXT:    @NO_APP
125; NO-FP16-SOFTFP-NEXT:    vmov r0, s0
126; NO-FP16-SOFTFP-NEXT:    bx lr
127;
128; NO-FP16-HARD-LABEL: half_w:
129; NO-FP16-HARD:       @ %bb.0: @ %entry
130; NO-FP16-HARD-NEXT:    @APP
131; NO-FP16-HARD-NEXT:    vmov.f32 s0, s0
132; NO-FP16-HARD-NEXT:    @NO_APP
133; NO-FP16-HARD-NEXT:    bx lr
134;
135; FP16-SOFTFP-LABEL: half_w:
136; FP16-SOFTFP:       @ %bb.0: @ %entry
137; FP16-SOFTFP-NEXT:    vmov.f16 s0, r0
138; FP16-SOFTFP-NEXT:    vmov.f16 r0, s0
139; FP16-SOFTFP-NEXT:    vmov s0, r0
140; FP16-SOFTFP-NEXT:    @APP
141; FP16-SOFTFP-NEXT:    vmov.f32 s0, s0
142; FP16-SOFTFP-NEXT:    @NO_APP
143; FP16-SOFTFP-NEXT:    vmov r0, s0
144; FP16-SOFTFP-NEXT:    bx lr
145;
146; FP16-HARD-LABEL: half_w:
147; FP16-HARD:       @ %bb.0: @ %entry
148; FP16-HARD-NEXT:    vmov.f16 r0, s0
149; FP16-HARD-NEXT:    vmov s0, r0
150; FP16-HARD-NEXT:    @APP
151; FP16-HARD-NEXT:    vmov.f32 s0, s0
152; FP16-HARD-NEXT:    @NO_APP
153; FP16-HARD-NEXT:    bx lr
154;
155; BF16-SOFTFP-LABEL: half_w:
156; BF16-SOFTFP:       @ %bb.0: @ %entry
157; BF16-SOFTFP-NEXT:    vmov.f16 s0, r0
158; BF16-SOFTFP-NEXT:    vmov.f16 r0, s0
159; BF16-SOFTFP-NEXT:    vmov s0, r0
160; BF16-SOFTFP-NEXT:    @APP
161; BF16-SOFTFP-NEXT:    vmov.f32 s0, s0
162; BF16-SOFTFP-NEXT:    @NO_APP
163; BF16-SOFTFP-NEXT:    vmov r0, s0
164; BF16-SOFTFP-NEXT:    bx lr
165;
166; SIMD-BF16-SOFTFP-LABEL: half_w:
167; SIMD-BF16-SOFTFP:       @ %bb.0: @ %entry
168; SIMD-BF16-SOFTFP-NEXT:    vmov.f16 s0, r0
169; SIMD-BF16-SOFTFP-NEXT:    vmov.f16 r0, s0
170; SIMD-BF16-SOFTFP-NEXT:    vmov s0, r0
171; SIMD-BF16-SOFTFP-NEXT:    @APP
172; SIMD-BF16-SOFTFP-NEXT:    vmov.f32 s0, s0
173; SIMD-BF16-SOFTFP-NEXT:    @NO_APP
174; SIMD-BF16-SOFTFP-NEXT:    vmov r0, s0
175; SIMD-BF16-SOFTFP-NEXT:    bx lr
176;
177; BF16-HARD-LABEL: half_w:
178; BF16-HARD:       @ %bb.0: @ %entry
179; BF16-HARD-NEXT:    vmov.f16 r0, s0
180; BF16-HARD-NEXT:    vmov s0, r0
181; BF16-HARD-NEXT:    @APP
182; BF16-HARD-NEXT:    vmov.f32 s0, s0
183; BF16-HARD-NEXT:    @NO_APP
184; BF16-HARD-NEXT:    bx lr
185;
186; SIMD-BF16-HARD-LABEL: half_w:
187; SIMD-BF16-HARD:       @ %bb.0: @ %entry
188; SIMD-BF16-HARD-NEXT:    vmov.f16 r0, s0
189; SIMD-BF16-HARD-NEXT:    vmov s0, r0
190; SIMD-BF16-HARD-NEXT:    @APP
191; SIMD-BF16-HARD-NEXT:    vmov.f32 s0, s0
192; SIMD-BF16-HARD-NEXT:    @NO_APP
193; SIMD-BF16-HARD-NEXT:    bx lr
194entry:
195  %0 = tail call half asm "vmov $0, $1", "=w,w"(half %x)
196  ret half %0
197}
198
199define half @half_x(half %x) nounwind {
200; NO-FP16-SOFTFP-LABEL: half_x:
201; NO-FP16-SOFTFP:       @ %bb.0: @ %entry
202; NO-FP16-SOFTFP-NEXT:    vmov s0, r0
203; NO-FP16-SOFTFP-NEXT:    @APP
204; NO-FP16-SOFTFP-NEXT:    vmov.f32 s0, s0
205; NO-FP16-SOFTFP-NEXT:    @NO_APP
206; NO-FP16-SOFTFP-NEXT:    vmov r0, s0
207; NO-FP16-SOFTFP-NEXT:    bx lr
208;
209; NO-FP16-HARD-LABEL: half_x:
210; NO-FP16-HARD:       @ %bb.0: @ %entry
211; NO-FP16-HARD-NEXT:    @APP
212; NO-FP16-HARD-NEXT:    vmov.f32 s0, s0
213; NO-FP16-HARD-NEXT:    @NO_APP
214; NO-FP16-HARD-NEXT:    bx lr
215;
216; FP16-SOFTFP-LABEL: half_x:
217; FP16-SOFTFP:       @ %bb.0: @ %entry
218; FP16-SOFTFP-NEXT:    vmov.f16 s0, r0
219; FP16-SOFTFP-NEXT:    vmov.f16 r0, s0
220; FP16-SOFTFP-NEXT:    vmov s0, r0
221; FP16-SOFTFP-NEXT:    @APP
222; FP16-SOFTFP-NEXT:    vmov.f32 s0, s0
223; FP16-SOFTFP-NEXT:    @NO_APP
224; FP16-SOFTFP-NEXT:    vmov r0, s0
225; FP16-SOFTFP-NEXT:    bx lr
226;
227; FP16-HARD-LABEL: half_x:
228; FP16-HARD:       @ %bb.0: @ %entry
229; FP16-HARD-NEXT:    vmov.f16 r0, s0
230; FP16-HARD-NEXT:    vmov s0, r0
231; FP16-HARD-NEXT:    @APP
232; FP16-HARD-NEXT:    vmov.f32 s0, s0
233; FP16-HARD-NEXT:    @NO_APP
234; FP16-HARD-NEXT:    bx lr
235;
236; BF16-SOFTFP-LABEL: half_x:
237; BF16-SOFTFP:       @ %bb.0: @ %entry
238; BF16-SOFTFP-NEXT:    vmov.f16 s0, r0
239; BF16-SOFTFP-NEXT:    vmov.f16 r0, s0
240; BF16-SOFTFP-NEXT:    vmov s0, r0
241; BF16-SOFTFP-NEXT:    @APP
242; BF16-SOFTFP-NEXT:    vmov.f32 s0, s0
243; BF16-SOFTFP-NEXT:    @NO_APP
244; BF16-SOFTFP-NEXT:    vmov r0, s0
245; BF16-SOFTFP-NEXT:    bx lr
246;
247; SIMD-BF16-SOFTFP-LABEL: half_x:
248; SIMD-BF16-SOFTFP:       @ %bb.0: @ %entry
249; SIMD-BF16-SOFTFP-NEXT:    vmov.f16 s0, r0
250; SIMD-BF16-SOFTFP-NEXT:    vmov.f16 r0, s0
251; SIMD-BF16-SOFTFP-NEXT:    vmov s0, r0
252; SIMD-BF16-SOFTFP-NEXT:    @APP
253; SIMD-BF16-SOFTFP-NEXT:    vmov.f32 s0, s0
254; SIMD-BF16-SOFTFP-NEXT:    @NO_APP
255; SIMD-BF16-SOFTFP-NEXT:    vmov r0, s0
256; SIMD-BF16-SOFTFP-NEXT:    bx lr
257;
258; BF16-HARD-LABEL: half_x:
259; BF16-HARD:       @ %bb.0: @ %entry
260; BF16-HARD-NEXT:    vmov.f16 r0, s0
261; BF16-HARD-NEXT:    vmov s0, r0
262; BF16-HARD-NEXT:    @APP
263; BF16-HARD-NEXT:    vmov.f32 s0, s0
264; BF16-HARD-NEXT:    @NO_APP
265; BF16-HARD-NEXT:    bx lr
266;
267; SIMD-BF16-HARD-LABEL: half_x:
268; SIMD-BF16-HARD:       @ %bb.0: @ %entry
269; SIMD-BF16-HARD-NEXT:    vmov.f16 r0, s0
270; SIMD-BF16-HARD-NEXT:    vmov s0, r0
271; SIMD-BF16-HARD-NEXT:    @APP
272; SIMD-BF16-HARD-NEXT:    vmov.f32 s0, s0
273; SIMD-BF16-HARD-NEXT:    @NO_APP
274; SIMD-BF16-HARD-NEXT:    bx lr
275entry:
276  %0 = tail call half asm "vmov $0, $1", "=x,x"(half %x)
277  ret half %0
278}
279
280define bfloat @bf16_t(bfloat %x) nounwind {
281; NO-FP16-SOFTFP-LABEL: bf16_t:
282; NO-FP16-SOFTFP:       @ %bb.0: @ %entry
283; NO-FP16-SOFTFP-NEXT:    vmov s0, r0
284; NO-FP16-SOFTFP-NEXT:    @APP
285; NO-FP16-SOFTFP-NEXT:    vmov.f32 s0, s0
286; NO-FP16-SOFTFP-NEXT:    @NO_APP
287; NO-FP16-SOFTFP-NEXT:    vmov r0, s0
288; NO-FP16-SOFTFP-NEXT:    bx lr
289;
290; NO-FP16-HARD-LABEL: bf16_t:
291; NO-FP16-HARD:       @ %bb.0: @ %entry
292; NO-FP16-HARD-NEXT:    @APP
293; NO-FP16-HARD-NEXT:    vmov.f32 s0, s0
294; NO-FP16-HARD-NEXT:    @NO_APP
295; NO-FP16-HARD-NEXT:    bx lr
296;
297; FP16-SOFTFP-LABEL: bf16_t:
298; FP16-SOFTFP:       @ %bb.0: @ %entry
299; FP16-SOFTFP-NEXT:    vmov s0, r0
300; FP16-SOFTFP-NEXT:    @APP
301; FP16-SOFTFP-NEXT:    vmov.f32 s0, s0
302; FP16-SOFTFP-NEXT:    @NO_APP
303; FP16-SOFTFP-NEXT:    vmov r0, s0
304; FP16-SOFTFP-NEXT:    bx lr
305;
306; FP16-HARD-LABEL: bf16_t:
307; FP16-HARD:       @ %bb.0: @ %entry
308; FP16-HARD-NEXT:    @APP
309; FP16-HARD-NEXT:    vmov.f32 s0, s0
310; FP16-HARD-NEXT:    @NO_APP
311; FP16-HARD-NEXT:    bx lr
312;
313; BF16-SOFTFP-LABEL: bf16_t:
314; BF16-SOFTFP:       @ %bb.0: @ %entry
315; BF16-SOFTFP-NEXT:    vmov s0, r0
316; BF16-SOFTFP-NEXT:    @APP
317; BF16-SOFTFP-NEXT:    vmov.f32 s0, s0
318; BF16-SOFTFP-NEXT:    @NO_APP
319; BF16-SOFTFP-NEXT:    vmov r0, s0
320; BF16-SOFTFP-NEXT:    bx lr
321;
322; SIMD-BF16-SOFTFP-LABEL: bf16_t:
323; SIMD-BF16-SOFTFP:       @ %bb.0: @ %entry
324; SIMD-BF16-SOFTFP-NEXT:    vmov.f16 s0, r0
325; SIMD-BF16-SOFTFP-NEXT:    vmov.f16 r0, s0
326; SIMD-BF16-SOFTFP-NEXT:    vmov s0, r0
327; SIMD-BF16-SOFTFP-NEXT:    @APP
328; SIMD-BF16-SOFTFP-NEXT:    vmov.f32 s0, s0
329; SIMD-BF16-SOFTFP-NEXT:    @NO_APP
330; SIMD-BF16-SOFTFP-NEXT:    vmov r0, s0
331; SIMD-BF16-SOFTFP-NEXT:    bx lr
332;
333; BF16-HARD-LABEL: bf16_t:
334; BF16-HARD:       @ %bb.0: @ %entry
335; BF16-HARD-NEXT:    @APP
336; BF16-HARD-NEXT:    vmov.f32 s0, s0
337; BF16-HARD-NEXT:    @NO_APP
338; BF16-HARD-NEXT:    bx lr
339;
340; SIMD-BF16-HARD-LABEL: bf16_t:
341; SIMD-BF16-HARD:       @ %bb.0: @ %entry
342; SIMD-BF16-HARD-NEXT:    vmov.f16 r0, s0
343; SIMD-BF16-HARD-NEXT:    vmov s0, r0
344; SIMD-BF16-HARD-NEXT:    @APP
345; SIMD-BF16-HARD-NEXT:    vmov.f32 s0, s0
346; SIMD-BF16-HARD-NEXT:    @NO_APP
347; SIMD-BF16-HARD-NEXT:    bx lr
348entry:
349  %0 = tail call bfloat asm "vmov $0, $1", "=t,t"(bfloat %x)
350  ret bfloat %0
351}
352
353define bfloat @bf16_w(bfloat %x) nounwind {
354; NO-FP16-SOFTFP-LABEL: bf16_w:
355; NO-FP16-SOFTFP:       @ %bb.0: @ %entry
356; NO-FP16-SOFTFP-NEXT:    vmov s0, r0
357; NO-FP16-SOFTFP-NEXT:    @APP
358; NO-FP16-SOFTFP-NEXT:    vmov.f32 s0, s0
359; NO-FP16-SOFTFP-NEXT:    @NO_APP
360; NO-FP16-SOFTFP-NEXT:    vmov r0, s0
361; NO-FP16-SOFTFP-NEXT:    bx lr
362;
363; NO-FP16-HARD-LABEL: bf16_w:
364; NO-FP16-HARD:       @ %bb.0: @ %entry
365; NO-FP16-HARD-NEXT:    @APP
366; NO-FP16-HARD-NEXT:    vmov.f32 s0, s0
367; NO-FP16-HARD-NEXT:    @NO_APP
368; NO-FP16-HARD-NEXT:    bx lr
369;
370; FP16-SOFTFP-LABEL: bf16_w:
371; FP16-SOFTFP:       @ %bb.0: @ %entry
372; FP16-SOFTFP-NEXT:    vmov s0, r0
373; FP16-SOFTFP-NEXT:    @APP
374; FP16-SOFTFP-NEXT:    vmov.f32 s0, s0
375; FP16-SOFTFP-NEXT:    @NO_APP
376; FP16-SOFTFP-NEXT:    vmov r0, s0
377; FP16-SOFTFP-NEXT:    bx lr
378;
379; FP16-HARD-LABEL: bf16_w:
380; FP16-HARD:       @ %bb.0: @ %entry
381; FP16-HARD-NEXT:    @APP
382; FP16-HARD-NEXT:    vmov.f32 s0, s0
383; FP16-HARD-NEXT:    @NO_APP
384; FP16-HARD-NEXT:    bx lr
385;
386; BF16-SOFTFP-LABEL: bf16_w:
387; BF16-SOFTFP:       @ %bb.0: @ %entry
388; BF16-SOFTFP-NEXT:    vmov s0, r0
389; BF16-SOFTFP-NEXT:    @APP
390; BF16-SOFTFP-NEXT:    vmov.f32 s0, s0
391; BF16-SOFTFP-NEXT:    @NO_APP
392; BF16-SOFTFP-NEXT:    vmov r0, s0
393; BF16-SOFTFP-NEXT:    bx lr
394;
395; SIMD-BF16-SOFTFP-LABEL: bf16_w:
396; SIMD-BF16-SOFTFP:       @ %bb.0: @ %entry
397; SIMD-BF16-SOFTFP-NEXT:    vmov.f16 s0, r0
398; SIMD-BF16-SOFTFP-NEXT:    vmov.f16 r0, s0
399; SIMD-BF16-SOFTFP-NEXT:    vmov s0, r0
400; SIMD-BF16-SOFTFP-NEXT:    @APP
401; SIMD-BF16-SOFTFP-NEXT:    vmov.f32 s0, s0
402; SIMD-BF16-SOFTFP-NEXT:    @NO_APP
403; SIMD-BF16-SOFTFP-NEXT:    vmov r0, s0
404; SIMD-BF16-SOFTFP-NEXT:    bx lr
405;
406; BF16-HARD-LABEL: bf16_w:
407; BF16-HARD:       @ %bb.0: @ %entry
408; BF16-HARD-NEXT:    @APP
409; BF16-HARD-NEXT:    vmov.f32 s0, s0
410; BF16-HARD-NEXT:    @NO_APP
411; BF16-HARD-NEXT:    bx lr
412;
413; SIMD-BF16-HARD-LABEL: bf16_w:
414; SIMD-BF16-HARD:       @ %bb.0: @ %entry
415; SIMD-BF16-HARD-NEXT:    vmov.f16 r0, s0
416; SIMD-BF16-HARD-NEXT:    vmov s0, r0
417; SIMD-BF16-HARD-NEXT:    @APP
418; SIMD-BF16-HARD-NEXT:    vmov.f32 s0, s0
419; SIMD-BF16-HARD-NEXT:    @NO_APP
420; SIMD-BF16-HARD-NEXT:    bx lr
421entry:
422  %0 = tail call bfloat asm "vmov $0, $1", "=w,w"(bfloat %x)
423  ret bfloat %0
424}
425
426define bfloat @bf16_x(bfloat %x) nounwind {
427; NO-FP16-SOFTFP-LABEL: bf16_x:
428; NO-FP16-SOFTFP:       @ %bb.0: @ %entry
429; NO-FP16-SOFTFP-NEXT:    vmov s0, r0
430; NO-FP16-SOFTFP-NEXT:    @APP
431; NO-FP16-SOFTFP-NEXT:    vmov.f32 s0, s0
432; NO-FP16-SOFTFP-NEXT:    @NO_APP
433; NO-FP16-SOFTFP-NEXT:    vmov r0, s0
434; NO-FP16-SOFTFP-NEXT:    bx lr
435;
436; NO-FP16-HARD-LABEL: bf16_x:
437; NO-FP16-HARD:       @ %bb.0: @ %entry
438; NO-FP16-HARD-NEXT:    @APP
439; NO-FP16-HARD-NEXT:    vmov.f32 s0, s0
440; NO-FP16-HARD-NEXT:    @NO_APP
441; NO-FP16-HARD-NEXT:    bx lr
442;
443; FP16-SOFTFP-LABEL: bf16_x:
444; FP16-SOFTFP:       @ %bb.0: @ %entry
445; FP16-SOFTFP-NEXT:    vmov s0, r0
446; FP16-SOFTFP-NEXT:    @APP
447; FP16-SOFTFP-NEXT:    vmov.f32 s0, s0
448; FP16-SOFTFP-NEXT:    @NO_APP
449; FP16-SOFTFP-NEXT:    vmov r0, s0
450; FP16-SOFTFP-NEXT:    bx lr
451;
452; FP16-HARD-LABEL: bf16_x:
453; FP16-HARD:       @ %bb.0: @ %entry
454; FP16-HARD-NEXT:    @APP
455; FP16-HARD-NEXT:    vmov.f32 s0, s0
456; FP16-HARD-NEXT:    @NO_APP
457; FP16-HARD-NEXT:    bx lr
458;
459; BF16-SOFTFP-LABEL: bf16_x:
460; BF16-SOFTFP:       @ %bb.0: @ %entry
461; BF16-SOFTFP-NEXT:    vmov s0, r0
462; BF16-SOFTFP-NEXT:    @APP
463; BF16-SOFTFP-NEXT:    vmov.f32 s0, s0
464; BF16-SOFTFP-NEXT:    @NO_APP
465; BF16-SOFTFP-NEXT:    vmov r0, s0
466; BF16-SOFTFP-NEXT:    bx lr
467;
468; SIMD-BF16-SOFTFP-LABEL: bf16_x:
469; SIMD-BF16-SOFTFP:       @ %bb.0: @ %entry
470; SIMD-BF16-SOFTFP-NEXT:    vmov.f16 s0, r0
471; SIMD-BF16-SOFTFP-NEXT:    vmov.f16 r0, s0
472; SIMD-BF16-SOFTFP-NEXT:    vmov s0, r0
473; SIMD-BF16-SOFTFP-NEXT:    @APP
474; SIMD-BF16-SOFTFP-NEXT:    vmov.f32 s0, s0
475; SIMD-BF16-SOFTFP-NEXT:    @NO_APP
476; SIMD-BF16-SOFTFP-NEXT:    vmov r0, s0
477; SIMD-BF16-SOFTFP-NEXT:    bx lr
478;
479; BF16-HARD-LABEL: bf16_x:
480; BF16-HARD:       @ %bb.0: @ %entry
481; BF16-HARD-NEXT:    @APP
482; BF16-HARD-NEXT:    vmov.f32 s0, s0
483; BF16-HARD-NEXT:    @NO_APP
484; BF16-HARD-NEXT:    bx lr
485;
486; SIMD-BF16-HARD-LABEL: bf16_x:
487; SIMD-BF16-HARD:       @ %bb.0: @ %entry
488; SIMD-BF16-HARD-NEXT:    vmov.f16 r0, s0
489; SIMD-BF16-HARD-NEXT:    vmov s0, r0
490; SIMD-BF16-HARD-NEXT:    @APP
491; SIMD-BF16-HARD-NEXT:    vmov.f32 s0, s0
492; SIMD-BF16-HARD-NEXT:    @NO_APP
493; SIMD-BF16-HARD-NEXT:    bx lr
494entry:
495  %0 = tail call bfloat asm "vmov $0, $1", "=x,x"(bfloat %x)
496  ret bfloat %0
497}
498