1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 %s -o - | FileCheck %s 3; RUN: llc -mtriple=arm-eabi -mattr=+v4t %s -o - | FileCheck %s -check-prefix CHECK-V4-CMP 4; RUN: llc -mtriple=arm-eabi -mattr=+v4t %s -o - | FileCheck %s -check-prefix CHECK-V4-BX 5 6define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) { 7; CHECK-LABEL: t1: 8; CHECK: @ %bb.0: 9; CHECK-NEXT: cmp r2, #1 10; CHECK-NEXT: cmpne r2, #7 11; CHECK-NEXT: addne r0, r1, r0 12; CHECK-NEXT: addeq r0, r0, r1 13; CHECK-NEXT: addeq r0, r0, #1 14; CHECK-NEXT: bx lr 15; 16; CHECK-V4-CMP-LABEL: t1: 17; CHECK-V4-CMP: @ %bb.0: 18; CHECK-V4-CMP-NEXT: cmp r2, #7 19; CHECK-V4-CMP-NEXT: cmpne r2, #1 20; CHECK-V4-CMP-NEXT: addne r0, r1, r0 21; CHECK-V4-CMP-NEXT: addeq r0, r0, r1 22; CHECK-V4-CMP-NEXT: addeq r0, r0, #1 23; CHECK-V4-CMP-NEXT: bx lr 24; 25; CHECK-V4-BX-LABEL: t1: 26; CHECK-V4-BX: @ %bb.0: 27; CHECK-V4-BX-NEXT: cmp r2, #7 28; CHECK-V4-BX-NEXT: cmpne r2, #1 29; CHECK-V4-BX-NEXT: addne r0, r1, r0 30; CHECK-V4-BX-NEXT: addeq r0, r0, r1 31; CHECK-V4-BX-NEXT: addeq r0, r0, #1 32; CHECK-V4-BX-NEXT: bx lr 33 switch i32 %c, label %cond_next [ 34 i32 1, label %cond_true 35 i32 7, label %cond_true 36 ] 37 38cond_true: 39 %tmp12 = add i32 %a, 1 40 %tmp1518 = add i32 %tmp12, %b 41 ret i32 %tmp1518 42 43cond_next: 44 %tmp15 = add i32 %b, %a 45 ret i32 %tmp15 46} 47