1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 2; RUN: llc -mtriple=arm-eabi -mattr=+v4t %s -o - | FileCheck %s 3 4;; Integer absolute value, should produce something as good as: ARM: 5;; movs r0, r0 6;; rsbmi r0, r0, #0 7;; bx lr 8 9define i32 @test(i32 %a) { 10; CHECK-LABEL: test: 11; CHECK: @ %bb.0: 12; CHECK-NEXT: cmp r0, #0 13; CHECK-NEXT: rsbmi r0, r0, #0 14; CHECK-NEXT: bx lr 15 %tmp1neg = sub i32 0, %a 16 %b = icmp sgt i32 %a, -1 17 %abs = select i1 %b, i32 %a, i32 %tmp1neg 18 ret i32 %abs 19} 20 21; rdar://11633193 22;; 3 instructions will be generated for abs(a-b): 23;; subs 24;; rsbmi 25;; bx 26define i32 @test2(i32 %a, i32 %b) nounwind readnone ssp { 27; CHECK-LABEL: test2: 28; CHECK: @ %bb.0: @ %entry 29; CHECK-NEXT: subs r0, r0, r1 30; CHECK-NEXT: rsbmi r0, r0, #0 31; CHECK-NEXT: bx lr 32entry: 33 %sub = sub nsw i32 %a, %b 34 %cmp = icmp sgt i32 %sub, -1 35 %sub1 = sub nsw i32 0, %sub 36 %cond = select i1 %cmp, i32 %sub, i32 %sub1 37 ret i32 %cond 38} 39 40define i64 @test3(i64 %a) { 41; CHECK-LABEL: test3: 42; CHECK: @ %bb.0: 43; CHECK-NEXT: eor r0, r0, r1, asr #31 44; CHECK-NEXT: eor r2, r1, r1, asr #31 45; CHECK-NEXT: subs r0, r0, r1, asr #31 46; CHECK-NEXT: sbc r1, r2, r1, asr #31 47; CHECK-NEXT: bx lr 48 %tmp1neg = sub i64 0, %a 49 %b = icmp sgt i64 %a, -1 50 %abs = select i1 %b, i64 %a, i64 %tmp1neg 51 ret i64 %abs 52} 53