xref: /llvm-project/llvm/test/CodeGen/ARM/half.ll (revision 651bdb96b16d4e522f4611b60103234b1f890b24)
1; RUN: llc < %s -mtriple=thumbv7-apple-ios7.0 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-OLD
2; RUN: llc < %s -mtriple=thumbv7s-apple-ios7.0 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-F16
3; RUN: llc < %s -mtriple=thumbv8-apple-ios7.0 | FileCheck %s --check-prefix=CHECK  --check-prefix=CHECK-V8
4; RUN: llc < %s -mtriple=armv8r-none-none-eabi -mattr=+neon,+fp-armv8 | FileCheck %s --check-prefix=CHECK  --check-prefix=CHECK-V8
5; RUN: llc < %s -mtriple=armv8r-none-none-eabi | FileCheck %s --check-prefix=CHECK  --check-prefix=CHECK-V8-SP
6; RUN: llc < %s -mtriple=armv8.1m-none-none-eabi -mattr=+fp-armv8 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-V8
7; RUN: llc < %s -mtriple=armv8.1m-none-none-eabi -mattr=+fp-armv8,-fp64 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-V8-SP
8; RUN: llc < %s -mtriple=armv8.1m-none-none-eabi -mattr=+mve.fp,+fp64 | FileCheck %s --check-prefix=CHECK-V8
9; RUN: llc < %s -mtriple=armv8.1m-none-none-eabi -mattr=+mve.fp | FileCheck %s --check-prefix=CHECK-V8-SP
10
11define void @test_load_store(ptr %in, ptr %out) {
12; CHECK-LABEL: test_load_store:
13; CHECK: ldrh [[TMP:r[0-9]+]], [r0]
14; CHECK: strh [[TMP]], [r1]
15  %val = load half, ptr %in
16  store half %val, ptr %out
17  ret void
18}
19
20define i16 @test_bitcast_from_half(ptr %addr) {
21; CHECK-LABEL: test_bitcast_from_half:
22; CHECK: ldrh r0, [r0]
23  %val = load half, ptr %addr
24  %val_int = bitcast half %val to i16
25  ret i16 %val_int
26}
27
28define void @test_bitcast_to_half(ptr %addr, i16 %in) {
29; CHECK-LABEL: test_bitcast_to_half:
30; CHECK: strh r1, [r0]
31  %val_fp = bitcast i16 %in to half
32  store half %val_fp, ptr %addr
33  ret void
34}
35
36define float @test_extend32(ptr %addr) {
37; CHECK-LABEL: test_extend32:
38
39; CHECK-OLD: b.w ___extendhfsf2
40; CHECK-F16: vcvtb.f32.f16
41; CHECK-V8: vcvtb.f32.f16
42; CHECK-V8-SP: vcvtb.f32.f16
43  %val16 = load half, ptr %addr
44  %val32 = fpext half %val16 to float
45  ret float %val32
46}
47
48define double @test_extend64(ptr %addr) {
49; CHECK-LABEL: test_extend64:
50
51; CHECK-OLD: bl ___extendhfsf2
52; CHECK-OLD: vcvt.f64.f32
53; CHECK-F16: vcvtb.f32.f16
54; CHECK-F16: vcvt.f64.f32
55; CHECK-V8: vcvtb.f64.f16
56; CHECK-V8-SP: vcvtb.f32.f16
57; CHECK-V8-SP: bl __aeabi_f2d
58  %val16 = load half, ptr %addr
59  %val32 = fpext half %val16 to double
60  ret double %val32
61}
62
63define void @test_trunc32(float %in, ptr %addr) {
64; CHECK-LABEL: test_trunc32:
65
66; CHECK-OLD: bl ___truncsfhf2
67; CHECK-F16: vcvtb.f16.f32
68; CHECK-V8: vcvtb.f16.f32
69; CHECK-V8-SP: vcvtb.f16.f32
70  %val16 = fptrunc float %in to half
71  store half %val16, ptr %addr
72  ret void
73}
74
75define void @test_trunc64(double %in, ptr %addr) {
76; CHECK-LABEL: test_trunc64:
77
78; CHECK-OLD: bl ___truncdfhf2
79; CHECK-F16: bl ___truncdfhf2
80; CHECK-V8: vcvtb.f16.f64
81; CHECK-V8-SP: bl __aeabi_d2h
82  %val16 = fptrunc double %in to half
83  store half %val16, ptr %addr
84  ret void
85}
86