1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=arm-eabi -float-abi=soft -mattr=+vfp2 --verify-machineinstrs %s -o - | FileCheck %s 3 4define void @func_02(i32 %rm) { 5; CHECK-LABEL: func_02: 6; CHECK: @ %bb.0: 7; CHECK-NEXT: vmrs r1, fpscr 8; CHECK-NEXT: sub r0, r0, #1 9; CHECK-NEXT: and r0, r0, #3 10; CHECK-NEXT: bic r1, r1, #12582912 11; CHECK-NEXT: orr r0, r1, r0, lsl #22 12; CHECK-NEXT: vmsr fpscr, r0 13; CHECK-NEXT: mov pc, lr 14 call void @llvm.set.rounding(i32 %rm) 15 ret void 16} 17 18define void @func_03() { 19; CHECK-LABEL: func_03: 20; CHECK: @ %bb.0: 21; CHECK-NEXT: vmrs r0, fpscr 22; CHECK-NEXT: orr r0, r0, #12582912 23; CHECK-NEXT: vmsr fpscr, r0 24; CHECK-NEXT: mov pc, lr 25 call void @llvm.set.rounding(i32 0) 26 ret void 27} 28 29define void @func_04() { 30; CHECK-LABEL: func_04: 31; CHECK: @ %bb.0: 32; CHECK-NEXT: vmrs r0, fpscr 33; CHECK-NEXT: bic r0, r0, #12582912 34; CHECK-NEXT: vmsr fpscr, r0 35; CHECK-NEXT: mov pc, lr 36 call void @llvm.set.rounding(i32 1) 37 ret void 38} 39 40define void @func_05() { 41; CHECK-LABEL: func_05: 42; CHECK: @ %bb.0: 43; CHECK-NEXT: vmrs r0, fpscr 44; CHECK-NEXT: bic r0, r0, #12582912 45; CHECK-NEXT: orr r0, r0, #4194304 46; CHECK-NEXT: vmsr fpscr, r0 47; CHECK-NEXT: mov pc, lr 48 call void @llvm.set.rounding(i32 2) 49 ret void 50} 51 52define void @func_06() { 53; CHECK-LABEL: func_06: 54; CHECK: @ %bb.0: 55; CHECK-NEXT: vmrs r0, fpscr 56; CHECK-NEXT: bic r0, r0, #12582912 57; CHECK-NEXT: orr r0, r0, #8388608 58; CHECK-NEXT: vmsr fpscr, r0 59; CHECK-NEXT: mov pc, lr 60 call void @llvm.set.rounding(i32 3) 61 ret void 62} 63 64define i32 @get_fpenv_01() #0 { 65; CHECK-LABEL: get_fpenv_01: 66; CHECK: @ %bb.0: @ %entry 67; CHECK-NEXT: .save {r11, lr} 68; CHECK-NEXT: push {r11, lr} 69; CHECK-NEXT: .pad #8 70; CHECK-NEXT: sub sp, sp, #8 71; CHECK-NEXT: add r0, sp, #4 72; CHECK-NEXT: bl fegetenv 73; CHECK-NEXT: ldr r0, [sp, #4] 74; CHECK-NEXT: add sp, sp, #8 75; CHECK-NEXT: pop {r11, lr} 76; CHECK-NEXT: mov pc, lr 77entry: 78 %fpenv = call i32 @llvm.get.fpenv.i32() 79 ret i32 %fpenv 80} 81 82define i32 @get_fpenv_02() nounwind { 83; CHECK-LABEL: get_fpenv_02: 84; CHECK: @ %bb.0: @ %entry 85; CHECK-NEXT: vmrs r0, fpscr 86; CHECK-NEXT: mov pc, lr 87entry: 88 %fpenv = call i32 @llvm.get.fpenv.i32() 89 ret i32 %fpenv 90} 91 92define void @set_fpenv_01(i32 %fpenv) #0 { 93; CHECK-LABEL: set_fpenv_01: 94; CHECK: @ %bb.0: @ %entry 95; CHECK-NEXT: .save {r11, lr} 96; CHECK-NEXT: push {r11, lr} 97; CHECK-NEXT: .pad #8 98; CHECK-NEXT: sub sp, sp, #8 99; CHECK-NEXT: str r0, [sp, #4] 100; CHECK-NEXT: add r0, sp, #4 101; CHECK-NEXT: bl fesetenv 102; CHECK-NEXT: add sp, sp, #8 103; CHECK-NEXT: pop {r11, lr} 104; CHECK-NEXT: mov pc, lr 105entry: 106 call void @llvm.set.fpenv.i32(i32 %fpenv) 107 ret void 108} 109 110define void @set_fpenv_02(i32 %fpenv) nounwind { 111; CHECK-LABEL: set_fpenv_02: 112; CHECK: @ %bb.0: @ %entry 113; CHECK-NEXT: vmsr fpscr, r0 114; CHECK-NEXT: mov pc, lr 115entry: 116 call void @llvm.set.fpenv.i32(i32 %fpenv) 117 ret void 118} 119 120define void @reset_fpenv_01() #0 { 121; CHECK-LABEL: reset_fpenv_01: 122; CHECK: @ %bb.0: @ %entry 123; CHECK-NEXT: .save {r11, lr} 124; CHECK-NEXT: push {r11, lr} 125; CHECK-NEXT: mvn r0, #0 126; CHECK-NEXT: bl fesetenv 127; CHECK-NEXT: pop {r11, lr} 128; CHECK-NEXT: mov pc, lr 129entry: 130 call void @llvm.reset.fpenv() 131 ret void 132} 133 134define void @reset_fpenv_02() nounwind { 135; CHECK-LABEL: reset_fpenv_02: 136; CHECK: @ %bb.0: @ %entry 137; CHECK-NEXT: mov r0, #0 138; CHECK-NEXT: vmsr fpscr, r0 139; CHECK-NEXT: mov pc, lr 140entry: 141 call void @llvm.reset.fpenv() 142 ret void 143} 144 145define i32 @get_fpmode_01() #0 { 146; CHECK-LABEL: get_fpmode_01: 147; CHECK: @ %bb.0: @ %entry 148; CHECK-NEXT: .save {r11, lr} 149; CHECK-NEXT: push {r11, lr} 150; CHECK-NEXT: .pad #8 151; CHECK-NEXT: sub sp, sp, #8 152; CHECK-NEXT: add r0, sp, #4 153; CHECK-NEXT: bl fegetmode 154; CHECK-NEXT: ldr r0, [sp, #4] 155; CHECK-NEXT: add sp, sp, #8 156; CHECK-NEXT: pop {r11, lr} 157; CHECK-NEXT: mov pc, lr 158entry: 159 %fpenv = call i32 @llvm.get.fpmode.i32() 160 ret i32 %fpenv 161} 162 163define i32 @get_fpmode_02() nounwind { 164; CHECK-LABEL: get_fpmode_02: 165; CHECK: @ %bb.0: @ %entry 166; CHECK-NEXT: vmrs r0, fpscr 167; CHECK-NEXT: mov pc, lr 168entry: 169 %fpenv = call i32 @llvm.get.fpmode.i32() 170 ret i32 %fpenv 171} 172 173define void @set_fpmode_01(i32 %fpmode) #0 { 174; CHECK-LABEL: set_fpmode_01: 175; CHECK: @ %bb.0: @ %entry 176; CHECK-NEXT: .save {r11, lr} 177; CHECK-NEXT: push {r11, lr} 178; CHECK-NEXT: .pad #8 179; CHECK-NEXT: sub sp, sp, #8 180; CHECK-NEXT: str r0, [sp, #4] 181; CHECK-NEXT: add r0, sp, #4 182; CHECK-NEXT: bl fesetmode 183; CHECK-NEXT: add sp, sp, #8 184; CHECK-NEXT: pop {r11, lr} 185; CHECK-NEXT: mov pc, lr 186entry: 187 call void @llvm.set.fpmode.i32(i32 %fpmode) 188 ret void 189} 190 191define void @set_fpmode_02(i32 %fpmode) nounwind { 192; CHECK-LABEL: set_fpmode_02: 193; CHECK: @ %bb.0: @ %entry 194; CHECK-NEXT: vmrs r1, fpscr 195; CHECK-NEXT: mvn r2, #159 196; CHECK-NEXT: sub r2, r2, #-134217728 197; CHECK-NEXT: and r0, r0, r2 198; CHECK-NEXT: mov r2, #159 199; CHECK-NEXT: orr r2, r2, #-134217728 200; CHECK-NEXT: and r1, r1, r2 201; CHECK-NEXT: orr r0, r1, r0 202; CHECK-NEXT: vmsr fpscr, r0 203; CHECK-NEXT: mov pc, lr 204entry: 205 call void @llvm.set.fpmode.i32(i32 %fpmode) 206 ret void 207} 208 209define void @reset_fpmode_01() #0 { 210; CHECK-LABEL: reset_fpmode_01: 211; CHECK: @ %bb.0: @ %entry 212; CHECK-NEXT: .save {r11, lr} 213; CHECK-NEXT: push {r11, lr} 214; CHECK-NEXT: mvn r0, #0 215; CHECK-NEXT: bl fesetmode 216; CHECK-NEXT: pop {r11, lr} 217; CHECK-NEXT: mov pc, lr 218entry: 219 call void @llvm.reset.fpmode() 220 ret void 221} 222 223define void @reset_fpmode_02() nounwind { 224; CHECK-LABEL: reset_fpmode_02: 225; CHECK: @ %bb.0: @ %entry 226; CHECK-NEXT: vmrs r0, fpscr 227; CHECK-NEXT: ldr r1, .LCPI16_0 228; CHECK-NEXT: and r0, r0, r1 229; CHECK-NEXT: vmsr fpscr, r0 230; CHECK-NEXT: mov pc, lr 231; CHECK-NEXT: .p2align 2 232; CHECK-NEXT: @ %bb.1: 233; CHECK-NEXT: .LCPI16_0: 234; CHECK-NEXT: .long 4160774399 @ 0xf80060ff 235entry: 236 call void @llvm.reset.fpmode() 237 ret void 238} 239 240attributes #0 = { nounwind "use-soft-float"="true" } 241 242declare void @llvm.set.rounding(i32) 243declare i32 @llvm.get.fpenv.i32() 244declare void @llvm.set.fpenv.i32(i32 %fpenv) 245declare void @llvm.reset.fpenv() 246declare i32 @llvm.get.fpmode.i32() 247declare void @llvm.set.fpmode.i32(i32 %fpmode) 248declare void @llvm.reset.fpmode() 249