1; RUN: llc -asm-verbose=false < %s | FileCheck %s 2 3target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" 4target triple = "armv8.2a-arm-unknown-eabihf" 5 6define dso_local void @vec8(ptr nocapture readonly %V, i32 %N) local_unnamed_addr #0 { 7; CHECK: .LBB0_1: 8; CHECK-NEXT: vld1.16 {d16, d17}, [r0]! 9; CHECK-NEXT: subs r1, r1, #8 10; CHECK-NEXT: bne .LBB0_1 11entry: 12 br label %vector.body 13 14vector.body: 15 %index = phi i32 [ 0, %entry ], [ %index.next, %vector.body ] 16 %0 = getelementptr inbounds half, ptr %V, i32 %index 17 %wide.load = load volatile <8 x half>, ptr %0, align 2 18 %index.next = add i32 %index, 8 19 %cmp = icmp eq i32 %index.next, %N 20 br i1 %cmp, label %byeblock, label %vector.body 21 22byeblock: 23 ret void 24} 25 26define dso_local void @vec4(ptr nocapture readonly %V, i32 %N) local_unnamed_addr #0 { 27; CHECK: .LBB1_1: 28; CHECK-NEXT: vld1.16 {d16}, [r0]! 29; CHECK-NEXT: subs r1, r1, #4 30; CHECK-NEXT: bne .LBB1_1 31entry: 32 br label %vector.body 33 34vector.body: 35 %index = phi i32 [ 0, %entry ], [ %index.next, %vector.body ] 36 %0 = getelementptr inbounds half, ptr %V, i32 %index 37 %wide.load = load volatile <4 x half>, ptr %0, align 2 38 %index.next = add i32 %index, 4 39 %cmp = icmp eq i32 %index.next, %N 40 br i1 %cmp, label %byeblock, label %vector.body 41 42byeblock: 43 ret void 44} 45 46attributes #0 = { norecurse nounwind readonly "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "target-cpu"="generic" "target-features"="+armv8.2-a,+fullfp16,+strict-align,-thumb-mode" "unsafe-fp-math"="true" "use-soft-float"="false" } 47