xref: /llvm-project/llvm/test/CodeGen/ARM/fmuladd-soft-float.ll (revision 5785cbb40570c3847aa994b2d2b7e03321eee7eb) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2; RUN: llc -mtriple=arm < %s | FileCheck %s -check-prefix=SOFT-FLOAT
3; RUN: llc -mtriple=arm -mattr=+vfp4d16sp < %s | FileCheck %s -check-prefix=SOFT-FLOAT-VFP32
4; RUN: llc -mtriple=arm -mattr=+vfp4d16sp,+fp64 < %s | FileCheck %s -check-prefix=SOFT-FLOAT-VFP64
5
6define float @fmuladd_intrinsic_f32(float %a, float %b, float %c) #0 {
7; SOFT-FLOAT-LABEL: fmuladd_intrinsic_f32:
8; SOFT-FLOAT:       @ %bb.0:
9; SOFT-FLOAT-NEXT:    push {r4, lr}
10; SOFT-FLOAT-NEXT:    mov r4, r2
11; SOFT-FLOAT-NEXT:    bl __mulsf3
12; SOFT-FLOAT-NEXT:    mov r1, r4
13; SOFT-FLOAT-NEXT:    bl __addsf3
14; SOFT-FLOAT-NEXT:    pop {r4, lr}
15; SOFT-FLOAT-NEXT:    mov pc, lr
16;
17; SOFT-FLOAT-VFP32-LABEL: fmuladd_intrinsic_f32:
18; SOFT-FLOAT-VFP32:       @ %bb.0:
19; SOFT-FLOAT-VFP32-NEXT:    push {r4, lr}
20; SOFT-FLOAT-VFP32-NEXT:    mov r4, r2
21; SOFT-FLOAT-VFP32-NEXT:    bl __mulsf3
22; SOFT-FLOAT-VFP32-NEXT:    mov r1, r4
23; SOFT-FLOAT-VFP32-NEXT:    bl __addsf3
24; SOFT-FLOAT-VFP32-NEXT:    pop {r4, lr}
25; SOFT-FLOAT-VFP32-NEXT:    mov pc, lr
26;
27; SOFT-FLOAT-VFP64-LABEL: fmuladd_intrinsic_f32:
28; SOFT-FLOAT-VFP64:       @ %bb.0:
29; SOFT-FLOAT-VFP64-NEXT:    push {r4, lr}
30; SOFT-FLOAT-VFP64-NEXT:    mov r4, r2
31; SOFT-FLOAT-VFP64-NEXT:    bl __mulsf3
32; SOFT-FLOAT-VFP64-NEXT:    mov r1, r4
33; SOFT-FLOAT-VFP64-NEXT:    bl __addsf3
34; SOFT-FLOAT-VFP64-NEXT:    pop {r4, lr}
35; SOFT-FLOAT-VFP64-NEXT:    mov pc, lr
36  %result = call float @llvm.fmuladd.f32(float %a, float %b, float %c)
37  ret float %result
38}
39
40define double @fmuladd_intrinsic_f64(double %a, double %b, double %c) #0 {
41; SOFT-FLOAT-LABEL: fmuladd_intrinsic_f64:
42; SOFT-FLOAT:       @ %bb.0:
43; SOFT-FLOAT-NEXT:    push {r11, lr}
44; SOFT-FLOAT-NEXT:    bl __muldf3
45; SOFT-FLOAT-NEXT:    ldr r2, [sp, #8]
46; SOFT-FLOAT-NEXT:    ldr r3, [sp, #12]
47; SOFT-FLOAT-NEXT:    bl __adddf3
48; SOFT-FLOAT-NEXT:    pop {r11, lr}
49; SOFT-FLOAT-NEXT:    mov pc, lr
50;
51; SOFT-FLOAT-VFP32-LABEL: fmuladd_intrinsic_f64:
52; SOFT-FLOAT-VFP32:       @ %bb.0:
53; SOFT-FLOAT-VFP32-NEXT:    push {r11, lr}
54; SOFT-FLOAT-VFP32-NEXT:    bl __muldf3
55; SOFT-FLOAT-VFP32-NEXT:    ldr r2, [sp, #8]
56; SOFT-FLOAT-VFP32-NEXT:    ldr r3, [sp, #12]
57; SOFT-FLOAT-VFP32-NEXT:    bl __adddf3
58; SOFT-FLOAT-VFP32-NEXT:    pop {r11, lr}
59; SOFT-FLOAT-VFP32-NEXT:    mov pc, lr
60;
61; SOFT-FLOAT-VFP64-LABEL: fmuladd_intrinsic_f64:
62; SOFT-FLOAT-VFP64:       @ %bb.0:
63; SOFT-FLOAT-VFP64-NEXT:    push {r11, lr}
64; SOFT-FLOAT-VFP64-NEXT:    bl __muldf3
65; SOFT-FLOAT-VFP64-NEXT:    ldr r2, [sp, #8]
66; SOFT-FLOAT-VFP64-NEXT:    ldr r3, [sp, #12]
67; SOFT-FLOAT-VFP64-NEXT:    bl __adddf3
68; SOFT-FLOAT-VFP64-NEXT:    pop {r11, lr}
69; SOFT-FLOAT-VFP64-NEXT:    mov pc, lr
70  %result = call double @llvm.fmuladd.f64(double %a, double %b, double %c)
71  ret double %result
72}
73
74define float @fmuladd_contract_f32(float %a, float %b, float %c) #0 {
75; SOFT-FLOAT-LABEL: fmuladd_contract_f32:
76; SOFT-FLOAT:       @ %bb.0:
77; SOFT-FLOAT-NEXT:    push {r4, lr}
78; SOFT-FLOAT-NEXT:    mov r4, r2
79; SOFT-FLOAT-NEXT:    bl __mulsf3
80; SOFT-FLOAT-NEXT:    mov r1, r4
81; SOFT-FLOAT-NEXT:    bl __addsf3
82; SOFT-FLOAT-NEXT:    pop {r4, lr}
83; SOFT-FLOAT-NEXT:    mov pc, lr
84;
85; SOFT-FLOAT-VFP32-LABEL: fmuladd_contract_f32:
86; SOFT-FLOAT-VFP32:       @ %bb.0:
87; SOFT-FLOAT-VFP32-NEXT:    push {r4, lr}
88; SOFT-FLOAT-VFP32-NEXT:    mov r4, r2
89; SOFT-FLOAT-VFP32-NEXT:    bl __mulsf3
90; SOFT-FLOAT-VFP32-NEXT:    mov r1, r4
91; SOFT-FLOAT-VFP32-NEXT:    bl __addsf3
92; SOFT-FLOAT-VFP32-NEXT:    pop {r4, lr}
93; SOFT-FLOAT-VFP32-NEXT:    mov pc, lr
94;
95; SOFT-FLOAT-VFP64-LABEL: fmuladd_contract_f32:
96; SOFT-FLOAT-VFP64:       @ %bb.0:
97; SOFT-FLOAT-VFP64-NEXT:    push {r4, lr}
98; SOFT-FLOAT-VFP64-NEXT:    mov r4, r2
99; SOFT-FLOAT-VFP64-NEXT:    bl __mulsf3
100; SOFT-FLOAT-VFP64-NEXT:    mov r1, r4
101; SOFT-FLOAT-VFP64-NEXT:    bl __addsf3
102; SOFT-FLOAT-VFP64-NEXT:    pop {r4, lr}
103; SOFT-FLOAT-VFP64-NEXT:    mov pc, lr
104  %product = fmul contract float %a, %b
105  %result = fadd contract float %product, %c
106  ret float %result
107}
108
109define double @fmuladd_contract_f64(double %a, double %b, double %c) #0 {
110; SOFT-FLOAT-LABEL: fmuladd_contract_f64:
111; SOFT-FLOAT:       @ %bb.0:
112; SOFT-FLOAT-NEXT:    push {r11, lr}
113; SOFT-FLOAT-NEXT:    bl __muldf3
114; SOFT-FLOAT-NEXT:    ldr r2, [sp, #8]
115; SOFT-FLOAT-NEXT:    ldr r3, [sp, #12]
116; SOFT-FLOAT-NEXT:    bl __adddf3
117; SOFT-FLOAT-NEXT:    pop {r11, lr}
118; SOFT-FLOAT-NEXT:    mov pc, lr
119;
120; SOFT-FLOAT-VFP32-LABEL: fmuladd_contract_f64:
121; SOFT-FLOAT-VFP32:       @ %bb.0:
122; SOFT-FLOAT-VFP32-NEXT:    push {r11, lr}
123; SOFT-FLOAT-VFP32-NEXT:    bl __muldf3
124; SOFT-FLOAT-VFP32-NEXT:    ldr r2, [sp, #8]
125; SOFT-FLOAT-VFP32-NEXT:    ldr r3, [sp, #12]
126; SOFT-FLOAT-VFP32-NEXT:    bl __adddf3
127; SOFT-FLOAT-VFP32-NEXT:    pop {r11, lr}
128; SOFT-FLOAT-VFP32-NEXT:    mov pc, lr
129;
130; SOFT-FLOAT-VFP64-LABEL: fmuladd_contract_f64:
131; SOFT-FLOAT-VFP64:       @ %bb.0:
132; SOFT-FLOAT-VFP64-NEXT:    push {r11, lr}
133; SOFT-FLOAT-VFP64-NEXT:    bl __muldf3
134; SOFT-FLOAT-VFP64-NEXT:    ldr r2, [sp, #8]
135; SOFT-FLOAT-VFP64-NEXT:    ldr r3, [sp, #12]
136; SOFT-FLOAT-VFP64-NEXT:    bl __adddf3
137; SOFT-FLOAT-VFP64-NEXT:    pop {r11, lr}
138; SOFT-FLOAT-VFP64-NEXT:    mov pc, lr
139  %product = fmul contract double %a, %b
140  %result = fadd contract double %product, %c
141  ret double %result
142}
143
144define <4 x float> @fmuladd_contract_v4f32(<4 x float> %a, <4 x float> %b, <4 x float> %c) #0 {
145; SOFT-FLOAT-LABEL: fmuladd_contract_v4f32:
146; SOFT-FLOAT:       @ %bb.0:
147; SOFT-FLOAT-NEXT:    push {r4, r5, r6, r7, r11, lr}
148; SOFT-FLOAT-NEXT:    mov r7, r1
149; SOFT-FLOAT-NEXT:    ldr r1, [sp, #24]
150; SOFT-FLOAT-NEXT:    mov r4, r3
151; SOFT-FLOAT-NEXT:    mov r6, r2
152; SOFT-FLOAT-NEXT:    bl __mulsf3
153; SOFT-FLOAT-NEXT:    ldr r1, [sp, #40]
154; SOFT-FLOAT-NEXT:    bl __addsf3
155; SOFT-FLOAT-NEXT:    ldr r1, [sp, #28]
156; SOFT-FLOAT-NEXT:    mov r5, r0
157; SOFT-FLOAT-NEXT:    mov r0, r7
158; SOFT-FLOAT-NEXT:    bl __mulsf3
159; SOFT-FLOAT-NEXT:    ldr r1, [sp, #44]
160; SOFT-FLOAT-NEXT:    bl __addsf3
161; SOFT-FLOAT-NEXT:    ldr r1, [sp, #32]
162; SOFT-FLOAT-NEXT:    mov r7, r0
163; SOFT-FLOAT-NEXT:    mov r0, r6
164; SOFT-FLOAT-NEXT:    bl __mulsf3
165; SOFT-FLOAT-NEXT:    ldr r1, [sp, #48]
166; SOFT-FLOAT-NEXT:    bl __addsf3
167; SOFT-FLOAT-NEXT:    ldr r1, [sp, #36]
168; SOFT-FLOAT-NEXT:    mov r6, r0
169; SOFT-FLOAT-NEXT:    mov r0, r4
170; SOFT-FLOAT-NEXT:    bl __mulsf3
171; SOFT-FLOAT-NEXT:    ldr r1, [sp, #52]
172; SOFT-FLOAT-NEXT:    bl __addsf3
173; SOFT-FLOAT-NEXT:    mov r3, r0
174; SOFT-FLOAT-NEXT:    mov r0, r5
175; SOFT-FLOAT-NEXT:    mov r1, r7
176; SOFT-FLOAT-NEXT:    mov r2, r6
177; SOFT-FLOAT-NEXT:    pop {r4, r5, r6, r7, r11, lr}
178; SOFT-FLOAT-NEXT:    mov pc, lr
179;
180; SOFT-FLOAT-VFP32-LABEL: fmuladd_contract_v4f32:
181; SOFT-FLOAT-VFP32:       @ %bb.0:
182; SOFT-FLOAT-VFP32-NEXT:    push {r4, r5, r6, r7, r11, lr}
183; SOFT-FLOAT-VFP32-NEXT:    mov r7, r1
184; SOFT-FLOAT-VFP32-NEXT:    ldr r1, [sp, #24]
185; SOFT-FLOAT-VFP32-NEXT:    mov r4, r3
186; SOFT-FLOAT-VFP32-NEXT:    mov r6, r2
187; SOFT-FLOAT-VFP32-NEXT:    bl __mulsf3
188; SOFT-FLOAT-VFP32-NEXT:    ldr r1, [sp, #40]
189; SOFT-FLOAT-VFP32-NEXT:    bl __addsf3
190; SOFT-FLOAT-VFP32-NEXT:    ldr r1, [sp, #28]
191; SOFT-FLOAT-VFP32-NEXT:    mov r5, r0
192; SOFT-FLOAT-VFP32-NEXT:    mov r0, r7
193; SOFT-FLOAT-VFP32-NEXT:    bl __mulsf3
194; SOFT-FLOAT-VFP32-NEXT:    ldr r1, [sp, #44]
195; SOFT-FLOAT-VFP32-NEXT:    bl __addsf3
196; SOFT-FLOAT-VFP32-NEXT:    ldr r1, [sp, #32]
197; SOFT-FLOAT-VFP32-NEXT:    mov r7, r0
198; SOFT-FLOAT-VFP32-NEXT:    mov r0, r6
199; SOFT-FLOAT-VFP32-NEXT:    bl __mulsf3
200; SOFT-FLOAT-VFP32-NEXT:    ldr r1, [sp, #48]
201; SOFT-FLOAT-VFP32-NEXT:    bl __addsf3
202; SOFT-FLOAT-VFP32-NEXT:    ldr r1, [sp, #36]
203; SOFT-FLOAT-VFP32-NEXT:    mov r6, r0
204; SOFT-FLOAT-VFP32-NEXT:    mov r0, r4
205; SOFT-FLOAT-VFP32-NEXT:    bl __mulsf3
206; SOFT-FLOAT-VFP32-NEXT:    ldr r1, [sp, #52]
207; SOFT-FLOAT-VFP32-NEXT:    bl __addsf3
208; SOFT-FLOAT-VFP32-NEXT:    mov r3, r0
209; SOFT-FLOAT-VFP32-NEXT:    mov r0, r5
210; SOFT-FLOAT-VFP32-NEXT:    mov r1, r7
211; SOFT-FLOAT-VFP32-NEXT:    mov r2, r6
212; SOFT-FLOAT-VFP32-NEXT:    pop {r4, r5, r6, r7, r11, lr}
213; SOFT-FLOAT-VFP32-NEXT:    mov pc, lr
214;
215; SOFT-FLOAT-VFP64-LABEL: fmuladd_contract_v4f32:
216; SOFT-FLOAT-VFP64:       @ %bb.0:
217; SOFT-FLOAT-VFP64-NEXT:    push {r4, r5, r6, r7, r11, lr}
218; SOFT-FLOAT-VFP64-NEXT:    mov r7, r1
219; SOFT-FLOAT-VFP64-NEXT:    ldr r1, [sp, #24]
220; SOFT-FLOAT-VFP64-NEXT:    mov r4, r3
221; SOFT-FLOAT-VFP64-NEXT:    mov r6, r2
222; SOFT-FLOAT-VFP64-NEXT:    bl __mulsf3
223; SOFT-FLOAT-VFP64-NEXT:    ldr r1, [sp, #40]
224; SOFT-FLOAT-VFP64-NEXT:    bl __addsf3
225; SOFT-FLOAT-VFP64-NEXT:    ldr r1, [sp, #28]
226; SOFT-FLOAT-VFP64-NEXT:    mov r5, r0
227; SOFT-FLOAT-VFP64-NEXT:    mov r0, r7
228; SOFT-FLOAT-VFP64-NEXT:    bl __mulsf3
229; SOFT-FLOAT-VFP64-NEXT:    ldr r1, [sp, #44]
230; SOFT-FLOAT-VFP64-NEXT:    bl __addsf3
231; SOFT-FLOAT-VFP64-NEXT:    ldr r1, [sp, #32]
232; SOFT-FLOAT-VFP64-NEXT:    mov r7, r0
233; SOFT-FLOAT-VFP64-NEXT:    mov r0, r6
234; SOFT-FLOAT-VFP64-NEXT:    bl __mulsf3
235; SOFT-FLOAT-VFP64-NEXT:    ldr r1, [sp, #48]
236; SOFT-FLOAT-VFP64-NEXT:    bl __addsf3
237; SOFT-FLOAT-VFP64-NEXT:    ldr r1, [sp, #36]
238; SOFT-FLOAT-VFP64-NEXT:    mov r6, r0
239; SOFT-FLOAT-VFP64-NEXT:    mov r0, r4
240; SOFT-FLOAT-VFP64-NEXT:    bl __mulsf3
241; SOFT-FLOAT-VFP64-NEXT:    ldr r1, [sp, #52]
242; SOFT-FLOAT-VFP64-NEXT:    bl __addsf3
243; SOFT-FLOAT-VFP64-NEXT:    mov r3, r0
244; SOFT-FLOAT-VFP64-NEXT:    mov r0, r5
245; SOFT-FLOAT-VFP64-NEXT:    mov r1, r7
246; SOFT-FLOAT-VFP64-NEXT:    mov r2, r6
247; SOFT-FLOAT-VFP64-NEXT:    pop {r4, r5, r6, r7, r11, lr}
248; SOFT-FLOAT-VFP64-NEXT:    mov pc, lr
249  %product = fmul contract <4 x float> %a, %b
250  %result = fadd contract <4 x float> %product, %c
251  ret <4 x float> %result
252}
253
254define <4 x double> @fmuladd_contract_v4f64(<4 x double> %a, <4 x double> %b, <4 x double> %c) #0 {
255; SOFT-FLOAT-LABEL: fmuladd_contract_v4f64:
256; SOFT-FLOAT:       @ %bb.0:
257; SOFT-FLOAT-NEXT:    push {r4, r5, r6, lr}
258; SOFT-FLOAT-NEXT:    mov r5, r3
259; SOFT-FLOAT-NEXT:    mov r6, r2
260; SOFT-FLOAT-NEXT:    mov r4, r0
261; SOFT-FLOAT-NEXT:    ldr r0, [sp, #32]
262; SOFT-FLOAT-NEXT:    ldr r1, [sp, #36]
263; SOFT-FLOAT-NEXT:    ldr r2, [sp, #64]
264; SOFT-FLOAT-NEXT:    ldr r3, [sp, #68]
265; SOFT-FLOAT-NEXT:    bl __muldf3
266; SOFT-FLOAT-NEXT:    ldr r2, [sp, #96]
267; SOFT-FLOAT-NEXT:    ldr r3, [sp, #100]
268; SOFT-FLOAT-NEXT:    bl __adddf3
269; SOFT-FLOAT-NEXT:    str r0, [r4, #24]
270; SOFT-FLOAT-NEXT:    str r1, [r4, #28]
271; SOFT-FLOAT-NEXT:    ldr r0, [sp, #24]
272; SOFT-FLOAT-NEXT:    ldr r1, [sp, #28]
273; SOFT-FLOAT-NEXT:    ldr r2, [sp, #56]
274; SOFT-FLOAT-NEXT:    ldr r3, [sp, #60]
275; SOFT-FLOAT-NEXT:    bl __muldf3
276; SOFT-FLOAT-NEXT:    ldr r2, [sp, #88]
277; SOFT-FLOAT-NEXT:    ldr r3, [sp, #92]
278; SOFT-FLOAT-NEXT:    bl __adddf3
279; SOFT-FLOAT-NEXT:    str r0, [r4, #16]
280; SOFT-FLOAT-NEXT:    str r1, [r4, #20]
281; SOFT-FLOAT-NEXT:    ldr r0, [sp, #16]
282; SOFT-FLOAT-NEXT:    ldr r1, [sp, #20]
283; SOFT-FLOAT-NEXT:    ldr r2, [sp, #48]
284; SOFT-FLOAT-NEXT:    ldr r3, [sp, #52]
285; SOFT-FLOAT-NEXT:    bl __muldf3
286; SOFT-FLOAT-NEXT:    ldr r2, [sp, #80]
287; SOFT-FLOAT-NEXT:    ldr r3, [sp, #84]
288; SOFT-FLOAT-NEXT:    bl __adddf3
289; SOFT-FLOAT-NEXT:    ldr r2, [sp, #40]
290; SOFT-FLOAT-NEXT:    ldr r3, [sp, #44]
291; SOFT-FLOAT-NEXT:    str r0, [r4, #8]
292; SOFT-FLOAT-NEXT:    mov r0, r6
293; SOFT-FLOAT-NEXT:    str r1, [r4, #12]
294; SOFT-FLOAT-NEXT:    mov r1, r5
295; SOFT-FLOAT-NEXT:    bl __muldf3
296; SOFT-FLOAT-NEXT:    ldr r2, [sp, #72]
297; SOFT-FLOAT-NEXT:    ldr r3, [sp, #76]
298; SOFT-FLOAT-NEXT:    bl __adddf3
299; SOFT-FLOAT-NEXT:    stm r4, {r0, r1}
300; SOFT-FLOAT-NEXT:    pop {r4, r5, r6, lr}
301; SOFT-FLOAT-NEXT:    mov pc, lr
302;
303; SOFT-FLOAT-VFP32-LABEL: fmuladd_contract_v4f64:
304; SOFT-FLOAT-VFP32:       @ %bb.0:
305; SOFT-FLOAT-VFP32-NEXT:    push {r4, r5, r6, lr}
306; SOFT-FLOAT-VFP32-NEXT:    mov r5, r3
307; SOFT-FLOAT-VFP32-NEXT:    mov r6, r2
308; SOFT-FLOAT-VFP32-NEXT:    mov r4, r0
309; SOFT-FLOAT-VFP32-NEXT:    ldr r0, [sp, #32]
310; SOFT-FLOAT-VFP32-NEXT:    ldr r1, [sp, #36]
311; SOFT-FLOAT-VFP32-NEXT:    ldr r2, [sp, #64]
312; SOFT-FLOAT-VFP32-NEXT:    ldr r3, [sp, #68]
313; SOFT-FLOAT-VFP32-NEXT:    bl __muldf3
314; SOFT-FLOAT-VFP32-NEXT:    ldr r2, [sp, #96]
315; SOFT-FLOAT-VFP32-NEXT:    ldr r3, [sp, #100]
316; SOFT-FLOAT-VFP32-NEXT:    bl __adddf3
317; SOFT-FLOAT-VFP32-NEXT:    str r0, [r4, #24]
318; SOFT-FLOAT-VFP32-NEXT:    str r1, [r4, #28]
319; SOFT-FLOAT-VFP32-NEXT:    ldr r0, [sp, #24]
320; SOFT-FLOAT-VFP32-NEXT:    ldr r1, [sp, #28]
321; SOFT-FLOAT-VFP32-NEXT:    ldr r2, [sp, #56]
322; SOFT-FLOAT-VFP32-NEXT:    ldr r3, [sp, #60]
323; SOFT-FLOAT-VFP32-NEXT:    bl __muldf3
324; SOFT-FLOAT-VFP32-NEXT:    ldr r2, [sp, #88]
325; SOFT-FLOAT-VFP32-NEXT:    ldr r3, [sp, #92]
326; SOFT-FLOAT-VFP32-NEXT:    bl __adddf3
327; SOFT-FLOAT-VFP32-NEXT:    str r0, [r4, #16]
328; SOFT-FLOAT-VFP32-NEXT:    str r1, [r4, #20]
329; SOFT-FLOAT-VFP32-NEXT:    ldr r0, [sp, #16]
330; SOFT-FLOAT-VFP32-NEXT:    ldr r1, [sp, #20]
331; SOFT-FLOAT-VFP32-NEXT:    ldr r2, [sp, #48]
332; SOFT-FLOAT-VFP32-NEXT:    ldr r3, [sp, #52]
333; SOFT-FLOAT-VFP32-NEXT:    bl __muldf3
334; SOFT-FLOAT-VFP32-NEXT:    ldr r2, [sp, #80]
335; SOFT-FLOAT-VFP32-NEXT:    ldr r3, [sp, #84]
336; SOFT-FLOAT-VFP32-NEXT:    bl __adddf3
337; SOFT-FLOAT-VFP32-NEXT:    ldr r2, [sp, #40]
338; SOFT-FLOAT-VFP32-NEXT:    ldr r3, [sp, #44]
339; SOFT-FLOAT-VFP32-NEXT:    str r0, [r4, #8]
340; SOFT-FLOAT-VFP32-NEXT:    mov r0, r6
341; SOFT-FLOAT-VFP32-NEXT:    str r1, [r4, #12]
342; SOFT-FLOAT-VFP32-NEXT:    mov r1, r5
343; SOFT-FLOAT-VFP32-NEXT:    bl __muldf3
344; SOFT-FLOAT-VFP32-NEXT:    ldr r2, [sp, #72]
345; SOFT-FLOAT-VFP32-NEXT:    ldr r3, [sp, #76]
346; SOFT-FLOAT-VFP32-NEXT:    bl __adddf3
347; SOFT-FLOAT-VFP32-NEXT:    stm r4, {r0, r1}
348; SOFT-FLOAT-VFP32-NEXT:    pop {r4, r5, r6, lr}
349; SOFT-FLOAT-VFP32-NEXT:    mov pc, lr
350;
351; SOFT-FLOAT-VFP64-LABEL: fmuladd_contract_v4f64:
352; SOFT-FLOAT-VFP64:       @ %bb.0:
353; SOFT-FLOAT-VFP64-NEXT:    push {r4, r5, r6, lr}
354; SOFT-FLOAT-VFP64-NEXT:    mov r5, r3
355; SOFT-FLOAT-VFP64-NEXT:    mov r6, r2
356; SOFT-FLOAT-VFP64-NEXT:    mov r4, r0
357; SOFT-FLOAT-VFP64-NEXT:    ldr r0, [sp, #32]
358; SOFT-FLOAT-VFP64-NEXT:    ldr r1, [sp, #36]
359; SOFT-FLOAT-VFP64-NEXT:    ldr r2, [sp, #64]
360; SOFT-FLOAT-VFP64-NEXT:    ldr r3, [sp, #68]
361; SOFT-FLOAT-VFP64-NEXT:    bl __muldf3
362; SOFT-FLOAT-VFP64-NEXT:    ldr r2, [sp, #96]
363; SOFT-FLOAT-VFP64-NEXT:    ldr r3, [sp, #100]
364; SOFT-FLOAT-VFP64-NEXT:    bl __adddf3
365; SOFT-FLOAT-VFP64-NEXT:    str r0, [r4, #24]
366; SOFT-FLOAT-VFP64-NEXT:    str r1, [r4, #28]
367; SOFT-FLOAT-VFP64-NEXT:    ldr r0, [sp, #24]
368; SOFT-FLOAT-VFP64-NEXT:    ldr r1, [sp, #28]
369; SOFT-FLOAT-VFP64-NEXT:    ldr r2, [sp, #56]
370; SOFT-FLOAT-VFP64-NEXT:    ldr r3, [sp, #60]
371; SOFT-FLOAT-VFP64-NEXT:    bl __muldf3
372; SOFT-FLOAT-VFP64-NEXT:    ldr r2, [sp, #88]
373; SOFT-FLOAT-VFP64-NEXT:    ldr r3, [sp, #92]
374; SOFT-FLOAT-VFP64-NEXT:    bl __adddf3
375; SOFT-FLOAT-VFP64-NEXT:    str r0, [r4, #16]
376; SOFT-FLOAT-VFP64-NEXT:    str r1, [r4, #20]
377; SOFT-FLOAT-VFP64-NEXT:    ldr r0, [sp, #16]
378; SOFT-FLOAT-VFP64-NEXT:    ldr r1, [sp, #20]
379; SOFT-FLOAT-VFP64-NEXT:    ldr r2, [sp, #48]
380; SOFT-FLOAT-VFP64-NEXT:    ldr r3, [sp, #52]
381; SOFT-FLOAT-VFP64-NEXT:    bl __muldf3
382; SOFT-FLOAT-VFP64-NEXT:    ldr r2, [sp, #80]
383; SOFT-FLOAT-VFP64-NEXT:    ldr r3, [sp, #84]
384; SOFT-FLOAT-VFP64-NEXT:    bl __adddf3
385; SOFT-FLOAT-VFP64-NEXT:    ldr r2, [sp, #40]
386; SOFT-FLOAT-VFP64-NEXT:    ldr r3, [sp, #44]
387; SOFT-FLOAT-VFP64-NEXT:    str r0, [r4, #8]
388; SOFT-FLOAT-VFP64-NEXT:    mov r0, r6
389; SOFT-FLOAT-VFP64-NEXT:    str r1, [r4, #12]
390; SOFT-FLOAT-VFP64-NEXT:    mov r1, r5
391; SOFT-FLOAT-VFP64-NEXT:    bl __muldf3
392; SOFT-FLOAT-VFP64-NEXT:    ldr r2, [sp, #72]
393; SOFT-FLOAT-VFP64-NEXT:    ldr r3, [sp, #76]
394; SOFT-FLOAT-VFP64-NEXT:    bl __adddf3
395; SOFT-FLOAT-VFP64-NEXT:    stm r4, {r0, r1}
396; SOFT-FLOAT-VFP64-NEXT:    pop {r4, r5, r6, lr}
397; SOFT-FLOAT-VFP64-NEXT:    mov pc, lr
398  %product = fmul contract <4 x double> %a, %b
399  %result = fadd contract <4 x double> %product, %c
400  ret <4 x double> %result
401}
402
403attributes #0 = { "use-soft-float"="true" }
404
405declare float @llvm.fmuladd.f32(float %a, float %b, float %c)
406declare double @llvm.fmuladd.f64(double %a, double %b, double %c)
407