xref: /llvm-project/llvm/test/CodeGen/ARM/fast-isel-select.ll (revision be179b9946f6dfd6e3d957d9f7a6ee992d1f69d2)
1; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM
2; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM
3; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB
4; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv8-apple-ios | FileCheck %s --check-prefix=THUMB
5
6define i32 @t1(i1 %c) nounwind readnone {
7entry:
8; ARM-LABEL: t1:
9; ARM: mov r1, r0
10; ARM: movw r0, #10
11; ARM: tst r1, #1
12; ARM: moveq r0, #20
13; THUMB-LABEL: t1:
14; THUMB: mov r1, r0
15; THUMB: movs r0, #10
16; THUMB: tst.w r1, #1
17; THUMB: it eq
18; THUMB: moveq r0, #20
19  %0 = select i1 %c, i32 10, i32 20
20  ret i32 %0
21}
22
23define i32 @t2(i1 %c, i32 %a) nounwind readnone {
24entry:
25; ARM-LABEL: t2:
26; ARM: tst {{r[0-9]+}}, #1
27; ARM: moveq {{r[0-9]+}}, #20
28; THUMB-LABEL: t2:
29; THUMB: tst.w {{r[0-9]+}}, #1
30; THUMB: it eq
31; THUMB: moveq {{r[0-9]+}}, #20
32  %0 = select i1 %c, i32 %a, i32 20
33  ret i32 %0
34}
35
36define i32 @t3(i1 %c, i32 %a, i32 %b) nounwind readnone {
37entry:
38; ARM-LABEL: t3:
39; ARM: tst r0, #1
40; ARM: movne r2, r1
41; ARM: add r0, r2, r1
42; THUMB-LABEL: t3:
43; THUMB: tst.w r0, #1
44; THUMB: it ne
45; THUMB: movne r2, r1
46; THUMB: adds r0, r2, r1
47  %0 = select i1 %c, i32 %a, i32 %b
48  %1 = add i32 %0, %a
49  ret i32 %1
50}
51
52define i32 @t4(i1 %c) nounwind readnone {
53entry:
54; ARM-LABEL: t4:
55; ARM: mov r1, r0
56; ARM: mvn r0, #9
57; ARM: tst r1, #1
58; ARM: mvneq r0, #0
59; THUMB-LABEL: t4:
60; THUMB: mov r1, r0
61; THUMB: mvn r0, #9
62; THUMB: tst.w r1, #1
63; THUMB: it eq
64; THUMB: mvneq r0, #0
65  %0 = select i1 %c, i32 -10, i32 -1
66  ret i32 %0
67}
68
69define i32 @t5(i1 %c, i32 %a) nounwind readnone {
70entry:
71; ARM-LABEL: t5:
72; ARM: tst {{r[0-9]+}}, #1
73; ARM: mvneq {{r[0-9]+}}, #1
74; THUMB-LABEL: t5:
75; THUMB: tst.w {{r[0-9]+}}, #1
76; THUMB: it eq
77; THUMB: mvneq {{r[0-9]+}}, #1
78  %0 = select i1 %c, i32 %a, i32 -2
79  ret i32 %0
80}
81
82; Check one large negative immediates.
83define i32 @t6(i1 %c, i32 %a) nounwind readnone {
84entry:
85; ARM-LABEL: t6:
86; ARM: tst {{r[0-9]+}}, #1
87; ARM: mvneq {{r[0-9]+}}, #978944
88; THUMB-LABEL: t6:
89; THUMB: tst.w {{r[0-9]+}}, #1
90; THUMB: it eq
91; THUMB: mvneq {{r[0-9]+}}, #978944
92  %0 = select i1 %c, i32 %a, i32 -978945
93  ret i32 %0
94}
95