xref: /llvm-project/llvm/test/CodeGen/ARM/fast-isel-ldr-str-arm.ll (revision bed1c7f061aa12417aa081e334afdba45767b938)
1; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-darwin | FileCheck %s --check-prefix=ARM
2
3define i32 @t1(ptr nocapture %ptr) nounwind readonly {
4entry:
5; ARM: t1
6  %add.ptr = getelementptr inbounds i32, ptr %ptr, i32 1
7  %0 = load i32, ptr %add.ptr, align 4
8; ARM: ldr r{{[0-9]}}, [r0, #4]
9  ret i32 %0
10}
11
12define i32 @t2(ptr nocapture %ptr) nounwind readonly {
13entry:
14; ARM: t2
15  %add.ptr = getelementptr inbounds i32, ptr %ptr, i32 63
16  %0 = load i32, ptr %add.ptr, align 4
17; ARM: ldr.w r{{[0-9]}}, [r0, #252]
18  ret i32 %0
19}
20
21define zeroext i16 @t3(ptr nocapture %ptr) nounwind readonly {
22entry:
23; ARM: t3
24  %add.ptr = getelementptr inbounds i16, ptr %ptr, i16 1
25  %0 = load i16, ptr %add.ptr, align 4
26; ARM: ldrh r{{[0-9]}}, [r0, #2]
27  ret i16 %0
28}
29
30define zeroext i16 @t4(ptr nocapture %ptr) nounwind readonly {
31entry:
32; ARM: t4
33  %add.ptr = getelementptr inbounds i16, ptr %ptr, i16 63
34  %0 = load i16, ptr %add.ptr, align 4
35; ARM: ldrh.w r{{[0-9]}}, [r0, #126]
36  ret i16 %0
37}
38
39define zeroext i8 @t5(ptr nocapture %ptr) nounwind readonly {
40entry:
41; ARM: t5
42  %add.ptr = getelementptr inbounds i8, ptr %ptr, i8 1
43  %0 = load i8, ptr %add.ptr, align 4
44; ARM: ldrb r{{[0-9]}}, [r0, #1]
45  ret i8 %0
46}
47
48define zeroext i8 @t6(ptr nocapture %ptr) nounwind readonly {
49entry:
50; ARM: t6
51  %add.ptr = getelementptr inbounds i8, ptr %ptr, i8 63
52  %0 = load i8, ptr %add.ptr, align 4
53; ARM: ldrb.w r{{[0-9]}}, [r0, #63]
54  ret i8 %0
55}
56