1; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM 2; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM 3; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB 4; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -mattr=+long-calls | FileCheck %s --check-prefix=ARM-LONG --check-prefix=ARM-LONG-MACHO 5; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=static -mtriple=armv7-apple-ios -mattr=+long-calls | FileCheck %s --check-prefix=ARM-LONG --check-prefix=ARM-LONG-MACHO-STATIC 6; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -mattr=+long-calls | FileCheck %s --check-prefix=ARM-LONG --check-prefix=ARM-LONG-ELF 7; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -mattr=+long-calls | FileCheck %s --check-prefix=THUMB-LONG 8; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -mattr=-fpregs | FileCheck %s --check-prefix=ARM-NOVFP 9; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -mattr=-fpregs | FileCheck %s --check-prefix=ARM-NOVFP 10; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -mattr=-fpregs | FileCheck %s --check-prefix=THUMB-NOVFP 11 12; Note that some of these tests assume that relocations are either 13; movw/movt or constant pool loads. Different platforms will select 14; different approaches. 15 16define i32 @t0(i1 zeroext %a) nounwind { 17 %1 = zext i1 %a to i32 18 ret i32 %1 19} 20 21define i32 @t1(i8 signext %a) nounwind { 22 %1 = sext i8 %a to i32 23 ret i32 %1 24} 25 26define i32 @t2(i8 zeroext %a) nounwind { 27 %1 = zext i8 %a to i32 28 ret i32 %1 29} 30 31define i32 @t3(i16 signext %a) nounwind { 32 %1 = sext i16 %a to i32 33 ret i32 %1 34} 35 36define i32 @t4(i16 zeroext %a) nounwind { 37 %1 = zext i16 %a to i32 38 ret i32 %1 39} 40 41define void @foo(i8 %a, i16 %b) nounwind { 42; ARM-LABEL: foo: 43; THUMB-LABEL: foo: 44;; Materialize i1 1 45; ARM: movw [[REG0:r[0-9]+]], #1 46; THUMB: movs [[REG0:r[0-9]+]], #1 47;; zero-ext 48; ARM: and [[REG1:r[0-9]+]], [[REG0]], #1 49; THUMB: and [[REG1:r[0-9]+]], [[REG0]], #1 50 %1 = call i32 @t0(i1 zeroext 1) 51; ARM: sxtb r0, {{r[0-9]+}} 52; THUMB: sxtb r0, {{r[0-9]+}} 53 %2 = call i32 @t1(i8 signext %a) 54; ARM: and r0, {{r[0-9]+}}, #255 55; THUMB: and r0, {{r[0-9]+}}, #255 56 %3 = call i32 @t2(i8 zeroext %a) 57; ARM: sxth r0, {{r[0-9]+}} 58; THUMB: sxth r0, {{r[0-9]+}} 59 %4 = call i32 @t3(i16 signext %b) 60; ARM: uxth r0, {{r[0-9]+}} 61; THUMB: uxth r0, {{r[0-9]+}} 62 %5 = call i32 @t4(i16 zeroext %b) 63 64;; A few test to check materialization 65;; Note: i1 1 was materialized with t1 call 66; ARM: movw {{r[0-9]+}}, #255 67%6 = call i32 @t2(i8 zeroext 255) 68; ARM: movw {{r[0-9]+}}, #65535 69; THUMB: movw {{r[0-9]+}}, #65535 70%7 = call i32 @t4(i16 zeroext 65535) 71 ret void 72} 73 74define void @foo2() nounwind { 75 %1 = call signext i16 @t5() 76 %2 = call zeroext i16 @t6() 77 %3 = call signext i8 @t7() 78 %4 = call zeroext i8 @t8() 79 %5 = call zeroext i1 @t9() 80 ret void 81} 82 83declare signext i16 @t5(); 84declare zeroext i16 @t6(); 85declare signext i8 @t7(); 86declare zeroext i8 @t8(); 87declare zeroext i1 @t9(); 88 89define i32 @t10() { 90entry: 91; ARM-LABEL: @t10 92; ARM-DAG: movw [[R0:l?r[0-9]*]], #0 93; ARM-DAG: movw [[R1:l?r[0-9]*]], #248 94; ARM-DAG: movw [[R2:l?r[0-9]*]], #187 95; ARM-DAG: movw [[R3:l?r[0-9]*]], #28 96; ARM-DAG: movw [[R4:l?r[0-9]*]], #40 97; ARM-DAG: movw [[R5:l?r[0-9]*]], #186 98; ARM-DAG: and [[R0]], [[R0]], #255 99; ARM-DAG: and [[R1]], [[R1]], #255 100; ARM-DAG: and [[R2]], [[R2]], #255 101; ARM-DAG: and [[R3]], [[R3]], #255 102; ARM-DAG: and [[R4]], [[R4]], #255 103; ARM-DAG: str [[R4]], [sp] 104; ARM-DAG: and [[R5]], [[R5]], #255 105; ARM-DAG: str [[R5]], [sp, #4] 106; ARM: bl {{_?}}bar 107; ARM-LONG-LABEL: @t10 108 109; ARM-LONG-MACHO: {{(movw)|(ldr)}} [[R1:l?r[0-9]*]], {{(:lower16:L_bar\$non_lazy_ptr)|(.LCPI)}} 110; ARM-LONG-MACHO: {{(movt [[R1]], :upper16:L_bar\$non_lazy_ptr)?}} 111; ARM-LONG-MACHO: ldr [[R:r[0-9]+]], [[[R1]]] 112 113; ARM-LONG-MACHO-STATIC: movw [[R:.*]], :lower16:_bar 114; ARM-LONG-MACHO-STATIC: movt [[R]], :upper16:_bar 115; ARM-LONG-MACHO-STATIC-NOT: ldr{{.*}}[[R]] 116 117; ARM-LONG-ELF: movw [[R:r[0-9]*]], :lower16:bar 118; ARM-LONG-ELF: movt [[R]], :upper16:bar 119; ARM-LONG-ELF-NOT: ldr{{.*}}[[R]] 120 121; ARM-LONG: blx [[R]] 122; THUMB-LABEL: @t10 123; THUMB-DAG: movs [[R0:l?r[0-9]*]], #0 124; THUMB-DAG: movs [[R1:l?r[0-9]*]], #248 125; THUMB-DAG: movs [[R2:l?r[0-9]*]], #187 126; THUMB-DAG: movs [[R3:l?r[0-9]*]], #28 127; THUMB-DAG: movw [[R4:l?r[0-9]*]], #40 128; THUMB-DAG: movw [[R5:l?r[0-9]*]], #186 129; THUMB-DAG: and [[R0]], [[R0]], #255 130; THUMB-DAG: and [[R1]], [[R1]], #255 131; THUMB-DAG: and [[R2]], [[R2]], #255 132; THUMB-DAG: and [[R3]], [[R3]], #255 133; THUMB-DAG: and [[R4]], [[R4]], #255 134; THUMB-DAG: str.w [[R4]], [sp] 135; THUMB-DAG: and [[R5]], [[R5]], #255 136; THUMB-DAG: str.w [[R5]], [sp, #4] 137; THUMB: bl {{_?}}bar 138; THUMB-LONG-LABEL: @t10 139; THUMB-LONG: {{(movw)|(ldr.n)}} [[R1:l?r[0-9]*]], {{(:lower16:L_bar\$non_lazy_ptr)|(.LCPI)}} 140; THUMB-LONG: {{(movt [[R1]], :upper16:L_bar\$non_lazy_ptr)?}} 141; THUMB-LONG: ldr{{(.w)?}} [[R:r[0-9]+]], [[[R1]]] 142; THUMB-LONG: blx [[R]] 143 %call = call i32 @bar(i8 zeroext 0, i8 zeroext -8, i8 zeroext -69, i8 zeroext 28, i8 zeroext 40, i8 zeroext -70) 144 ret i32 0 145} 146 147declare i32 @bar(i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext) 148 149define i32 @bar0(i32 %i) nounwind { 150 ret i32 0 151} 152 153define void @foo3() uwtable { 154; ARM-LABEL: @foo3 155; ARM: {{(movw r[0-9]+, :lower16:_?bar0)|(ldr r[0-9]+, .LCPI)}} 156; ARM: {{(movt r[0-9]+, :upper16:_?bar0)|(ldr r[0-9]+, \[r[0-9]+\])}} 157; ARM: movw {{r[0-9]+}}, #0 158; ARM: blx {{r[0-9]+}} 159; THUMB: {{(movw r[0-9]+, :lower16:_?bar0)|(ldr.n r[0-9]+, .LCPI)}} 160; THUMB: {{(movt r[0-9]+, :upper16:_?bar0)|(ldr r[0-9]+, \[r[0-9]+\])}} 161; THUMB: movs {{r[0-9]+}}, #0 162; THUMB: blx {{r[0-9]+}} 163 %fptr = alloca ptr, align 8 164 store ptr @bar0, ptr %fptr, align 8 165 %1 = load ptr, ptr %fptr, align 8 166 %call = call i32 %1(i32 0) 167 ret void 168} 169 170define i32 @LibCall(i32 %a, i32 %b) { 171entry: 172; ARM-LABEL: LibCall: 173; ARM: bl {{___udivsi3|__aeabi_uidiv}} 174; ARM-LONG-LABEL: LibCall: 175 176; ARM-LONG-MACHO: {{(movw r2, :lower16:L___udivsi3\$non_lazy_ptr)|(ldr r2, .LCPI)}} 177; ARM-LONG-MACHO: {{(movt r2, :upper16:L___udivsi3\$non_lazy_ptr)?}} 178; ARM-LONG-MACHO: ldr r2, [r2] 179 180; ARM-LONG-ELF: movw r2, :lower16:__aeabi_uidiv 181; ARM-LONG-ELF: movt r2, :upper16:__aeabi_uidiv 182 183; ARM-LONG: blx r2 184; THUMB-LABEL: LibCall: 185; THUMB: bl {{___udivsi3|__aeabi_uidiv}} 186; THUMB-LONG-LABEL: LibCall 187; THUMB-LONG: {{(movw r2, :lower16:L___udivsi3\$non_lazy_ptr)|(ldr.n r2, .LCPI)}} 188; THUMB-LONG: {{(movt r2, :upper16:L___udivsi3\$non_lazy_ptr)?}} 189; THUMB-LONG: ldr r2, [r2] 190; THUMB-LONG: blx r2 191 %tmp1 = udiv i32 %a, %b ; <i32> [#uses=1] 192 ret i32 %tmp1 193} 194 195; Make sure we reuse the original ___udivsi3 rather than creating a new one 196; called ___udivsi3.1 or whatever. 197define i32 @LibCall2(i32 %a, i32 %b) { 198entry: 199; ARM-LABEL: LibCall2: 200; ARM: bl {{___udivsi3|__aeabi_uidiv}} 201; ARM-LONG-LABEL: LibCall2: 202 203; ARM-LONG-MACHO: {{(movw r2, :lower16:L___udivsi3\$non_lazy_ptr)|(ldr r2, .LCPI)}} 204; ARM-LONG-MACHO: {{(movt r2, :upper16:L___udivsi3\$non_lazy_ptr)?}} 205; ARM-LONG-MACHO: ldr r2, [r2] 206 207; ARM-LONG-ELF: movw r2, :lower16:__aeabi_uidiv 208; ARM-LONG-ELF: movt r2, :upper16:__aeabi_uidiv 209 210; ARM-LONG: blx r2 211; THUMB-LABEL: LibCall2: 212; THUMB: bl {{___udivsi3|__aeabi_uidiv}} 213; THUMB-LONG-LABEL: LibCall2 214; THUMB-LONG: {{(movw r2, :lower16:L___udivsi3\$non_lazy_ptr)|(ldr.n r2, .LCPI)}} 215; THUMB-LONG: {{(movt r2, :upper16:L___udivsi3\$non_lazy_ptr)?}} 216; THUMB-LONG: ldr r2, [r2] 217; THUMB-LONG: blx r2 218 %tmp1 = udiv i32 %a, %b ; <i32> [#uses=1] 219 ret i32 %tmp1 220} 221 222; Test fastcc 223 224define fastcc void @fast_callee(float %i) ssp { 225entry: 226; ARM-LABEL: fast_callee: 227; ARM: vmov r0, s0 228; THUMB-LABEL: fast_callee: 229; THUMB: vmov r0, s0 230; ARM-NOVFP: fast_callee 231; ARM-NOVFP-NOT: s0 232; THUMB-NOVFP: fast_callee 233; THUMB-NOVFP-NOT: s0 234 call void @print(float %i) 235 ret void 236} 237 238define void @fast_caller() ssp { 239entry: 240; ARM-LABEL: fast_caller: 241; ARM: vldr s0, 242; THUMB-LABEL: fast_caller: 243; THUMB: vldr s0, 244; ARM-NOVFP-LABEL: fast_caller: 245; ARM-NOVFP: movw r0, #13107 246; ARM-NOVFP: movt r0, #16611 247; THUMB-NOVFP-LABEL: fast_caller: 248; THUMB-NOVFP: movw r0, #13107 249; THUMB-NOVFP: movt r0, #16611 250 call fastcc void @fast_callee(float 0x401C666660000000) 251 ret void 252} 253 254define void @no_fast_callee(float %i) ssp { 255entry: 256; ARM-LABEL: no_fast_callee: 257; ARM: vmov s0, r0 258; THUMB-LABEL: no_fast_callee: 259; THUMB: vmov s0, r0 260; ARM-NOVFP-LABEL: no_fast_callee: 261; ARM-NOVFP-NOT: s0 262; THUMB-NOVFP-LABEL: no_fast_callee: 263; THUMB-NOVFP-NOT: s0 264 call void @print(float %i) 265 ret void 266} 267 268define void @no_fast_caller() ssp { 269entry: 270; ARM-LABEL: no_fast_caller: 271; ARM: vmov r0, s0 272; THUMB-LABEL: no_fast_caller: 273; THUMB: vmov r0, s0 274; ARM-NOVFP-LABEL: no_fast_caller: 275; ARM-NOVFP: movw r0, #13107 276; ARM-NOVFP: movt r0, #16611 277; THUMB-NOVFP-LABEL: no_fast_caller: 278; THUMB-NOVFP: movw r0, #13107 279; THUMB-NOVFP: movt r0, #16611 280 call void @no_fast_callee(float 0x401C666660000000) 281 ret void 282} 283 284declare void @bar2(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6) 285 286define void @call_undef_args() { 287; ARM-LABEL: call_undef_args: 288; ARM: movw r0, #1 289; ARM-NEXT: movw r1, #2 290; ARM-NEXT: movw r2, #3 291; ARM-NEXT: movw r3, #4 292; ARM-NOT: str {{r[0-9]+}}, [sp] 293; ARM: movw [[REG:l?r[0-9]*]], #6 294; ARM-NEXT: str [[REG]], [sp, #4] 295 call void @bar2(i32 1, i32 2, i32 3, i32 4, i32 undef, i32 6) 296 ret void 297} 298 299declare void @print(float) 300