1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 2; RUN: llc < %s -mtriple=armv7--linux-gnueabihf -mattr=+neon | FileCheck %s 3 4; This test case used to crash due to the div by K -> mul expansion in TargetLowering. 5 6define <8 x i32> @f1(<8 x i32> %arg) { 7; CHECK-LABEL: f1: 8; CHECK: @ %bb.0: 9; CHECK-NEXT: .save {r4, r5, r6, r7, r11, lr} 10; CHECK-NEXT: push {r4, r5, r6, r7, r11, lr} 11; CHECK-NEXT: vmov r0, r2, d2 12; CHECK-NEXT: movw r4, #60681 13; CHECK-NEXT: vmov lr, r1, d0 14; CHECK-NEXT: movt r4, #46117 15; CHECK-NEXT: vmov r12, r3, d3 16; CHECK-NEXT: smmul r5, r0, r4 17; CHECK-NEXT: smmul r7, r2, r4 18; CHECK-NEXT: smmul r6, r1, r4 19; CHECK-NEXT: asr r2, r5, #4 20; CHECK-NEXT: smmul r1, r3, r4 21; CHECK-NEXT: add r2, r2, r5, lsr #31 22; CHECK-NEXT: vmov r3, r5, d1 23; CHECK-NEXT: smmul r0, lr, r4 24; CHECK-NEXT: vmov.32 d2[0], r2 25; CHECK-NEXT: smmul r5, r5, r4 26; CHECK-NEXT: smmul r3, r3, r4 27; CHECK-NEXT: smmul r4, r12, r4 28; CHECK-NEXT: asr r2, r4, #4 29; CHECK-NEXT: add r2, r2, r4, lsr #31 30; CHECK-NEXT: asr r4, r3, #4 31; CHECK-NEXT: vmov.32 d3[0], r2 32; CHECK-NEXT: add r2, r4, r3, lsr #31 33; CHECK-NEXT: asr r3, r0, #4 34; CHECK-NEXT: add r0, r3, r0, lsr #31 35; CHECK-NEXT: vmov.32 d1[0], r2 36; CHECK-NEXT: asr r2, r5, #4 37; CHECK-NEXT: vmov.32 d0[0], r0 38; CHECK-NEXT: add r0, r2, r5, lsr #31 39; CHECK-NEXT: asr r2, r6, #4 40; CHECK-NEXT: vmov.32 d1[1], r0 41; CHECK-NEXT: add r0, r2, r6, lsr #31 42; CHECK-NEXT: asr r2, r1, #4 43; CHECK-NEXT: vmov.32 d0[1], r0 44; CHECK-NEXT: add r0, r2, r1, lsr #31 45; CHECK-NEXT: asr r1, r7, #4 46; CHECK-NEXT: vmov.32 d3[1], r0 47; CHECK-NEXT: add r0, r1, r7, lsr #31 48; CHECK-NEXT: vmov.32 d2[1], r0 49; CHECK-NEXT: pop {r4, r5, r6, r7, r11, pc} 50 %v = sdiv <8 x i32> %arg, <i32 -54, i32 -54, i32 -54, i32 -54, i32 -54, i32 -54, i32 -54, i32 -54> 51 ret <8 x i32> %v 52} 53