xref: /llvm-project/llvm/test/CodeGen/ARM/crc32.ll (revision a82c106e571c6991a95c38a936a466895122d713) 
1; RUN: llc -mtriple=thumbv7 -mattr=+crc -o - %s | FileCheck %s
2; RUN: llc -mtriple=thumbv8 -o - %s | FileCheck %s
3; RUN: llc -mtriple=armv7 -mattr=+crc -o - %s | FileCheck %s
4; RUN: llc -mtriple=armv8 -o - %s | FileCheck %s
5
6define i32 @test_crc32b(i32 %cur, i8 %next) {
7; CHECK-LABEL: test_crc32b:
8; CHECK: crc32b r0, r0, r1
9  %bits = zext i8 %next to i32
10  %val = call i32 @llvm.arm.crc32b(i32 %cur, i32 %bits)
11  ret i32 %val
12}
13
14define i32 @test_crc32h(i32 %cur, i16 %next) {
15; CHECK-LABEL: test_crc32h:
16; CHECK: crc32h r0, r0, r1
17  %bits = zext i16 %next to i32
18  %val = call i32 @llvm.arm.crc32h(i32 %cur, i32 %bits)
19  ret i32 %val
20}
21
22define i32 @test_crc32w(i32 %cur, i32 %next) {
23; CHECK-LABEL: test_crc32w:
24; CHECK: crc32w r0, r0, r1
25  %val = call i32 @llvm.arm.crc32w(i32 %cur, i32 %next)
26  ret i32 %val
27}
28
29define i32 @test_crc32cb(i32 %cur, i8 %next) {
30; CHECK-LABEL: test_crc32cb:
31; CHECK: crc32cb r0, r0, r1
32  %bits = zext i8 %next to i32
33  %val = call i32 @llvm.arm.crc32cb(i32 %cur, i32 %bits)
34  ret i32 %val
35}
36
37define i32 @test_crc32ch(i32 %cur, i16 %next) {
38; CHECK-LABEL: test_crc32ch:
39; CHECK: crc32ch r0, r0, r1
40  %bits = zext i16 %next to i32
41  %val = call i32 @llvm.arm.crc32ch(i32 %cur, i32 %bits)
42  ret i32 %val
43}
44
45define i32 @test_crc32cw(i32 %cur, i32 %next) {
46; CHECK-LABEL: test_crc32cw:
47; CHECK: crc32cw r0, r0, r1
48  %val = call i32 @llvm.arm.crc32cw(i32 %cur, i32 %next)
49  ret i32 %val
50}
51
52
53declare i32 @llvm.arm.crc32b(i32, i32)
54declare i32 @llvm.arm.crc32h(i32, i32)
55declare i32 @llvm.arm.crc32w(i32, i32)
56declare i32 @llvm.arm.crc32x(i32, i64)
57
58declare i32 @llvm.arm.crc32cb(i32, i32)
59declare i32 @llvm.arm.crc32ch(i32, i32)
60declare i32 @llvm.arm.crc32cw(i32, i32)
61declare i32 @llvm.arm.crc32cx(i32, i64)
62