1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple arm-arm-eabi -mcpu=cortex-m7 -verify-machineinstrs -run-pass=postmisched %s -o - | FileCheck %s 3--- 4name: test_groups 5alignment: 2 6tracksRegLiveness: true 7liveins: 8 - { reg: '$d0' } 9 - { reg: '$r0' } 10 - { reg: '$r1' } 11 - { reg: '$r2' } 12 - { reg: '$r3' } 13 - { reg: '$r4' } 14frameInfo: 15 maxAlignment: 1 16 maxCallFrameSize: 0 17machineFunctionInfo: {} 18body: | 19 bb.0: 20 liveins: $d0, $r0, $r1, $r2, $r3, $r4 21 22 ; CHECK-LABEL: name: test_groups 23 ; CHECK: liveins: $d0, $r0, $r1, $r2, $r3, $r4 24 ; CHECK: renamable $d0 = VADDD killed renamable $d0, renamable $d0, 14 /* CC::al */, $noreg 25 ; CHECK: renamable $r3 = t2ADDrr killed renamable $r3, renamable $r3, 14 /* CC::al */, $noreg, $noreg 26 ; CHECK: renamable $s2 = VLDRS killed renamable $r0, 0, 14 /* CC::al */, $noreg 27 ; CHECK: VSTRS killed renamable $s2, killed renamable $r1, 0, 14 /* CC::al */, $noreg 28 ; CHECK: t2STRi12 killed renamable $r3, killed renamable $r2, 0, 14 /* CC::al */, $noreg 29 ; CHECK: renamable $r4 = t2ADDrr killed renamable $r4, renamable $r4, 14 /* CC::al */, $noreg, $noreg 30 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit killed $d0 31 renamable $s2 = VLDRS killed renamable $r0, 0, 14 /* CC::al */, $noreg 32 renamable $d0 = VADDD killed renamable $d0, renamable $d0, 14 /* CC::al */, $noreg 33 VSTRS killed renamable $s2, killed renamable $r1, 0, 14 /* CC::al */, $noreg 34 renamable $r3 = t2ADDrr killed renamable $r3, renamable $r3, 14 /* CC::al */, $noreg, $noreg 35 t2STRi12 killed renamable $r3, killed renamable $r2, 0, 14 /* CC::al */, $noreg 36 renamable $r4 = t2ADDrr killed renamable $r4, renamable $r4, 14 /* CC::al */, $noreg, $noreg 37 tBX_RET 14 /* CC::al */, $noreg, implicit $d0 38 39... 40