1# REQUIRES: asserts 2# RUN: llc -mcpu=cortex-a57 -mtriple=thumb -enable-misched -run-pass=machine-scheduler -debug-only=machine-scheduler %s -o - 2>&1 | FileCheck %s 3 4# CHECK-LABEL: ********** MI Scheduling ********** 5# CHECK: %[[RES:[0-9]+]]:rgpr = t2MLA 6# CHECK-NEXT: # preds left 7# CHECK-NEXT: # succs left 8# CHECK-NEXT: # rdefs left 9# CHECK-NEXT: Latency : 3 10# CHECK-NEXT: Depth 11# CHECK-NEXT: Height 12# CHECK-NEXT: Predecessors: 13# CHECK-NEXT: SU({{.*}}): Data Latency=1 Reg= 14# CHECK-NEXT: SU({{.*}}): Data Latency=1 Reg= 15# CHECK-NEXT: Successors: 16# CHECK-NEXT: SU([[SMLA_SU:[0-9]+]]): Data Latency=1 Reg=%[[RES]] 17# CHECK-NEXT: Pressure Diff 18# CHECK-NEXT: Single Issue : false; 19# CHECK-NEXT: SU([[SMLA_SU]]): {{.*}} = t2SMLAL %{{[0-9]+}}:rgpr, %{{[0-9]+}}:rgpr, %{{[0-9]+}}:rgpr(tied-def 0), %[[RES]]:rgpr(tied-def 1), 14, $noreg 20 21name: test_smlal_forwarding 22tracksRegLiveness: true 23body: | 24 bb.0: 25 liveins: $r1, $r3, $r4, $r5, $r6 26 %1:rgpr = COPY $r1 27 %3:rgpr = COPY $r3 28 %4:rgpr = COPY $r4 29 %5:rgpr = COPY $r5 30 %6:rgpr = COPY $r6 31 %3:rgpr = t2MLA %4:rgpr, %1:rgpr, %4:rgpr, 14, $noreg 32 %6:rgpr, %5:rgpr = t2SMLAL %5:rgpr, %6:rgpr, %4:rgpr, %3:rgpr, 14, $noreg 33 $r0 = COPY %6:rgpr 34 BX_RET 14, $noreg, implicit $r0 35