1; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s 2; PHI elimination shouldn't break backedge. 3 4%struct.list_data_s = type { i16, i16 } 5%struct.list_head = type { ptr, ptr } 6 7define arm_apcscc ptr @t1(ptr %list) nounwind { 8entry: 9; CHECK-LABEL: t1: 10 %0 = icmp eq ptr %list, null 11 br i1 %0, label %bb2, label %bb 12 13bb: 14; CHECK: LBB0_[[LABEL:[0-9]]]: 15; CHECK: bne LBB0_[[LABEL]] 16; CHECK-NOT: b LBB0_[[LABEL]] 17; CHECK: bx lr 18 %list_addr.05 = phi ptr [ %2, %bb ], [ %list, %entry ] 19 %next.04 = phi ptr [ %list_addr.05, %bb ], [ null, %entry ] 20 %1 = getelementptr inbounds %struct.list_head, ptr %list_addr.05, i32 0, i32 0 21 %2 = load ptr, ptr %1, align 4 22 store ptr %next.04, ptr %1, align 4 23 %3 = icmp eq ptr %2, null 24 br i1 %3, label %bb2, label %bb 25 26bb2: 27 %next.0.lcssa = phi ptr [ null, %entry ], [ %list_addr.05, %bb ] 28 ret ptr %next.0.lcssa 29} 30 31; Optimize loop entry, eliminate intra loop branches 32define i32 @t2(i32 %passes, ptr nocapture %src, i32 %size) nounwind readonly { 33entry: 34; CHECK-LABEL: t2: 35 %0 = icmp eq i32 %passes, 0 ; <i1> [#uses=1] 36 br i1 %0, label %bb5, label %bb.nph15 37 38bb1: ; preds = %bb2.preheader, %bb1 39; CHECK: LBB1_[[BB3:.]]: @ %bb3 40; CHECK: LBB1_[[PREHDR:.]]: @ %bb2.preheader 41; CHECK: bmi LBB1_[[BB3]] 42 %indvar = phi i32 [ %indvar.next, %bb1 ], [ 0, %bb2.preheader ] ; <i32> [#uses=2] 43 %sum.08 = phi i32 [ %2, %bb1 ], [ %sum.110, %bb2.preheader ] ; <i32> [#uses=1] 44 %tmp17 = sub i32 %i.07, %indvar ; <i32> [#uses=1] 45 %scevgep = getelementptr i32, ptr %src, i32 %tmp17 ; <i32*> [#uses=1] 46 %1 = load i32, ptr %scevgep, align 4 ; <i32> [#uses=1] 47 %2 = add nsw i32 %1, %sum.08 ; <i32> [#uses=2] 48 %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2] 49 %exitcond = icmp eq i32 %indvar.next, %size ; <i1> [#uses=1] 50 br i1 %exitcond, label %bb3, label %bb1 51 52bb3: ; preds = %bb1, %bb2.preheader 53; CHECK: LBB1_[[BB1:.]]: @ %bb1 54; CHECK: bne LBB1_[[BB1]] 55 %sum.0.lcssa = phi i32 [ %sum.110, %bb2.preheader ], [ %2, %bb1 ] ; <i32> [#uses=2] 56 %3 = add i32 %pass.011, 1 ; <i32> [#uses=2] 57 %exitcond18 = icmp eq i32 %3, %passes ; <i1> [#uses=1] 58 br i1 %exitcond18, label %bb5, label %bb2.preheader 59 60bb.nph15: ; preds = %entry 61 %i.07 = add i32 %size, -1 ; <i32> [#uses=2] 62 %4 = icmp sgt i32 %i.07, -1 ; <i1> [#uses=1] 63 br label %bb2.preheader 64 65bb2.preheader: ; preds = %bb3, %bb.nph15 66 %pass.011 = phi i32 [ 0, %bb.nph15 ], [ %3, %bb3 ] ; <i32> [#uses=1] 67 %sum.110 = phi i32 [ 0, %bb.nph15 ], [ %sum.0.lcssa, %bb3 ] ; <i32> [#uses=2] 68 br i1 %4, label %bb1, label %bb3 69 70bb5: ; preds = %bb3, %entry 71 %sum.1.lcssa = phi i32 [ 0, %entry ], [ %sum.0.lcssa, %bb3 ] ; <i32> [#uses=1] 72 ret i32 %sum.1.lcssa 73} 74