1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc %s -o - -mtriple=thumbv8m.main -mattr=+fp-armv8d16sp,+dsp -float-abi=hard | \ 3; RUN: FileCheck %s --check-prefix=CHECK-V8-LE 4; RUN: llc %s -o - -mtriple=thumbebv8m.main -mattr=+fp-armv8d16sp,+dsp -float-abi=hard | \ 5; RUN: FileCheck %s --check-prefix=CHECK-V8-BE 6 7; RUN: llc %s -o - -mtriple=thumbv8.1m.main -mattr=+fp-armv8d16sp,+dsp -float-abi=hard | \ 8; RUN: FileCheck %s --check-prefix=CHECK-V81-LE 9; RUN: llc %s -o - -mtriple=thumbebv8.1m.main -mattr=+fp-armv8d16sp,+dsp -float-abi=hard | \ 10; RUN: FileCheck %s --check-prefix=CHECK-V81-BE 11 12attributes #0 = { nounwind } 13attributes #1 = { "cmse_nonsecure_call" nounwind } 14 15define void @fidififiddddff(ptr %fu, float %a, i32 %b, double %c, i32 %d, float %e, i32 %f, float %g, i32 %h, double %i, double %j, double %k, double %l, float %m, float %n) #0 { 16; CHECK-V8-LE-LABEL: fidififiddddff: 17; CHECK-V8-LE: @ %bb.0: @ %entry 18; CHECK-V8-LE-NEXT: push {r7, lr} 19; CHECK-V8-LE-NEXT: mov lr, r3 20; CHECK-V8-LE-NEXT: mov r12, r0 21; CHECK-V8-LE-NEXT: mov r0, r1 22; CHECK-V8-LE-NEXT: mov r1, r2 23; CHECK-V8-LE-NEXT: ldr r3, [sp, #8] 24; CHECK-V8-LE-NEXT: mov r2, lr 25; CHECK-V8-LE-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11} 26; CHECK-V8-LE-NEXT: bic r12, r12, #1 27; CHECK-V8-LE-NEXT: sub sp, #136 28; CHECK-V8-LE-NEXT: vmov r4, s5 29; CHECK-V8-LE-NEXT: vmov r11, s0 30; CHECK-V8-LE-NEXT: vmov r9, r10, d1 31; CHECK-V8-LE-NEXT: vmov r8, s1 32; CHECK-V8-LE-NEXT: vmov r7, s4 33; CHECK-V8-LE-NEXT: vmov r5, r6, d3 34; CHECK-V8-LE-NEXT: vlstm sp 35; CHECK-V8-LE-NEXT: vmov s0, r11 36; CHECK-V8-LE-NEXT: vmov d1, r9, r10 37; CHECK-V8-LE-NEXT: vmov s1, r8 38; CHECK-V8-LE-NEXT: vmov s4, r7 39; CHECK-V8-LE-NEXT: vmov d3, r5, r6 40; CHECK-V8-LE-NEXT: vmov s5, r4 41; CHECK-V8-LE-NEXT: vldr d4, [sp, #32] 42; CHECK-V8-LE-NEXT: vldr d5, [sp, #40] 43; CHECK-V8-LE-NEXT: vldr d6, [sp, #48] 44; CHECK-V8-LE-NEXT: vldr s14, [sp, #56] 45; CHECK-V8-LE-NEXT: ldr r4, [sp, #64] 46; CHECK-V8-LE-NEXT: bic r4, r4, #159 47; CHECK-V8-LE-NEXT: bic r4, r4, #4026531840 48; CHECK-V8-LE-NEXT: vmsr fpscr, r4 49; CHECK-V8-LE-NEXT: msr apsr_nzcvqg, r12 50; CHECK-V8-LE-NEXT: blxns r12 51; CHECK-V8-LE-NEXT: vlldm sp 52; CHECK-V8-LE-NEXT: add sp, #136 53; CHECK-V8-LE-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11} 54; CHECK-V8-LE-NEXT: pop {r7, pc} 55; 56; CHECK-V8-BE-LABEL: fidififiddddff: 57; CHECK-V8-BE: @ %bb.0: @ %entry 58; CHECK-V8-BE-NEXT: push {r7, lr} 59; CHECK-V8-BE-NEXT: mov lr, r3 60; CHECK-V8-BE-NEXT: mov r12, r0 61; CHECK-V8-BE-NEXT: mov r0, r1 62; CHECK-V8-BE-NEXT: mov r1, r2 63; CHECK-V8-BE-NEXT: ldr r3, [sp, #8] 64; CHECK-V8-BE-NEXT: mov r2, lr 65; CHECK-V8-BE-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11} 66; CHECK-V8-BE-NEXT: bic r12, r12, #1 67; CHECK-V8-BE-NEXT: sub sp, #136 68; CHECK-V8-BE-NEXT: vmov r4, s5 69; CHECK-V8-BE-NEXT: vmov r11, s0 70; CHECK-V8-BE-NEXT: vmov r9, r10, d1 71; CHECK-V8-BE-NEXT: vmov r8, s1 72; CHECK-V8-BE-NEXT: vmov r7, s4 73; CHECK-V8-BE-NEXT: vmov r5, r6, d3 74; CHECK-V8-BE-NEXT: vlstm sp 75; CHECK-V8-BE-NEXT: vmov s0, r11 76; CHECK-V8-BE-NEXT: vmov d1, r9, r10 77; CHECK-V8-BE-NEXT: vmov s1, r8 78; CHECK-V8-BE-NEXT: vmov s4, r7 79; CHECK-V8-BE-NEXT: vmov d3, r5, r6 80; CHECK-V8-BE-NEXT: vmov s5, r4 81; CHECK-V8-BE-NEXT: vldr s8, [sp, #32] 82; CHECK-V8-BE-NEXT: vldr s9, [sp, #36] 83; CHECK-V8-BE-NEXT: vldr s10, [sp, #40] 84; CHECK-V8-BE-NEXT: vldr s11, [sp, #44] 85; CHECK-V8-BE-NEXT: vldr s12, [sp, #48] 86; CHECK-V8-BE-NEXT: vldr s13, [sp, #52] 87; CHECK-V8-BE-NEXT: vldr s14, [sp, #56] 88; CHECK-V8-BE-NEXT: ldr r4, [sp, #64] 89; CHECK-V8-BE-NEXT: bic r4, r4, #159 90; CHECK-V8-BE-NEXT: bic r4, r4, #4026531840 91; CHECK-V8-BE-NEXT: vmsr fpscr, r4 92; CHECK-V8-BE-NEXT: msr apsr_nzcvqg, r12 93; CHECK-V8-BE-NEXT: blxns r12 94; CHECK-V8-BE-NEXT: vlldm sp 95; CHECK-V8-BE-NEXT: add sp, #136 96; CHECK-V8-BE-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11} 97; CHECK-V8-BE-NEXT: pop {r7, pc} 98; 99; CHECK-V81-LE-LABEL: fidififiddddff: 100; CHECK-V81-LE: @ %bb.0: @ %entry 101; CHECK-V81-LE-NEXT: push {r7, lr} 102; CHECK-V81-LE-NEXT: mov lr, r3 103; CHECK-V81-LE-NEXT: mov r12, r0 104; CHECK-V81-LE-NEXT: mov r0, r1 105; CHECK-V81-LE-NEXT: mov r1, r2 106; CHECK-V81-LE-NEXT: ldr r3, [sp, #8] 107; CHECK-V81-LE-NEXT: mov r2, lr 108; CHECK-V81-LE-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11} 109; CHECK-V81-LE-NEXT: bic r12, r12, #1 110; CHECK-V81-LE-NEXT: vpush {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31} 111; CHECK-V81-LE-NEXT: vscclrm {s15, s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31, vpr} 112; CHECK-V81-LE-NEXT: vstr fpcxts, [sp, #-8]! 113; CHECK-V81-LE-NEXT: clrm {r4, r5, r6, r7, r8, r9, r10, r11, apsr} 114; CHECK-V81-LE-NEXT: blxns r12 115; CHECK-V81-LE-NEXT: vldr fpcxts, [sp], #8 116; CHECK-V81-LE-NEXT: vpop {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31} 117; CHECK-V81-LE-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11} 118; CHECK-V81-LE-NEXT: pop {r7, pc} 119; 120; CHECK-V81-BE-LABEL: fidififiddddff: 121; CHECK-V81-BE: @ %bb.0: @ %entry 122; CHECK-V81-BE-NEXT: push {r7, lr} 123; CHECK-V81-BE-NEXT: mov lr, r3 124; CHECK-V81-BE-NEXT: mov r12, r0 125; CHECK-V81-BE-NEXT: mov r0, r1 126; CHECK-V81-BE-NEXT: mov r1, r2 127; CHECK-V81-BE-NEXT: ldr r3, [sp, #8] 128; CHECK-V81-BE-NEXT: mov r2, lr 129; CHECK-V81-BE-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11} 130; CHECK-V81-BE-NEXT: bic r12, r12, #1 131; CHECK-V81-BE-NEXT: vpush {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31} 132; CHECK-V81-BE-NEXT: vscclrm {s15, s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31, vpr} 133; CHECK-V81-BE-NEXT: vstr fpcxts, [sp, #-8]! 134; CHECK-V81-BE-NEXT: clrm {r4, r5, r6, r7, r8, r9, r10, r11, apsr} 135; CHECK-V81-BE-NEXT: blxns r12 136; CHECK-V81-BE-NEXT: vldr fpcxts, [sp], #8 137; CHECK-V81-BE-NEXT: vpop {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31} 138; CHECK-V81-BE-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11} 139; CHECK-V81-BE-NEXT: pop {r7, pc} 140entry: 141 call void %fu(float %a, i32 %b, double %c, i32 %d, float %e, i32 %f, float %g, i32 %h, double %i, double %j, double %k, double %l, float %m, float %n) #1 142 ret void 143} 144 145