xref: /llvm-project/llvm/test/CodeGen/ARM/cmp-peephole.ll (revision 945a1468c922573a07b334a130d05f0ecca40926) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=armv7a < %s | FileCheck %s --check-prefix=ARM
3; RUN: llc -mtriple=armv6m < %s | FileCheck %s --check-prefix=THUMB
4; RUN: llc -mtriple=armv7m < %s | FileCheck %s --check-prefix=THUMB2
5
6define i1 @cmp_ne_zero_and_rr(i32 %a, i32 %b) {
7; ARM-LABEL: cmp_ne_zero_and_rr:
8; ARM:       @ %bb.0:
9; ARM-NEXT:    ands r0, r0, r1
10; ARM-NEXT:    movwne r0, #1
11; ARM-NEXT:    bx lr
12;
13; THUMB-LABEL: cmp_ne_zero_and_rr:
14; THUMB:       @ %bb.0:
15; THUMB-NEXT:    ands r0, r1
16; THUMB-NEXT:    subs r1, r0, #1
17; THUMB-NEXT:    sbcs r0, r1
18; THUMB-NEXT:    bx lr
19;
20; THUMB2-LABEL: cmp_ne_zero_and_rr:
21; THUMB2:       @ %bb.0:
22; THUMB2-NEXT:    ands r0, r1
23; THUMB2-NEXT:    it ne
24; THUMB2-NEXT:    movne r0, #1
25; THUMB2-NEXT:    bx lr
26  %and = and i32 %a, %b
27  %res = icmp ne i32 %and, 0
28  ret i1 %res
29}
30
31define i1 @cmp_ne_zero_and_ri(i32 %a) {
32; ARM-LABEL: cmp_ne_zero_and_ri:
33; ARM:       @ %bb.0:
34; ARM-NEXT:    ands r0, r0, #42
35; ARM-NEXT:    movwne r0, #1
36; ARM-NEXT:    bx lr
37;
38; THUMB-LABEL: cmp_ne_zero_and_ri:
39; THUMB:       @ %bb.0:
40; THUMB-NEXT:    movs r1, #42
41; THUMB-NEXT:    ands r0, r1
42; THUMB-NEXT:    subs r1, r0, #1
43; THUMB-NEXT:    sbcs r0, r1
44; THUMB-NEXT:    bx lr
45;
46; THUMB2-LABEL: cmp_ne_zero_and_ri:
47; THUMB2:       @ %bb.0:
48; THUMB2-NEXT:    ands r0, r0, #42
49; THUMB2-NEXT:    it ne
50; THUMB2-NEXT:    movne r0, #1
51; THUMB2-NEXT:    bx lr
52  %and = and i32 %a, 42
53  %res = icmp ne i32 %and, 0
54  ret i1 %res
55}
56
57define i1 @cmp_ne_zero_and_rsr(i32 %a, i32 %b, i32 %c) {
58; ARM-LABEL: cmp_ne_zero_and_rsr:
59; ARM:       @ %bb.0:
60; ARM-NEXT:    ands r0, r0, r1, lsl r2
61; ARM-NEXT:    movwne r0, #1
62; ARM-NEXT:    bx lr
63;
64; THUMB-LABEL: cmp_ne_zero_and_rsr:
65; THUMB:       @ %bb.0:
66; THUMB-NEXT:    lsls r1, r2
67; THUMB-NEXT:    ands r0, r1
68; THUMB-NEXT:    subs r1, r0, #1
69; THUMB-NEXT:    sbcs r0, r1
70; THUMB-NEXT:    bx lr
71;
72; THUMB2-LABEL: cmp_ne_zero_and_rsr:
73; THUMB2:       @ %bb.0:
74; THUMB2-NEXT:    lsls r1, r2
75; THUMB2-NEXT:    ands r0, r1
76; THUMB2-NEXT:    it ne
77; THUMB2-NEXT:    movne r0, #1
78; THUMB2-NEXT:    bx lr
79  %sh = shl i32 %b, %c
80  %and = and i32 %sh, %a
81  %res = icmp ne i32 %and, 0
82  ret i1 %res
83}
84
85define i1 @cmp_ne_zero_and_rsi(i32 %a, i32 %b) {
86; ARM-LABEL: cmp_ne_zero_and_rsi:
87; ARM:       @ %bb.0:
88; ARM-NEXT:    ands r0, r0, r1, lsr #17
89; ARM-NEXT:    movwne r0, #1
90; ARM-NEXT:    bx lr
91;
92; THUMB-LABEL: cmp_ne_zero_and_rsi:
93; THUMB:       @ %bb.0:
94; THUMB-NEXT:    lsrs r1, r1, #17
95; THUMB-NEXT:    ands r0, r1
96; THUMB-NEXT:    subs r1, r0, #1
97; THUMB-NEXT:    sbcs r0, r1
98; THUMB-NEXT:    bx lr
99;
100; THUMB2-LABEL: cmp_ne_zero_and_rsi:
101; THUMB2:       @ %bb.0:
102; THUMB2-NEXT:    ands.w r0, r0, r1, lsr #17
103; THUMB2-NEXT:    it ne
104; THUMB2-NEXT:    movne r0, #1
105; THUMB2-NEXT:    bx lr
106  %sh = lshr i32 %b, 17
107  %and = and i32 %sh, %a
108  %res = icmp ne i32 %and, 0
109  ret i1 %res
110}
111
112define i1 @cmp_ne_zero_or_rr(i32 %a, i32 %b) {
113; ARM-LABEL: cmp_ne_zero_or_rr:
114; ARM:       @ %bb.0:
115; ARM-NEXT:    orrs r0, r0, r1
116; ARM-NEXT:    movwne r0, #1
117; ARM-NEXT:    bx lr
118;
119; THUMB-LABEL: cmp_ne_zero_or_rr:
120; THUMB:       @ %bb.0:
121; THUMB-NEXT:    orrs r0, r1
122; THUMB-NEXT:    subs r1, r0, #1
123; THUMB-NEXT:    sbcs r0, r1
124; THUMB-NEXT:    bx lr
125;
126; THUMB2-LABEL: cmp_ne_zero_or_rr:
127; THUMB2:       @ %bb.0:
128; THUMB2-NEXT:    orrs r0, r1
129; THUMB2-NEXT:    it ne
130; THUMB2-NEXT:    movne r0, #1
131; THUMB2-NEXT:    bx lr
132  %or = or i32 %a, %b
133  %res = icmp ne i32 %or, 0
134  ret i1 %res
135}
136
137define i1 @cmp_ne_zero_or_ri(i32 %a) {
138; ARM-LABEL: cmp_ne_zero_or_ri:
139; ARM:       @ %bb.0:
140; ARM-NEXT:    orrs r0, r0, #42
141; ARM-NEXT:    movwne r0, #1
142; ARM-NEXT:    bx lr
143;
144; THUMB-LABEL: cmp_ne_zero_or_ri:
145; THUMB:       @ %bb.0:
146; THUMB-NEXT:    movs r1, #42
147; THUMB-NEXT:    orrs r0, r1
148; THUMB-NEXT:    subs r1, r0, #1
149; THUMB-NEXT:    sbcs r0, r1
150; THUMB-NEXT:    bx lr
151;
152; THUMB2-LABEL: cmp_ne_zero_or_ri:
153; THUMB2:       @ %bb.0:
154; THUMB2-NEXT:    orrs r0, r0, #42
155; THUMB2-NEXT:    it ne
156; THUMB2-NEXT:    movne r0, #1
157; THUMB2-NEXT:    bx lr
158  %or = or i32 %a, 42
159  %res = icmp ne i32 %or, 0
160  ret i1 %res
161}
162
163define i1 @cmp_ne_zero_or_rsr(i32 %a, i32 %b, i32 %c) {
164; ARM-LABEL: cmp_ne_zero_or_rsr:
165; ARM:       @ %bb.0:
166; ARM-NEXT:    orrs r0, r0, r1, lsl r2
167; ARM-NEXT:    movwne r0, #1
168; ARM-NEXT:    bx lr
169;
170; THUMB-LABEL: cmp_ne_zero_or_rsr:
171; THUMB:       @ %bb.0:
172; THUMB-NEXT:    lsls r1, r2
173; THUMB-NEXT:    orrs r0, r1
174; THUMB-NEXT:    subs r1, r0, #1
175; THUMB-NEXT:    sbcs r0, r1
176; THUMB-NEXT:    bx lr
177;
178; THUMB2-LABEL: cmp_ne_zero_or_rsr:
179; THUMB2:       @ %bb.0:
180; THUMB2-NEXT:    lsls r1, r2
181; THUMB2-NEXT:    orrs r0, r1
182; THUMB2-NEXT:    it ne
183; THUMB2-NEXT:    movne r0, #1
184; THUMB2-NEXT:    bx lr
185  %sh = shl i32 %b, %c
186  %or = or i32 %sh, %a
187  %res = icmp ne i32 %or, 0
188  ret i1 %res
189}
190
191define i1 @cmp_ne_zero_or_rsi(i32 %a, i32 %b) {
192; ARM-LABEL: cmp_ne_zero_or_rsi:
193; ARM:       @ %bb.0:
194; ARM-NEXT:    orrs r0, r0, r1, lsr #17
195; ARM-NEXT:    movwne r0, #1
196; ARM-NEXT:    bx lr
197;
198; THUMB-LABEL: cmp_ne_zero_or_rsi:
199; THUMB:       @ %bb.0:
200; THUMB-NEXT:    lsrs r1, r1, #17
201; THUMB-NEXT:    orrs r0, r1
202; THUMB-NEXT:    subs r1, r0, #1
203; THUMB-NEXT:    sbcs r0, r1
204; THUMB-NEXT:    bx lr
205;
206; THUMB2-LABEL: cmp_ne_zero_or_rsi:
207; THUMB2:       @ %bb.0:
208; THUMB2-NEXT:    orrs.w r0, r0, r1, lsr #17
209; THUMB2-NEXT:    it ne
210; THUMB2-NEXT:    movne r0, #1
211; THUMB2-NEXT:    bx lr
212  %sh = lshr i32 %b, 17
213  %or = or i32 %sh, %a
214  %res = icmp ne i32 %or, 0
215  ret i1 %res
216}
217
218define i1 @cmp_ne_zero_xor_rr(i32 %a, i32 %b) {
219; ARM-LABEL: cmp_ne_zero_xor_rr:
220; ARM:       @ %bb.0:
221; ARM-NEXT:    eors r0, r0, r1
222; ARM-NEXT:    movwne r0, #1
223; ARM-NEXT:    bx lr
224;
225; THUMB-LABEL: cmp_ne_zero_xor_rr:
226; THUMB:       @ %bb.0:
227; THUMB-NEXT:    eors r0, r1
228; THUMB-NEXT:    subs r1, r0, #1
229; THUMB-NEXT:    sbcs r0, r1
230; THUMB-NEXT:    bx lr
231;
232; THUMB2-LABEL: cmp_ne_zero_xor_rr:
233; THUMB2:       @ %bb.0:
234; THUMB2-NEXT:    eors r0, r1
235; THUMB2-NEXT:    it ne
236; THUMB2-NEXT:    movne r0, #1
237; THUMB2-NEXT:    bx lr
238  %xor = xor i32 %a, %b
239  %res = icmp ne i32 %xor, 0
240  ret i1 %res
241}
242
243define i1 @cmp_ne_zero_xor_ri(i32 %a) {
244; ARM-LABEL: cmp_ne_zero_xor_ri:
245; ARM:       @ %bb.0:
246; ARM-NEXT:    subs r0, r0, #42
247; ARM-NEXT:    movwne r0, #1
248; ARM-NEXT:    bx lr
249;
250; THUMB-LABEL: cmp_ne_zero_xor_ri:
251; THUMB:       @ %bb.0:
252; THUMB-NEXT:    subs r0, #42
253; THUMB-NEXT:    subs r1, r0, #1
254; THUMB-NEXT:    sbcs r0, r1
255; THUMB-NEXT:    bx lr
256;
257; THUMB2-LABEL: cmp_ne_zero_xor_ri:
258; THUMB2:       @ %bb.0:
259; THUMB2-NEXT:    subs r0, #42
260; THUMB2-NEXT:    it ne
261; THUMB2-NEXT:    movne r0, #1
262; THUMB2-NEXT:    bx lr
263  %xor = xor i32 %a, 42
264  %res = icmp ne i32 %xor, 0
265  ret i1 %res
266}
267
268define i1 @cmp_ne_zero_xor_rsr(i32 %a, i32 %b, i32 %c) {
269; ARM-LABEL: cmp_ne_zero_xor_rsr:
270; ARM:       @ %bb.0:
271; ARM-NEXT:    eors r0, r0, r1, lsl r2
272; ARM-NEXT:    movwne r0, #1
273; ARM-NEXT:    bx lr
274;
275; THUMB-LABEL: cmp_ne_zero_xor_rsr:
276; THUMB:       @ %bb.0:
277; THUMB-NEXT:    lsls r1, r2
278; THUMB-NEXT:    eors r0, r1
279; THUMB-NEXT:    subs r1, r0, #1
280; THUMB-NEXT:    sbcs r0, r1
281; THUMB-NEXT:    bx lr
282;
283; THUMB2-LABEL: cmp_ne_zero_xor_rsr:
284; THUMB2:       @ %bb.0:
285; THUMB2-NEXT:    lsls r1, r2
286; THUMB2-NEXT:    eors r0, r1
287; THUMB2-NEXT:    it ne
288; THUMB2-NEXT:    movne r0, #1
289; THUMB2-NEXT:    bx lr
290  %sh = shl i32 %b, %c
291  %xor = xor i32 %sh, %a
292  %res = icmp ne i32 %xor, 0
293  ret i1 %res
294}
295
296define i1 @cmp_ne_zero_xor_rsi(i32 %a, i32 %b) {
297; ARM-LABEL: cmp_ne_zero_xor_rsi:
298; ARM:       @ %bb.0:
299; ARM-NEXT:    eors r0, r0, r1, lsr #17
300; ARM-NEXT:    movwne r0, #1
301; ARM-NEXT:    bx lr
302;
303; THUMB-LABEL: cmp_ne_zero_xor_rsi:
304; THUMB:       @ %bb.0:
305; THUMB-NEXT:    lsrs r1, r1, #17
306; THUMB-NEXT:    eors r0, r1
307; THUMB-NEXT:    subs r1, r0, #1
308; THUMB-NEXT:    sbcs r0, r1
309; THUMB-NEXT:    bx lr
310;
311; THUMB2-LABEL: cmp_ne_zero_xor_rsi:
312; THUMB2:       @ %bb.0:
313; THUMB2-NEXT:    eors.w r0, r0, r1, lsr #17
314; THUMB2-NEXT:    it ne
315; THUMB2-NEXT:    movne r0, #1
316; THUMB2-NEXT:    bx lr
317  %sh = lshr i32 %b, 17
318  %xor = xor i32 %sh, %a
319  %res = icmp ne i32 %xor, 0
320  ret i1 %res
321}
322
323define i1 @cmp_ne_zero_and_not_rr(i32 %a, i32 %b) {
324; ARM-LABEL: cmp_ne_zero_and_not_rr:
325; ARM:       @ %bb.0:
326; ARM-NEXT:    bics r0, r0, r1
327; ARM-NEXT:    movwne r0, #1
328; ARM-NEXT:    bx lr
329;
330; THUMB-LABEL: cmp_ne_zero_and_not_rr:
331; THUMB:       @ %bb.0:
332; THUMB-NEXT:    bics r0, r1
333; THUMB-NEXT:    subs r1, r0, #1
334; THUMB-NEXT:    sbcs r0, r1
335; THUMB-NEXT:    bx lr
336;
337; THUMB2-LABEL: cmp_ne_zero_and_not_rr:
338; THUMB2:       @ %bb.0:
339; THUMB2-NEXT:    bics r0, r1
340; THUMB2-NEXT:    it ne
341; THUMB2-NEXT:    movne r0, #1
342; THUMB2-NEXT:    bx lr
343  %not = xor i32 %b, -1
344  %and = and i32 %a, %not
345  %res = icmp ne i32 %and, 0
346  ret i1 %res
347}
348
349define i1 @cmp_ne_zero_and_not_ri(i32 %a) {
350; ARM-LABEL: cmp_ne_zero_and_not_ri:
351; ARM:       @ %bb.0:
352; ARM-NEXT:    bics r0, r0, #42
353; ARM-NEXT:    movwne r0, #1
354; ARM-NEXT:    bx lr
355;
356; THUMB-LABEL: cmp_ne_zero_and_not_ri:
357; THUMB:       @ %bb.0:
358; THUMB-NEXT:    movs r1, #42
359; THUMB-NEXT:    bics r0, r1
360; THUMB-NEXT:    subs r1, r0, #1
361; THUMB-NEXT:    sbcs r0, r1
362; THUMB-NEXT:    bx lr
363;
364; THUMB2-LABEL: cmp_ne_zero_and_not_ri:
365; THUMB2:       @ %bb.0:
366; THUMB2-NEXT:    bics r0, r0, #42
367; THUMB2-NEXT:    it ne
368; THUMB2-NEXT:    movne r0, #1
369; THUMB2-NEXT:    bx lr
370  %not = xor i32 42, -1
371  %and = and i32 %a, %not
372  %res = icmp ne i32 %and, 0
373  ret i1 %res
374}
375
376define i1 @cmp_ne_zero_and_not_rsr(i32 %a, i32 %b, i32 %c) {
377; ARM-LABEL: cmp_ne_zero_and_not_rsr:
378; ARM:       @ %bb.0:
379; ARM-NEXT:    bics r0, r0, r1, lsl r2
380; ARM-NEXT:    movwne r0, #1
381; ARM-NEXT:    bx lr
382;
383; THUMB-LABEL: cmp_ne_zero_and_not_rsr:
384; THUMB:       @ %bb.0:
385; THUMB-NEXT:    lsls r1, r2
386; THUMB-NEXT:    bics r0, r1
387; THUMB-NEXT:    subs r1, r0, #1
388; THUMB-NEXT:    sbcs r0, r1
389; THUMB-NEXT:    bx lr
390;
391; THUMB2-LABEL: cmp_ne_zero_and_not_rsr:
392; THUMB2:       @ %bb.0:
393; THUMB2-NEXT:    lsls r1, r2
394; THUMB2-NEXT:    bics r0, r1
395; THUMB2-NEXT:    it ne
396; THUMB2-NEXT:    movne r0, #1
397; THUMB2-NEXT:    bx lr
398  %sh = shl i32 %b, %c
399  %not = xor i32 %sh, -1
400  %and = and i32 %not, %a
401  %res = icmp ne i32 %and, 0
402  ret i1 %res
403}
404
405define i1 @cmp_ne_zero_and_not_rsi(i32 %a, i32 %b) {
406; ARM-LABEL: cmp_ne_zero_and_not_rsi:
407; ARM:       @ %bb.0:
408; ARM-NEXT:    bics r0, r0, r1, lsr #17
409; ARM-NEXT:    movwne r0, #1
410; ARM-NEXT:    bx lr
411;
412; THUMB-LABEL: cmp_ne_zero_and_not_rsi:
413; THUMB:       @ %bb.0:
414; THUMB-NEXT:    lsrs r1, r1, #17
415; THUMB-NEXT:    bics r0, r1
416; THUMB-NEXT:    subs r1, r0, #1
417; THUMB-NEXT:    sbcs r0, r1
418; THUMB-NEXT:    bx lr
419;
420; THUMB2-LABEL: cmp_ne_zero_and_not_rsi:
421; THUMB2:       @ %bb.0:
422; THUMB2-NEXT:    bics.w r0, r0, r1, lsr #17
423; THUMB2-NEXT:    it ne
424; THUMB2-NEXT:    movne r0, #1
425; THUMB2-NEXT:    bx lr
426  %sh = lshr i32 %b, 17
427  %not = xor i32 %sh, -1
428  %and = and i32 %not, %a
429  %res = icmp ne i32 %and, 0
430  ret i1 %res
431}
432
433define i1 @cmp_ne_zero_shl_rr(i32 %a, i32 %b) {
434; ARM-LABEL: cmp_ne_zero_shl_rr:
435; ARM:       @ %bb.0:
436; ARM-NEXT:    lsls r0, r0, r1
437; ARM-NEXT:    movwne r0, #1
438; ARM-NEXT:    bx lr
439;
440; THUMB-LABEL: cmp_ne_zero_shl_rr:
441; THUMB:       @ %bb.0:
442; THUMB-NEXT:    lsls r0, r1
443; THUMB-NEXT:    subs r1, r0, #1
444; THUMB-NEXT:    sbcs r0, r1
445; THUMB-NEXT:    bx lr
446;
447; THUMB2-LABEL: cmp_ne_zero_shl_rr:
448; THUMB2:       @ %bb.0:
449; THUMB2-NEXT:    lsls r0, r1
450; THUMB2-NEXT:    it ne
451; THUMB2-NEXT:    movne r0, #1
452; THUMB2-NEXT:    bx lr
453    %sh = shl i32 %a, %b
454    %cmp = icmp ne i32 %sh, 0
455    ret i1 %cmp
456}
457
458define i1 @cmp_ne_zero_shl_ri(i32 %a) {
459; ARM-LABEL: cmp_ne_zero_shl_ri:
460; ARM:       @ %bb.0:
461; ARM-NEXT:    lsls r0, r0, #7
462; ARM-NEXT:    movwne r0, #1
463; ARM-NEXT:    bx lr
464;
465; THUMB-LABEL: cmp_ne_zero_shl_ri:
466; THUMB:       @ %bb.0:
467; THUMB-NEXT:    lsls r0, r0, #7
468; THUMB-NEXT:    subs r1, r0, #1
469; THUMB-NEXT:    sbcs r0, r1
470; THUMB-NEXT:    bx lr
471;
472; THUMB2-LABEL: cmp_ne_zero_shl_ri:
473; THUMB2:       @ %bb.0:
474; THUMB2-NEXT:    lsls r0, r0, #7
475; THUMB2-NEXT:    it ne
476; THUMB2-NEXT:    movne r0, #1
477; THUMB2-NEXT:    bx lr
478    %sh = shl i32 %a, 7
479    %cmp = icmp ne i32 %sh, 0
480    ret i1 %cmp
481}
482
483define i1 @cmp_ne_zero_lshr_rr(i32 %a, i32 %b) {
484; ARM-LABEL: cmp_ne_zero_lshr_rr:
485; ARM:       @ %bb.0:
486; ARM-NEXT:    lsrs r0, r0, r1
487; ARM-NEXT:    movwne r0, #1
488; ARM-NEXT:    bx lr
489;
490; THUMB-LABEL: cmp_ne_zero_lshr_rr:
491; THUMB:       @ %bb.0:
492; THUMB-NEXT:    lsrs r0, r1
493; THUMB-NEXT:    subs r1, r0, #1
494; THUMB-NEXT:    sbcs r0, r1
495; THUMB-NEXT:    bx lr
496;
497; THUMB2-LABEL: cmp_ne_zero_lshr_rr:
498; THUMB2:       @ %bb.0:
499; THUMB2-NEXT:    lsrs r0, r1
500; THUMB2-NEXT:    it ne
501; THUMB2-NEXT:    movne r0, #1
502; THUMB2-NEXT:    bx lr
503    %sh = lshr i32 %a, %b
504    %cmp = icmp ne i32 %sh, 0
505    ret i1 %cmp
506}
507
508define i1 @cmp_ne_zero_lshr_ri(i32 %a) {
509; ARM-LABEL: cmp_ne_zero_lshr_ri:
510; ARM:       @ %bb.0:
511; ARM-NEXT:    lsrs r0, r0, #7
512; ARM-NEXT:    movwne r0, #1
513; ARM-NEXT:    bx lr
514;
515; THUMB-LABEL: cmp_ne_zero_lshr_ri:
516; THUMB:       @ %bb.0:
517; THUMB-NEXT:    lsrs r0, r0, #7
518; THUMB-NEXT:    subs r1, r0, #1
519; THUMB-NEXT:    sbcs r0, r1
520; THUMB-NEXT:    bx lr
521;
522; THUMB2-LABEL: cmp_ne_zero_lshr_ri:
523; THUMB2:       @ %bb.0:
524; THUMB2-NEXT:    lsrs r0, r0, #7
525; THUMB2-NEXT:    it ne
526; THUMB2-NEXT:    movne r0, #1
527; THUMB2-NEXT:    bx lr
528    %sh = lshr i32 %a, 7
529    %cmp = icmp ne i32 %sh, 0
530    ret i1 %cmp
531}
532
533define i1 @cmp_ne_zero_ashr_rr(i32 %a, i32 %b) {
534; ARM-LABEL: cmp_ne_zero_ashr_rr:
535; ARM:       @ %bb.0:
536; ARM-NEXT:    asrs r0, r0, r1
537; ARM-NEXT:    movwne r0, #1
538; ARM-NEXT:    bx lr
539;
540; THUMB-LABEL: cmp_ne_zero_ashr_rr:
541; THUMB:       @ %bb.0:
542; THUMB-NEXT:    asrs r0, r1
543; THUMB-NEXT:    subs r1, r0, #1
544; THUMB-NEXT:    sbcs r0, r1
545; THUMB-NEXT:    bx lr
546;
547; THUMB2-LABEL: cmp_ne_zero_ashr_rr:
548; THUMB2:       @ %bb.0:
549; THUMB2-NEXT:    asrs r0, r1
550; THUMB2-NEXT:    cmp r0, #0
551; THUMB2-NEXT:    it ne
552; THUMB2-NEXT:    movne r0, #1
553; THUMB2-NEXT:    bx lr
554    %sh = ashr i32 %a, %b
555    %cmp = icmp ne i32 %sh, 0
556    ret i1 %cmp
557}
558
559define i1 @cmp_ne_zero_ashr_ri(i32 %a) {
560; ARM-LABEL: cmp_ne_zero_ashr_ri:
561; ARM:       @ %bb.0:
562; ARM-NEXT:    asrs r0, r0, #7
563; ARM-NEXT:    movwne r0, #1
564; ARM-NEXT:    bx lr
565;
566; THUMB-LABEL: cmp_ne_zero_ashr_ri:
567; THUMB:       @ %bb.0:
568; THUMB-NEXT:    asrs r0, r0, #7
569; THUMB-NEXT:    subs r1, r0, #1
570; THUMB-NEXT:    sbcs r0, r1
571; THUMB-NEXT:    bx lr
572;
573; THUMB2-LABEL: cmp_ne_zero_ashr_ri:
574; THUMB2:       @ %bb.0:
575; THUMB2-NEXT:    asrs r0, r0, #7
576; THUMB2-NEXT:    cmp r0, #0
577; THUMB2-NEXT:    it ne
578; THUMB2-NEXT:    movne r0, #1
579; THUMB2-NEXT:    bx lr
580    %sh = ashr i32 %a, 7
581    %cmp = icmp ne i32 %sh, 0
582    ret i1 %cmp
583}
584
585define i1 @cmp_eq_zero_and_rr(i32 %a, i32 %b) {
586; ARM-LABEL: cmp_eq_zero_and_rr:
587; ARM:       @ %bb.0:
588; ARM-NEXT:    and r0, r0, r1
589; ARM-NEXT:    clz r0, r0
590; ARM-NEXT:    lsr r0, r0, #5
591; ARM-NEXT:    bx lr
592;
593; THUMB-LABEL: cmp_eq_zero_and_rr:
594; THUMB:       @ %bb.0:
595; THUMB-NEXT:    ands r0, r1
596; THUMB-NEXT:    rsbs r1, r0, #0
597; THUMB-NEXT:    adcs r0, r1
598; THUMB-NEXT:    bx lr
599;
600; THUMB2-LABEL: cmp_eq_zero_and_rr:
601; THUMB2:       @ %bb.0:
602; THUMB2-NEXT:    ands r0, r1
603; THUMB2-NEXT:    clz r0, r0
604; THUMB2-NEXT:    lsrs r0, r0, #5
605; THUMB2-NEXT:    bx lr
606  %and = and i32 %a, %b
607  %res = icmp eq i32 %and, 0
608  ret i1 %res
609}
610
611define i1 @cmp_eq_zero_and_ri(i32 %a) {
612; ARM-LABEL: cmp_eq_zero_and_ri:
613; ARM:       @ %bb.0:
614; ARM-NEXT:    and r0, r0, #42
615; ARM-NEXT:    clz r0, r0
616; ARM-NEXT:    lsr r0, r0, #5
617; ARM-NEXT:    bx lr
618;
619; THUMB-LABEL: cmp_eq_zero_and_ri:
620; THUMB:       @ %bb.0:
621; THUMB-NEXT:    movs r1, #42
622; THUMB-NEXT:    ands r0, r1
623; THUMB-NEXT:    rsbs r1, r0, #0
624; THUMB-NEXT:    adcs r0, r1
625; THUMB-NEXT:    bx lr
626;
627; THUMB2-LABEL: cmp_eq_zero_and_ri:
628; THUMB2:       @ %bb.0:
629; THUMB2-NEXT:    and r0, r0, #42
630; THUMB2-NEXT:    clz r0, r0
631; THUMB2-NEXT:    lsrs r0, r0, #5
632; THUMB2-NEXT:    bx lr
633  %and = and i32 %a, 42
634  %res = icmp eq i32 %and, 0
635  ret i1 %res
636}
637
638define i1 @cmp_eq_zero_and_rsr(i32 %a, i32 %b, i32 %c) {
639; ARM-LABEL: cmp_eq_zero_and_rsr:
640; ARM:       @ %bb.0:
641; ARM-NEXT:    and r0, r0, r1, lsl r2
642; ARM-NEXT:    clz r0, r0
643; ARM-NEXT:    lsr r0, r0, #5
644; ARM-NEXT:    bx lr
645;
646; THUMB-LABEL: cmp_eq_zero_and_rsr:
647; THUMB:       @ %bb.0:
648; THUMB-NEXT:    lsls r1, r2
649; THUMB-NEXT:    ands r0, r1
650; THUMB-NEXT:    rsbs r1, r0, #0
651; THUMB-NEXT:    adcs r0, r1
652; THUMB-NEXT:    bx lr
653;
654; THUMB2-LABEL: cmp_eq_zero_and_rsr:
655; THUMB2:       @ %bb.0:
656; THUMB2-NEXT:    lsls r1, r2
657; THUMB2-NEXT:    ands r0, r1
658; THUMB2-NEXT:    clz r0, r0
659; THUMB2-NEXT:    lsrs r0, r0, #5
660; THUMB2-NEXT:    bx lr
661  %sh = shl i32 %b, %c
662  %and = and i32 %sh, %a
663  %res = icmp eq i32 %and, 0
664  ret i1 %res
665}
666
667define i1 @cmp_eq_zero_and_rsi(i32 %a, i32 %b) {
668; ARM-LABEL: cmp_eq_zero_and_rsi:
669; ARM:       @ %bb.0:
670; ARM-NEXT:    and r0, r0, r1, lsr #17
671; ARM-NEXT:    clz r0, r0
672; ARM-NEXT:    lsr r0, r0, #5
673; ARM-NEXT:    bx lr
674;
675; THUMB-LABEL: cmp_eq_zero_and_rsi:
676; THUMB:       @ %bb.0:
677; THUMB-NEXT:    lsrs r1, r1, #17
678; THUMB-NEXT:    ands r0, r1
679; THUMB-NEXT:    rsbs r1, r0, #0
680; THUMB-NEXT:    adcs r0, r1
681; THUMB-NEXT:    bx lr
682;
683; THUMB2-LABEL: cmp_eq_zero_and_rsi:
684; THUMB2:       @ %bb.0:
685; THUMB2-NEXT:    and.w r0, r0, r1, lsr #17
686; THUMB2-NEXT:    clz r0, r0
687; THUMB2-NEXT:    lsrs r0, r0, #5
688; THUMB2-NEXT:    bx lr
689  %sh = lshr i32 %b, 17
690  %and = and i32 %sh, %a
691  %res = icmp eq i32 %and, 0
692  ret i1 %res
693}
694
695define i1 @cmp_eq_zero_or_rr(i32 %a, i32 %b) {
696; ARM-LABEL: cmp_eq_zero_or_rr:
697; ARM:       @ %bb.0:
698; ARM-NEXT:    orr r0, r0, r1
699; ARM-NEXT:    clz r0, r0
700; ARM-NEXT:    lsr r0, r0, #5
701; ARM-NEXT:    bx lr
702;
703; THUMB-LABEL: cmp_eq_zero_or_rr:
704; THUMB:       @ %bb.0:
705; THUMB-NEXT:    orrs r0, r1
706; THUMB-NEXT:    rsbs r1, r0, #0
707; THUMB-NEXT:    adcs r0, r1
708; THUMB-NEXT:    bx lr
709;
710; THUMB2-LABEL: cmp_eq_zero_or_rr:
711; THUMB2:       @ %bb.0:
712; THUMB2-NEXT:    orrs r0, r1
713; THUMB2-NEXT:    clz r0, r0
714; THUMB2-NEXT:    lsrs r0, r0, #5
715; THUMB2-NEXT:    bx lr
716  %or = or i32 %a, %b
717  %res = icmp eq i32 %or, 0
718  ret i1 %res
719}
720
721define i1 @cmp_eq_zero_or_ri(i32 %a) {
722; ARM-LABEL: cmp_eq_zero_or_ri:
723; ARM:       @ %bb.0:
724; ARM-NEXT:    mov r0, #0
725; ARM-NEXT:    bx lr
726;
727; THUMB-LABEL: cmp_eq_zero_or_ri:
728; THUMB:       @ %bb.0:
729; THUMB-NEXT:    movs r1, #42
730; THUMB-NEXT:    orrs r0, r1
731; THUMB-NEXT:    rsbs r1, r0, #0
732; THUMB-NEXT:    adcs r0, r1
733; THUMB-NEXT:    bx lr
734;
735; THUMB2-LABEL: cmp_eq_zero_or_ri:
736; THUMB2:       @ %bb.0:
737; THUMB2-NEXT:    movs r0, #0
738; THUMB2-NEXT:    bx lr
739  %or = or i32 %a, 42
740  %res = icmp eq i32 %or, 0
741  ret i1 %res
742}
743
744define i1 @cmp_eq_zero_or_rsr(i32 %a, i32 %b, i32 %c) {
745; ARM-LABEL: cmp_eq_zero_or_rsr:
746; ARM:       @ %bb.0:
747; ARM-NEXT:    orr r0, r0, r1, lsl r2
748; ARM-NEXT:    clz r0, r0
749; ARM-NEXT:    lsr r0, r0, #5
750; ARM-NEXT:    bx lr
751;
752; THUMB-LABEL: cmp_eq_zero_or_rsr:
753; THUMB:       @ %bb.0:
754; THUMB-NEXT:    lsls r1, r2
755; THUMB-NEXT:    orrs r0, r1
756; THUMB-NEXT:    rsbs r1, r0, #0
757; THUMB-NEXT:    adcs r0, r1
758; THUMB-NEXT:    bx lr
759;
760; THUMB2-LABEL: cmp_eq_zero_or_rsr:
761; THUMB2:       @ %bb.0:
762; THUMB2-NEXT:    lsls r1, r2
763; THUMB2-NEXT:    orrs r0, r1
764; THUMB2-NEXT:    clz r0, r0
765; THUMB2-NEXT:    lsrs r0, r0, #5
766; THUMB2-NEXT:    bx lr
767  %sh = shl i32 %b, %c
768  %or = or i32 %sh, %a
769  %res = icmp eq i32 %or, 0
770  ret i1 %res
771}
772
773define i1 @cmp_eq_zero_or_rsi(i32 %a, i32 %b) {
774; ARM-LABEL: cmp_eq_zero_or_rsi:
775; ARM:       @ %bb.0:
776; ARM-NEXT:    orr r0, r0, r1, lsr #17
777; ARM-NEXT:    clz r0, r0
778; ARM-NEXT:    lsr r0, r0, #5
779; ARM-NEXT:    bx lr
780;
781; THUMB-LABEL: cmp_eq_zero_or_rsi:
782; THUMB:       @ %bb.0:
783; THUMB-NEXT:    lsrs r1, r1, #17
784; THUMB-NEXT:    orrs r0, r1
785; THUMB-NEXT:    rsbs r1, r0, #0
786; THUMB-NEXT:    adcs r0, r1
787; THUMB-NEXT:    bx lr
788;
789; THUMB2-LABEL: cmp_eq_zero_or_rsi:
790; THUMB2:       @ %bb.0:
791; THUMB2-NEXT:    orr.w r0, r0, r1, lsr #17
792; THUMB2-NEXT:    clz r0, r0
793; THUMB2-NEXT:    lsrs r0, r0, #5
794; THUMB2-NEXT:    bx lr
795  %sh = lshr i32 %b, 17
796  %or = or i32 %sh, %a
797  %res = icmp eq i32 %or, 0
798  ret i1 %res
799}
800
801define i1 @cmp_eq_zero_xor_rr(i32 %a, i32 %b) {
802; ARM-LABEL: cmp_eq_zero_xor_rr:
803; ARM:       @ %bb.0:
804; ARM-NEXT:    eor r0, r0, r1
805; ARM-NEXT:    clz r0, r0
806; ARM-NEXT:    lsr r0, r0, #5
807; ARM-NEXT:    bx lr
808;
809; THUMB-LABEL: cmp_eq_zero_xor_rr:
810; THUMB:       @ %bb.0:
811; THUMB-NEXT:    eors r0, r1
812; THUMB-NEXT:    rsbs r1, r0, #0
813; THUMB-NEXT:    adcs r0, r1
814; THUMB-NEXT:    bx lr
815;
816; THUMB2-LABEL: cmp_eq_zero_xor_rr:
817; THUMB2:       @ %bb.0:
818; THUMB2-NEXT:    eors r0, r1
819; THUMB2-NEXT:    clz r0, r0
820; THUMB2-NEXT:    lsrs r0, r0, #5
821; THUMB2-NEXT:    bx lr
822  %xor = xor i32 %a, %b
823  %res = icmp eq i32 %xor, 0
824  ret i1 %res
825}
826
827define i1 @cmp_eq_zero_xor_ri(i32 %a) {
828; ARM-LABEL: cmp_eq_zero_xor_ri:
829; ARM:       @ %bb.0:
830; ARM-NEXT:    sub r0, r0, #42
831; ARM-NEXT:    clz r0, r0
832; ARM-NEXT:    lsr r0, r0, #5
833; ARM-NEXT:    bx lr
834;
835; THUMB-LABEL: cmp_eq_zero_xor_ri:
836; THUMB:       @ %bb.0:
837; THUMB-NEXT:    subs r0, #42
838; THUMB-NEXT:    rsbs r1, r0, #0
839; THUMB-NEXT:    adcs r0, r1
840; THUMB-NEXT:    bx lr
841;
842; THUMB2-LABEL: cmp_eq_zero_xor_ri:
843; THUMB2:       @ %bb.0:
844; THUMB2-NEXT:    subs r0, #42
845; THUMB2-NEXT:    clz r0, r0
846; THUMB2-NEXT:    lsrs r0, r0, #5
847; THUMB2-NEXT:    bx lr
848  %xor = xor i32 %a, 42
849  %res = icmp eq i32 %xor, 0
850  ret i1 %res
851}
852
853define i1 @cmp_eq_zero_xor_rsr(i32 %a, i32 %b, i32 %c) {
854; ARM-LABEL: cmp_eq_zero_xor_rsr:
855; ARM:       @ %bb.0:
856; ARM-NEXT:    eor r0, r0, r1, lsl r2
857; ARM-NEXT:    clz r0, r0
858; ARM-NEXT:    lsr r0, r0, #5
859; ARM-NEXT:    bx lr
860;
861; THUMB-LABEL: cmp_eq_zero_xor_rsr:
862; THUMB:       @ %bb.0:
863; THUMB-NEXT:    lsls r1, r2
864; THUMB-NEXT:    eors r0, r1
865; THUMB-NEXT:    rsbs r1, r0, #0
866; THUMB-NEXT:    adcs r0, r1
867; THUMB-NEXT:    bx lr
868;
869; THUMB2-LABEL: cmp_eq_zero_xor_rsr:
870; THUMB2:       @ %bb.0:
871; THUMB2-NEXT:    lsls r1, r2
872; THUMB2-NEXT:    eors r0, r1
873; THUMB2-NEXT:    clz r0, r0
874; THUMB2-NEXT:    lsrs r0, r0, #5
875; THUMB2-NEXT:    bx lr
876  %sh = shl i32 %b, %c
877  %xor = xor i32 %sh, %a
878  %res = icmp eq i32 %xor, 0
879  ret i1 %res
880}
881
882define i1 @cmp_eq_zero_xor_rsi(i32 %a, i32 %b) {
883; ARM-LABEL: cmp_eq_zero_xor_rsi:
884; ARM:       @ %bb.0:
885; ARM-NEXT:    eor r0, r0, r1, lsr #17
886; ARM-NEXT:    clz r0, r0
887; ARM-NEXT:    lsr r0, r0, #5
888; ARM-NEXT:    bx lr
889;
890; THUMB-LABEL: cmp_eq_zero_xor_rsi:
891; THUMB:       @ %bb.0:
892; THUMB-NEXT:    lsrs r1, r1, #17
893; THUMB-NEXT:    eors r0, r1
894; THUMB-NEXT:    rsbs r1, r0, #0
895; THUMB-NEXT:    adcs r0, r1
896; THUMB-NEXT:    bx lr
897;
898; THUMB2-LABEL: cmp_eq_zero_xor_rsi:
899; THUMB2:       @ %bb.0:
900; THUMB2-NEXT:    eor.w r0, r0, r1, lsr #17
901; THUMB2-NEXT:    clz r0, r0
902; THUMB2-NEXT:    lsrs r0, r0, #5
903; THUMB2-NEXT:    bx lr
904  %sh = lshr i32 %b, 17
905  %xor = xor i32 %sh, %a
906  %res = icmp eq i32 %xor, 0
907  ret i1 %res
908}
909
910define i1 @cmp_eq_zero_and_not_rr(i32 %a, i32 %b) {
911; ARM-LABEL: cmp_eq_zero_and_not_rr:
912; ARM:       @ %bb.0:
913; ARM-NEXT:    bic r0, r0, r1
914; ARM-NEXT:    clz r0, r0
915; ARM-NEXT:    lsr r0, r0, #5
916; ARM-NEXT:    bx lr
917;
918; THUMB-LABEL: cmp_eq_zero_and_not_rr:
919; THUMB:       @ %bb.0:
920; THUMB-NEXT:    bics r0, r1
921; THUMB-NEXT:    rsbs r1, r0, #0
922; THUMB-NEXT:    adcs r0, r1
923; THUMB-NEXT:    bx lr
924;
925; THUMB2-LABEL: cmp_eq_zero_and_not_rr:
926; THUMB2:       @ %bb.0:
927; THUMB2-NEXT:    bics r0, r1
928; THUMB2-NEXT:    clz r0, r0
929; THUMB2-NEXT:    lsrs r0, r0, #5
930; THUMB2-NEXT:    bx lr
931  %not = xor i32 %b, -1
932  %and = and i32 %a, %not
933  %res = icmp eq i32 %and, 0
934  ret i1 %res
935}
936
937define i1 @cmp_eq_zero_and_not_ri(i32 %a) {
938; ARM-LABEL: cmp_eq_zero_and_not_ri:
939; ARM:       @ %bb.0:
940; ARM-NEXT:    bic r0, r0, #42
941; ARM-NEXT:    clz r0, r0
942; ARM-NEXT:    lsr r0, r0, #5
943; ARM-NEXT:    bx lr
944;
945; THUMB-LABEL: cmp_eq_zero_and_not_ri:
946; THUMB:       @ %bb.0:
947; THUMB-NEXT:    movs r1, #42
948; THUMB-NEXT:    bics r0, r1
949; THUMB-NEXT:    rsbs r1, r0, #0
950; THUMB-NEXT:    adcs r0, r1
951; THUMB-NEXT:    bx lr
952;
953; THUMB2-LABEL: cmp_eq_zero_and_not_ri:
954; THUMB2:       @ %bb.0:
955; THUMB2-NEXT:    bic r0, r0, #42
956; THUMB2-NEXT:    clz r0, r0
957; THUMB2-NEXT:    lsrs r0, r0, #5
958; THUMB2-NEXT:    bx lr
959  %not = xor i32 42, -1
960  %and = and i32 %a, %not
961  %res = icmp eq i32 %and, 0
962  ret i1 %res
963}
964
965define i1 @cmp_eq_zero_and_not_rsr(i32 %a, i32 %b, i32 %c) {
966; ARM-LABEL: cmp_eq_zero_and_not_rsr:
967; ARM:       @ %bb.0:
968; ARM-NEXT:    bic r0, r0, r1, lsl r2
969; ARM-NEXT:    clz r0, r0
970; ARM-NEXT:    lsr r0, r0, #5
971; ARM-NEXT:    bx lr
972;
973; THUMB-LABEL: cmp_eq_zero_and_not_rsr:
974; THUMB:       @ %bb.0:
975; THUMB-NEXT:    lsls r1, r2
976; THUMB-NEXT:    bics r0, r1
977; THUMB-NEXT:    rsbs r1, r0, #0
978; THUMB-NEXT:    adcs r0, r1
979; THUMB-NEXT:    bx lr
980;
981; THUMB2-LABEL: cmp_eq_zero_and_not_rsr:
982; THUMB2:       @ %bb.0:
983; THUMB2-NEXT:    lsls r1, r2
984; THUMB2-NEXT:    bics r0, r1
985; THUMB2-NEXT:    clz r0, r0
986; THUMB2-NEXT:    lsrs r0, r0, #5
987; THUMB2-NEXT:    bx lr
988  %sh = shl i32 %b, %c
989  %not = xor i32 %sh, -1
990  %and = and i32 %not, %a
991  %res = icmp eq i32 %and, 0
992  ret i1 %res
993}
994
995define i1 @cmp_eq_zero_and_not_rsi(i32 %a, i32 %b) {
996; ARM-LABEL: cmp_eq_zero_and_not_rsi:
997; ARM:       @ %bb.0:
998; ARM-NEXT:    bic r0, r0, r1, lsr #17
999; ARM-NEXT:    clz r0, r0
1000; ARM-NEXT:    lsr r0, r0, #5
1001; ARM-NEXT:    bx lr
1002;
1003; THUMB-LABEL: cmp_eq_zero_and_not_rsi:
1004; THUMB:       @ %bb.0:
1005; THUMB-NEXT:    lsrs r1, r1, #17
1006; THUMB-NEXT:    bics r0, r1
1007; THUMB-NEXT:    rsbs r1, r0, #0
1008; THUMB-NEXT:    adcs r0, r1
1009; THUMB-NEXT:    bx lr
1010;
1011; THUMB2-LABEL: cmp_eq_zero_and_not_rsi:
1012; THUMB2:       @ %bb.0:
1013; THUMB2-NEXT:    bic.w r0, r0, r1, lsr #17
1014; THUMB2-NEXT:    clz r0, r0
1015; THUMB2-NEXT:    lsrs r0, r0, #5
1016; THUMB2-NEXT:    bx lr
1017  %sh = lshr i32 %b, 17
1018  %not = xor i32 %sh, -1
1019  %and = and i32 %not, %a
1020  %res = icmp eq i32 %and, 0
1021  ret i1 %res
1022}
1023
1024define i1 @cmp_eq_zero_shl_rr(i32 %a, i32 %b) {
1025; ARM-LABEL: cmp_eq_zero_shl_rr:
1026; ARM:       @ %bb.0:
1027; ARM-NEXT:    lsl r0, r0, r1
1028; ARM-NEXT:    clz r0, r0
1029; ARM-NEXT:    lsr r0, r0, #5
1030; ARM-NEXT:    bx lr
1031;
1032; THUMB-LABEL: cmp_eq_zero_shl_rr:
1033; THUMB:       @ %bb.0:
1034; THUMB-NEXT:    lsls r0, r1
1035; THUMB-NEXT:    rsbs r1, r0, #0
1036; THUMB-NEXT:    adcs r0, r1
1037; THUMB-NEXT:    bx lr
1038;
1039; THUMB2-LABEL: cmp_eq_zero_shl_rr:
1040; THUMB2:       @ %bb.0:
1041; THUMB2-NEXT:    lsls r0, r1
1042; THUMB2-NEXT:    clz r0, r0
1043; THUMB2-NEXT:    lsrs r0, r0, #5
1044; THUMB2-NEXT:    bx lr
1045    %sh = shl i32 %a, %b
1046    %cmp = icmp eq i32 %sh, 0
1047    ret i1 %cmp
1048}
1049
1050define i1 @cmp_eq_zero_shl_ri(i32 %a) {
1051; ARM-LABEL: cmp_eq_zero_shl_ri:
1052; ARM:       @ %bb.0:
1053; ARM-NEXT:    lsl r0, r0, #7
1054; ARM-NEXT:    clz r0, r0
1055; ARM-NEXT:    lsr r0, r0, #5
1056; ARM-NEXT:    bx lr
1057;
1058; THUMB-LABEL: cmp_eq_zero_shl_ri:
1059; THUMB:       @ %bb.0:
1060; THUMB-NEXT:    lsls r1, r0, #7
1061; THUMB-NEXT:    rsbs r0, r1, #0
1062; THUMB-NEXT:    adcs r0, r1
1063; THUMB-NEXT:    bx lr
1064;
1065; THUMB2-LABEL: cmp_eq_zero_shl_ri:
1066; THUMB2:       @ %bb.0:
1067; THUMB2-NEXT:    lsls r0, r0, #7
1068; THUMB2-NEXT:    clz r0, r0
1069; THUMB2-NEXT:    lsrs r0, r0, #5
1070; THUMB2-NEXT:    bx lr
1071    %sh = shl i32 %a, 7
1072    %cmp = icmp eq i32 %sh, 0
1073    ret i1 %cmp
1074}
1075
1076define i1 @cmp_eq_zero_lshr_rr(i32 %a, i32 %b) {
1077; ARM-LABEL: cmp_eq_zero_lshr_rr:
1078; ARM:       @ %bb.0:
1079; ARM-NEXT:    lsr r0, r0, r1
1080; ARM-NEXT:    clz r0, r0
1081; ARM-NEXT:    lsr r0, r0, #5
1082; ARM-NEXT:    bx lr
1083;
1084; THUMB-LABEL: cmp_eq_zero_lshr_rr:
1085; THUMB:       @ %bb.0:
1086; THUMB-NEXT:    lsrs r0, r1
1087; THUMB-NEXT:    rsbs r1, r0, #0
1088; THUMB-NEXT:    adcs r0, r1
1089; THUMB-NEXT:    bx lr
1090;
1091; THUMB2-LABEL: cmp_eq_zero_lshr_rr:
1092; THUMB2:       @ %bb.0:
1093; THUMB2-NEXT:    lsrs r0, r1
1094; THUMB2-NEXT:    clz r0, r0
1095; THUMB2-NEXT:    lsrs r0, r0, #5
1096; THUMB2-NEXT:    bx lr
1097    %sh = lshr i32 %a, %b
1098    %cmp = icmp eq i32 %sh, 0
1099    ret i1 %cmp
1100}
1101
1102define i1 @cmp_eq_zero_lshr_ri(i32 %a) {
1103; ARM-LABEL: cmp_eq_zero_lshr_ri:
1104; ARM:       @ %bb.0:
1105; ARM-NEXT:    lsr r0, r0, #7
1106; ARM-NEXT:    clz r0, r0
1107; ARM-NEXT:    lsr r0, r0, #5
1108; ARM-NEXT:    bx lr
1109;
1110; THUMB-LABEL: cmp_eq_zero_lshr_ri:
1111; THUMB:       @ %bb.0:
1112; THUMB-NEXT:    lsrs r1, r0, #7
1113; THUMB-NEXT:    rsbs r0, r1, #0
1114; THUMB-NEXT:    adcs r0, r1
1115; THUMB-NEXT:    bx lr
1116;
1117; THUMB2-LABEL: cmp_eq_zero_lshr_ri:
1118; THUMB2:       @ %bb.0:
1119; THUMB2-NEXT:    lsrs r0, r0, #7
1120; THUMB2-NEXT:    clz r0, r0
1121; THUMB2-NEXT:    lsrs r0, r0, #5
1122; THUMB2-NEXT:    bx lr
1123    %sh = lshr i32 %a, 7
1124    %cmp = icmp eq i32 %sh, 0
1125    ret i1 %cmp
1126}
1127
1128define i1 @cmp_eq_zero_ashr_rr(i32 %a, i32 %b) {
1129; ARM-LABEL: cmp_eq_zero_ashr_rr:
1130; ARM:       @ %bb.0:
1131; ARM-NEXT:    asr r0, r0, r1
1132; ARM-NEXT:    clz r0, r0
1133; ARM-NEXT:    lsr r0, r0, #5
1134; ARM-NEXT:    bx lr
1135;
1136; THUMB-LABEL: cmp_eq_zero_ashr_rr:
1137; THUMB:       @ %bb.0:
1138; THUMB-NEXT:    asrs r0, r1
1139; THUMB-NEXT:    rsbs r1, r0, #0
1140; THUMB-NEXT:    adcs r0, r1
1141; THUMB-NEXT:    bx lr
1142;
1143; THUMB2-LABEL: cmp_eq_zero_ashr_rr:
1144; THUMB2:       @ %bb.0:
1145; THUMB2-NEXT:    asrs r0, r1
1146; THUMB2-NEXT:    clz r0, r0
1147; THUMB2-NEXT:    lsrs r0, r0, #5
1148; THUMB2-NEXT:    bx lr
1149    %sh = ashr i32 %a, %b
1150    %cmp = icmp eq i32 %sh, 0
1151    ret i1 %cmp
1152}
1153
1154define i1 @cmp_eq_zero_ashr_ri(i32 %a) {
1155; ARM-LABEL: cmp_eq_zero_ashr_ri:
1156; ARM:       @ %bb.0:
1157; ARM-NEXT:    asr r0, r0, #7
1158; ARM-NEXT:    clz r0, r0
1159; ARM-NEXT:    lsr r0, r0, #5
1160; ARM-NEXT:    bx lr
1161;
1162; THUMB-LABEL: cmp_eq_zero_ashr_ri:
1163; THUMB:       @ %bb.0:
1164; THUMB-NEXT:    asrs r1, r0, #7
1165; THUMB-NEXT:    rsbs r0, r1, #0
1166; THUMB-NEXT:    adcs r0, r1
1167; THUMB-NEXT:    bx lr
1168;
1169; THUMB2-LABEL: cmp_eq_zero_ashr_ri:
1170; THUMB2:       @ %bb.0:
1171; THUMB2-NEXT:    asrs r0, r0, #7
1172; THUMB2-NEXT:    clz r0, r0
1173; THUMB2-NEXT:    lsrs r0, r0, #5
1174; THUMB2-NEXT:    bx lr
1175    %sh = ashr i32 %a, 7
1176    %cmp = icmp eq i32 %sh, 0
1177    ret i1 %cmp
1178}
1179
1180declare void @consume(i32 %0);
1181
1182define void @br_on_binop_eq_zero(i32 %a, i32 %b) {
1183; ARM-LABEL: br_on_binop_eq_zero:
1184; ARM:       @ %bb.0:
1185; ARM-NEXT:    orrs r1, r0, r1
1186; ARM-NEXT:    bxne lr
1187; ARM-NEXT:  .LBB44_1: @ %true_br
1188; ARM-NEXT:    push {r11, lr}
1189; ARM-NEXT:    bl consume
1190; ARM-NEXT:    pop {r11, lr}
1191; ARM-NEXT:    bx lr
1192;
1193; THUMB-LABEL: br_on_binop_eq_zero:
1194; THUMB:       @ %bb.0:
1195; THUMB-NEXT:    push {r7, lr}
1196; THUMB-NEXT:    orrs r1, r0
1197; THUMB-NEXT:    beq .LBB44_2
1198; THUMB-NEXT:  @ %bb.1: @ %exit
1199; THUMB-NEXT:    pop {r7, pc}
1200; THUMB-NEXT:  .LBB44_2: @ %true_br
1201; THUMB-NEXT:    bl consume
1202; THUMB-NEXT:    pop {r7, pc}
1203;
1204; THUMB2-LABEL: br_on_binop_eq_zero:
1205; THUMB2:       @ %bb.0:
1206; THUMB2-NEXT:    orrs r1, r0
1207; THUMB2-NEXT:    it ne
1208; THUMB2-NEXT:    bxne lr
1209; THUMB2-NEXT:  .LBB44_1: @ %true_br
1210; THUMB2-NEXT:    push {r7, lr}
1211; THUMB2-NEXT:    bl consume
1212; THUMB2-NEXT:    pop.w {r7, lr}
1213; THUMB2-NEXT:    bx lr
1214    %or = or i32 %a, %b
1215    %cmp = icmp eq i32 %or, 0
1216    br i1 %cmp, label %true_br, label %exit
1217true_br:
1218    call void @consume(i32 %a)
1219    br label %exit
1220exit:
1221    ret void
1222}
1223
1224define void @br_on_binop_ne_zero(i32 %a, i32 %b) {
1225; ARM-LABEL: br_on_binop_ne_zero:
1226; ARM:       @ %bb.0:
1227; ARM-NEXT:    orrs r1, r0, r1
1228; ARM-NEXT:    bxeq lr
1229; ARM-NEXT:  .LBB45_1: @ %true_br
1230; ARM-NEXT:    push {r11, lr}
1231; ARM-NEXT:    bl consume
1232; ARM-NEXT:    pop {r11, lr}
1233; ARM-NEXT:    bx lr
1234;
1235; THUMB-LABEL: br_on_binop_ne_zero:
1236; THUMB:       @ %bb.0:
1237; THUMB-NEXT:    push {r7, lr}
1238; THUMB-NEXT:    orrs r1, r0
1239; THUMB-NEXT:    beq .LBB45_2
1240; THUMB-NEXT:  @ %bb.1: @ %true_br
1241; THUMB-NEXT:    bl consume
1242; THUMB-NEXT:  .LBB45_2: @ %exit
1243; THUMB-NEXT:    pop {r7, pc}
1244;
1245; THUMB2-LABEL: br_on_binop_ne_zero:
1246; THUMB2:       @ %bb.0:
1247; THUMB2-NEXT:    orrs r1, r0
1248; THUMB2-NEXT:    it eq
1249; THUMB2-NEXT:    bxeq lr
1250; THUMB2-NEXT:  .LBB45_1: @ %true_br
1251; THUMB2-NEXT:    push {r7, lr}
1252; THUMB2-NEXT:    bl consume
1253; THUMB2-NEXT:    pop.w {r7, lr}
1254; THUMB2-NEXT:    bx lr
1255    %or = or i32 %a, %b
1256    %cmp = icmp ne i32 %or, 0
1257    br i1 %cmp, label %true_br, label %exit
1258true_br:
1259    call void @consume(i32 %a)
1260    br label %exit
1261exit:
1262    ret void
1263}
1264
1265define void @br_on_binop_lt_zero(i32 %a, i32 %b) {
1266; ARM-LABEL: br_on_binop_lt_zero:
1267; ARM:       @ %bb.0:
1268; ARM-NEXT:    orr r1, r0, r1
1269; ARM-NEXT:    cmp r1, #0
1270; ARM-NEXT:    bxhs lr
1271; ARM-NEXT:  .LBB46_1: @ %true_br
1272; ARM-NEXT:    push {r11, lr}
1273; ARM-NEXT:    bl consume
1274; ARM-NEXT:    pop {r11, lr}
1275; ARM-NEXT:    bx lr
1276;
1277; THUMB-LABEL: br_on_binop_lt_zero:
1278; THUMB:       @ %bb.0:
1279; THUMB-NEXT:    push {r7, lr}
1280; THUMB-NEXT:    orrs r1, r0
1281; THUMB-NEXT:    cmp r1, #0
1282; THUMB-NEXT:    bhs .LBB46_2
1283; THUMB-NEXT:  @ %bb.1: @ %true_br
1284; THUMB-NEXT:    bl consume
1285; THUMB-NEXT:  .LBB46_2: @ %exit
1286; THUMB-NEXT:    pop {r7, pc}
1287;
1288; THUMB2-LABEL: br_on_binop_lt_zero:
1289; THUMB2:       @ %bb.0:
1290; THUMB2-NEXT:    orrs r1, r0
1291; THUMB2-NEXT:    cmp r1, #0
1292; THUMB2-NEXT:    it hs
1293; THUMB2-NEXT:    bxhs lr
1294; THUMB2-NEXT:  .LBB46_1: @ %true_br
1295; THUMB2-NEXT:    push {r7, lr}
1296; THUMB2-NEXT:    bl consume
1297; THUMB2-NEXT:    pop.w {r7, lr}
1298; THUMB2-NEXT:    bx lr
1299    %or = or i32 %a, %b
1300    %cmp = icmp ult i32 %or, 0
1301    br i1 %cmp, label %true_br, label %exit
1302true_br:
1303    call void @consume(i32 %a)
1304    br label %exit
1305exit:
1306    ret void
1307}
1308
1309define void @br_on_binop_eq_imm(i32 %a, i32 %b) {
1310; ARM-LABEL: br_on_binop_eq_imm:
1311; ARM:       @ %bb.0:
1312; ARM-NEXT:    orr r1, r0, r1
1313; ARM-NEXT:    cmp r1, #42
1314; ARM-NEXT:    bxne lr
1315; ARM-NEXT:  .LBB47_1: @ %true_br
1316; ARM-NEXT:    push {r11, lr}
1317; ARM-NEXT:    bl consume
1318; ARM-NEXT:    pop {r11, lr}
1319; ARM-NEXT:    bx lr
1320;
1321; THUMB-LABEL: br_on_binop_eq_imm:
1322; THUMB:       @ %bb.0:
1323; THUMB-NEXT:    push {r7, lr}
1324; THUMB-NEXT:    orrs r1, r0
1325; THUMB-NEXT:    cmp r1, #42
1326; THUMB-NEXT:    bne .LBB47_2
1327; THUMB-NEXT:  @ %bb.1: @ %true_br
1328; THUMB-NEXT:    bl consume
1329; THUMB-NEXT:  .LBB47_2: @ %exit
1330; THUMB-NEXT:    pop {r7, pc}
1331;
1332; THUMB2-LABEL: br_on_binop_eq_imm:
1333; THUMB2:       @ %bb.0:
1334; THUMB2-NEXT:    orrs r1, r0
1335; THUMB2-NEXT:    cmp r1, #42
1336; THUMB2-NEXT:    it ne
1337; THUMB2-NEXT:    bxne lr
1338; THUMB2-NEXT:  .LBB47_1: @ %true_br
1339; THUMB2-NEXT:    push {r7, lr}
1340; THUMB2-NEXT:    bl consume
1341; THUMB2-NEXT:    pop.w {r7, lr}
1342; THUMB2-NEXT:    bx lr
1343    %or = or i32 %a, %b
1344    %cmp = icmp eq i32 %or, 42
1345    br i1 %cmp, label %true_br, label %exit
1346true_br:
1347    call void @consume(i32 %a)
1348    br label %exit
1349exit:
1350    ret void
1351}
1352
1353define void @br_on_binop_ne_imm(i32 %a, i32 %b) {
1354; ARM-LABEL: br_on_binop_ne_imm:
1355; ARM:       @ %bb.0:
1356; ARM-NEXT:    orr r1, r0, r1
1357; ARM-NEXT:    cmp r1, #42
1358; ARM-NEXT:    bxeq lr
1359; ARM-NEXT:  .LBB48_1: @ %true_br
1360; ARM-NEXT:    push {r11, lr}
1361; ARM-NEXT:    bl consume
1362; ARM-NEXT:    pop {r11, lr}
1363; ARM-NEXT:    bx lr
1364;
1365; THUMB-LABEL: br_on_binop_ne_imm:
1366; THUMB:       @ %bb.0:
1367; THUMB-NEXT:    push {r7, lr}
1368; THUMB-NEXT:    orrs r1, r0
1369; THUMB-NEXT:    cmp r1, #42
1370; THUMB-NEXT:    beq .LBB48_2
1371; THUMB-NEXT:  @ %bb.1: @ %true_br
1372; THUMB-NEXT:    bl consume
1373; THUMB-NEXT:  .LBB48_2: @ %exit
1374; THUMB-NEXT:    pop {r7, pc}
1375;
1376; THUMB2-LABEL: br_on_binop_ne_imm:
1377; THUMB2:       @ %bb.0:
1378; THUMB2-NEXT:    orrs r1, r0
1379; THUMB2-NEXT:    cmp r1, #42
1380; THUMB2-NEXT:    it eq
1381; THUMB2-NEXT:    bxeq lr
1382; THUMB2-NEXT:  .LBB48_1: @ %true_br
1383; THUMB2-NEXT:    push {r7, lr}
1384; THUMB2-NEXT:    bl consume
1385; THUMB2-NEXT:    pop.w {r7, lr}
1386; THUMB2-NEXT:    bx lr
1387    %or = or i32 %a, %b
1388    %cmp = icmp ne i32 %or, 42
1389    br i1 %cmp, label %true_br, label %exit
1390true_br:
1391    call void @consume(i32 %a)
1392    br label %exit
1393exit:
1394    ret void
1395}
1396
1397define void @br_on_binop_eq_reg(i32 %a, i32 %b, i32 %c) {
1398; ARM-LABEL: br_on_binop_eq_reg:
1399; ARM:       @ %bb.0:
1400; ARM-NEXT:    eor r1, r0, r1
1401; ARM-NEXT:    cmp r1, r2
1402; ARM-NEXT:    bxne lr
1403; ARM-NEXT:  .LBB49_1: @ %true_br
1404; ARM-NEXT:    push {r11, lr}
1405; ARM-NEXT:    bl consume
1406; ARM-NEXT:    pop {r11, lr}
1407; ARM-NEXT:    bx lr
1408;
1409; THUMB-LABEL: br_on_binop_eq_reg:
1410; THUMB:       @ %bb.0:
1411; THUMB-NEXT:    push {r7, lr}
1412; THUMB-NEXT:    eors r1, r0
1413; THUMB-NEXT:    cmp r1, r2
1414; THUMB-NEXT:    bne .LBB49_2
1415; THUMB-NEXT:  @ %bb.1: @ %true_br
1416; THUMB-NEXT:    bl consume
1417; THUMB-NEXT:  .LBB49_2: @ %exit
1418; THUMB-NEXT:    pop {r7, pc}
1419;
1420; THUMB2-LABEL: br_on_binop_eq_reg:
1421; THUMB2:       @ %bb.0:
1422; THUMB2-NEXT:    eors r1, r0
1423; THUMB2-NEXT:    cmp r1, r2
1424; THUMB2-NEXT:    it ne
1425; THUMB2-NEXT:    bxne lr
1426; THUMB2-NEXT:  .LBB49_1: @ %true_br
1427; THUMB2-NEXT:    push {r7, lr}
1428; THUMB2-NEXT:    bl consume
1429; THUMB2-NEXT:    pop.w {r7, lr}
1430; THUMB2-NEXT:    bx lr
1431    %xor = xor i32 %a, %b
1432    %cmp = icmp eq i32 %xor, %c
1433    br i1 %cmp, label %true_br, label %exit
1434true_br:
1435    call void @consume(i32 %a)
1436    br label %exit
1437exit:
1438    ret void
1439}
1440
1441define void @br_on_binop_ne_reg(i32 %a, i32 %b, i32 %c) {
1442; ARM-LABEL: br_on_binop_ne_reg:
1443; ARM:       @ %bb.0:
1444; ARM-NEXT:    and r1, r0, r1
1445; ARM-NEXT:    cmp r1, r2
1446; ARM-NEXT:    bxeq lr
1447; ARM-NEXT:  .LBB50_1: @ %true_br
1448; ARM-NEXT:    push {r11, lr}
1449; ARM-NEXT:    bl consume
1450; ARM-NEXT:    pop {r11, lr}
1451; ARM-NEXT:    bx lr
1452;
1453; THUMB-LABEL: br_on_binop_ne_reg:
1454; THUMB:       @ %bb.0:
1455; THUMB-NEXT:    push {r7, lr}
1456; THUMB-NEXT:    ands r1, r0
1457; THUMB-NEXT:    cmp r1, r2
1458; THUMB-NEXT:    beq .LBB50_2
1459; THUMB-NEXT:  @ %bb.1: @ %true_br
1460; THUMB-NEXT:    bl consume
1461; THUMB-NEXT:  .LBB50_2: @ %exit
1462; THUMB-NEXT:    pop {r7, pc}
1463;
1464; THUMB2-LABEL: br_on_binop_ne_reg:
1465; THUMB2:       @ %bb.0:
1466; THUMB2-NEXT:    ands r1, r0
1467; THUMB2-NEXT:    cmp r1, r2
1468; THUMB2-NEXT:    it eq
1469; THUMB2-NEXT:    bxeq lr
1470; THUMB2-NEXT:  .LBB50_1: @ %true_br
1471; THUMB2-NEXT:    push {r7, lr}
1472; THUMB2-NEXT:    bl consume
1473; THUMB2-NEXT:    pop.w {r7, lr}
1474; THUMB2-NEXT:    bx lr
1475    %and = and i32 %a, %b
1476    %cmp = icmp ne i32 %and, %c
1477    br i1 %cmp, label %true_br, label %exit
1478true_br:
1479    call void @consume(i32 %a)
1480    br label %exit
1481exit:
1482    ret void
1483}
1484
1485define void @br_on_shift_eq_zero(i32 %a, i32 %b) {
1486; ARM-LABEL: br_on_shift_eq_zero:
1487; ARM:       @ %bb.0:
1488; ARM-NEXT:    lsls r1, r0, r1
1489; ARM-NEXT:    bxne lr
1490; ARM-NEXT:  .LBB51_1: @ %true_br
1491; ARM-NEXT:    push {r11, lr}
1492; ARM-NEXT:    bl consume
1493; ARM-NEXT:    pop {r11, lr}
1494; ARM-NEXT:    bx lr
1495;
1496; THUMB-LABEL: br_on_shift_eq_zero:
1497; THUMB:       @ %bb.0:
1498; THUMB-NEXT:    push {r7, lr}
1499; THUMB-NEXT:    mov r2, r0
1500; THUMB-NEXT:    lsls r2, r1
1501; THUMB-NEXT:    beq .LBB51_2
1502; THUMB-NEXT:  @ %bb.1: @ %exit
1503; THUMB-NEXT:    pop {r7, pc}
1504; THUMB-NEXT:  .LBB51_2: @ %true_br
1505; THUMB-NEXT:    bl consume
1506; THUMB-NEXT:    pop {r7, pc}
1507;
1508; THUMB2-LABEL: br_on_shift_eq_zero:
1509; THUMB2:       @ %bb.0:
1510; THUMB2-NEXT:    lsls.w r1, r0, r1
1511; THUMB2-NEXT:    it ne
1512; THUMB2-NEXT:    bxne lr
1513; THUMB2-NEXT:  .LBB51_1: @ %true_br
1514; THUMB2-NEXT:    push {r7, lr}
1515; THUMB2-NEXT:    bl consume
1516; THUMB2-NEXT:    pop.w {r7, lr}
1517; THUMB2-NEXT:    bx lr
1518    %sh = shl i32 %a, %b
1519    %cmp = icmp eq i32 %sh, 0
1520    br i1 %cmp, label %true_br, label %exit
1521true_br:
1522    call void @consume(i32 %a)
1523    br label %exit
1524exit:
1525    ret void
1526}
1527
1528define void @br_on_shift_ne_zero(i32 %a, i32 %b) {
1529; ARM-LABEL: br_on_shift_ne_zero:
1530; ARM:       @ %bb.0:
1531; ARM-NEXT:    lsrs r1, r0, r1
1532; ARM-NEXT:    bxeq lr
1533; ARM-NEXT:  .LBB52_1: @ %true_br
1534; ARM-NEXT:    push {r11, lr}
1535; ARM-NEXT:    bl consume
1536; ARM-NEXT:    pop {r11, lr}
1537; ARM-NEXT:    bx lr
1538;
1539; THUMB-LABEL: br_on_shift_ne_zero:
1540; THUMB:       @ %bb.0:
1541; THUMB-NEXT:    push {r7, lr}
1542; THUMB-NEXT:    mov r2, r0
1543; THUMB-NEXT:    lsrs r2, r1
1544; THUMB-NEXT:    beq .LBB52_2
1545; THUMB-NEXT:  @ %bb.1: @ %true_br
1546; THUMB-NEXT:    bl consume
1547; THUMB-NEXT:  .LBB52_2: @ %exit
1548; THUMB-NEXT:    pop {r7, pc}
1549;
1550; THUMB2-LABEL: br_on_shift_ne_zero:
1551; THUMB2:       @ %bb.0:
1552; THUMB2-NEXT:    lsrs.w r1, r0, r1
1553; THUMB2-NEXT:    it eq
1554; THUMB2-NEXT:    bxeq lr
1555; THUMB2-NEXT:  .LBB52_1: @ %true_br
1556; THUMB2-NEXT:    push {r7, lr}
1557; THUMB2-NEXT:    bl consume
1558; THUMB2-NEXT:    pop.w {r7, lr}
1559; THUMB2-NEXT:    bx lr
1560    %sh = lshr i32 %a, %b
1561    %cmp = icmp ne i32 %sh, 0
1562    br i1 %cmp, label %true_br, label %exit
1563true_br:
1564    call void @consume(i32 %a)
1565    br label %exit
1566exit:
1567    ret void
1568}
1569
1570define void @br_on_shift_lt_zero(i32 %a, i32 %b) {
1571; ARM-LABEL: br_on_shift_lt_zero:
1572; ARM:       @ %bb.0:
1573; ARM-NEXT:    asr r1, r0, r1
1574; ARM-NEXT:    cmp r1, #0
1575; ARM-NEXT:    bxhs lr
1576; ARM-NEXT:  .LBB53_1: @ %true_br
1577; ARM-NEXT:    push {r11, lr}
1578; ARM-NEXT:    bl consume
1579; ARM-NEXT:    pop {r11, lr}
1580; ARM-NEXT:    bx lr
1581;
1582; THUMB-LABEL: br_on_shift_lt_zero:
1583; THUMB:       @ %bb.0:
1584; THUMB-NEXT:    push {r7, lr}
1585; THUMB-NEXT:    mov r2, r0
1586; THUMB-NEXT:    asrs r2, r1
1587; THUMB-NEXT:    cmp r2, #0
1588; THUMB-NEXT:    bhs .LBB53_2
1589; THUMB-NEXT:  @ %bb.1: @ %true_br
1590; THUMB-NEXT:    bl consume
1591; THUMB-NEXT:  .LBB53_2: @ %exit
1592; THUMB-NEXT:    pop {r7, pc}
1593;
1594; THUMB2-LABEL: br_on_shift_lt_zero:
1595; THUMB2:       @ %bb.0:
1596; THUMB2-NEXT:    asr.w r1, r0, r1
1597; THUMB2-NEXT:    cmp r1, #0
1598; THUMB2-NEXT:    it hs
1599; THUMB2-NEXT:    bxhs lr
1600; THUMB2-NEXT:  .LBB53_1: @ %true_br
1601; THUMB2-NEXT:    push {r7, lr}
1602; THUMB2-NEXT:    bl consume
1603; THUMB2-NEXT:    pop.w {r7, lr}
1604; THUMB2-NEXT:    bx lr
1605    %sh = ashr i32 %a, %b
1606    %cmp = icmp ult i32 %sh, 0
1607    br i1 %cmp, label %true_br, label %exit
1608true_br:
1609    call void @consume(i32 %a)
1610    br label %exit
1611exit:
1612    ret void
1613}
1614
1615define void @br_on_shift_eq_imm(i32 %a, i32 %b) {
1616; ARM-LABEL: br_on_shift_eq_imm:
1617; ARM:       @ %bb.0:
1618; ARM-NEXT:    mov r2, #42
1619; ARM-NEXT:    cmp r2, r0, lsl r1
1620; ARM-NEXT:    bxne lr
1621; ARM-NEXT:  .LBB54_1: @ %true_br
1622; ARM-NEXT:    push {r11, lr}
1623; ARM-NEXT:    bl consume
1624; ARM-NEXT:    pop {r11, lr}
1625; ARM-NEXT:    bx lr
1626;
1627; THUMB-LABEL: br_on_shift_eq_imm:
1628; THUMB:       @ %bb.0:
1629; THUMB-NEXT:    push {r7, lr}
1630; THUMB-NEXT:    mov r2, r0
1631; THUMB-NEXT:    lsls r2, r1
1632; THUMB-NEXT:    cmp r2, #42
1633; THUMB-NEXT:    bne .LBB54_2
1634; THUMB-NEXT:  @ %bb.1: @ %true_br
1635; THUMB-NEXT:    bl consume
1636; THUMB-NEXT:  .LBB54_2: @ %exit
1637; THUMB-NEXT:    pop {r7, pc}
1638;
1639; THUMB2-LABEL: br_on_shift_eq_imm:
1640; THUMB2:       @ %bb.0:
1641; THUMB2-NEXT:    lsl.w r1, r0, r1
1642; THUMB2-NEXT:    cmp r1, #42
1643; THUMB2-NEXT:    it ne
1644; THUMB2-NEXT:    bxne lr
1645; THUMB2-NEXT:  .LBB54_1: @ %true_br
1646; THUMB2-NEXT:    push {r7, lr}
1647; THUMB2-NEXT:    bl consume
1648; THUMB2-NEXT:    pop.w {r7, lr}
1649; THUMB2-NEXT:    bx lr
1650    %sh = shl i32 %a, %b
1651    %cmp = icmp eq i32 %sh, 42
1652    br i1 %cmp, label %true_br, label %exit
1653true_br:
1654    call void @consume(i32 %a)
1655    br label %exit
1656exit:
1657    ret void
1658}
1659
1660define void @br_on_shift_ne_imm(i32 %a, i32 %b) {
1661; ARM-LABEL: br_on_shift_ne_imm:
1662; ARM:       @ %bb.0:
1663; ARM-NEXT:    mov r2, #42
1664; ARM-NEXT:    cmp r2, r0, lsr r1
1665; ARM-NEXT:    bxeq lr
1666; ARM-NEXT:  .LBB55_1: @ %true_br
1667; ARM-NEXT:    push {r11, lr}
1668; ARM-NEXT:    bl consume
1669; ARM-NEXT:    pop {r11, lr}
1670; ARM-NEXT:    bx lr
1671;
1672; THUMB-LABEL: br_on_shift_ne_imm:
1673; THUMB:       @ %bb.0:
1674; THUMB-NEXT:    push {r7, lr}
1675; THUMB-NEXT:    mov r2, r0
1676; THUMB-NEXT:    lsrs r2, r1
1677; THUMB-NEXT:    cmp r2, #42
1678; THUMB-NEXT:    beq .LBB55_2
1679; THUMB-NEXT:  @ %bb.1: @ %true_br
1680; THUMB-NEXT:    bl consume
1681; THUMB-NEXT:  .LBB55_2: @ %exit
1682; THUMB-NEXT:    pop {r7, pc}
1683;
1684; THUMB2-LABEL: br_on_shift_ne_imm:
1685; THUMB2:       @ %bb.0:
1686; THUMB2-NEXT:    lsr.w r1, r0, r1
1687; THUMB2-NEXT:    cmp r1, #42
1688; THUMB2-NEXT:    it eq
1689; THUMB2-NEXT:    bxeq lr
1690; THUMB2-NEXT:  .LBB55_1: @ %true_br
1691; THUMB2-NEXT:    push {r7, lr}
1692; THUMB2-NEXT:    bl consume
1693; THUMB2-NEXT:    pop.w {r7, lr}
1694; THUMB2-NEXT:    bx lr
1695    %sh = lshr i32 %a, %b
1696    %cmp = icmp ne i32 %sh, 42
1697    br i1 %cmp, label %true_br, label %exit
1698true_br:
1699    call void @consume(i32 %a)
1700    br label %exit
1701exit:
1702    ret void
1703}
1704
1705define void @br_on_shift_eq_reg(i32 %a, i32 %b, i32 %c) {
1706; ARM-LABEL: br_on_shift_eq_reg:
1707; ARM:       @ %bb.0:
1708; ARM-NEXT:    cmp r2, r0, asr r1
1709; ARM-NEXT:    bxne lr
1710; ARM-NEXT:  .LBB56_1: @ %true_br
1711; ARM-NEXT:    push {r11, lr}
1712; ARM-NEXT:    bl consume
1713; ARM-NEXT:    pop {r11, lr}
1714; ARM-NEXT:    bx lr
1715;
1716; THUMB-LABEL: br_on_shift_eq_reg:
1717; THUMB:       @ %bb.0:
1718; THUMB-NEXT:    push {r7, lr}
1719; THUMB-NEXT:    mov r3, r0
1720; THUMB-NEXT:    asrs r3, r1
1721; THUMB-NEXT:    cmp r2, r3
1722; THUMB-NEXT:    bne .LBB56_2
1723; THUMB-NEXT:  @ %bb.1: @ %true_br
1724; THUMB-NEXT:    bl consume
1725; THUMB-NEXT:  .LBB56_2: @ %exit
1726; THUMB-NEXT:    pop {r7, pc}
1727;
1728; THUMB2-LABEL: br_on_shift_eq_reg:
1729; THUMB2:       @ %bb.0:
1730; THUMB2-NEXT:    asr.w r1, r0, r1
1731; THUMB2-NEXT:    cmp r2, r1
1732; THUMB2-NEXT:    it ne
1733; THUMB2-NEXT:    bxne lr
1734; THUMB2-NEXT:  .LBB56_1: @ %true_br
1735; THUMB2-NEXT:    push {r7, lr}
1736; THUMB2-NEXT:    bl consume
1737; THUMB2-NEXT:    pop.w {r7, lr}
1738; THUMB2-NEXT:    bx lr
1739    %sh = ashr i32 %a, %b
1740    %cmp = icmp eq i32 %sh, %c
1741    br i1 %cmp, label %true_br, label %exit
1742true_br:
1743    call void @consume(i32 %a)
1744    br label %exit
1745exit:
1746    ret void
1747}
1748
1749define void @br_on_shift_ne_reg(i32 %a, i32 %b, i32 %c) {
1750; ARM-LABEL: br_on_shift_ne_reg:
1751; ARM:       @ %bb.0:
1752; ARM-NEXT:    cmp r2, r0, lsl r1
1753; ARM-NEXT:    bxeq lr
1754; ARM-NEXT:  .LBB57_1: @ %true_br
1755; ARM-NEXT:    push {r11, lr}
1756; ARM-NEXT:    bl consume
1757; ARM-NEXT:    pop {r11, lr}
1758; ARM-NEXT:    bx lr
1759;
1760; THUMB-LABEL: br_on_shift_ne_reg:
1761; THUMB:       @ %bb.0:
1762; THUMB-NEXT:    push {r7, lr}
1763; THUMB-NEXT:    mov r3, r0
1764; THUMB-NEXT:    lsls r3, r1
1765; THUMB-NEXT:    cmp r2, r3
1766; THUMB-NEXT:    beq .LBB57_2
1767; THUMB-NEXT:  @ %bb.1: @ %true_br
1768; THUMB-NEXT:    bl consume
1769; THUMB-NEXT:  .LBB57_2: @ %exit
1770; THUMB-NEXT:    pop {r7, pc}
1771;
1772; THUMB2-LABEL: br_on_shift_ne_reg:
1773; THUMB2:       @ %bb.0:
1774; THUMB2-NEXT:    lsl.w r1, r0, r1
1775; THUMB2-NEXT:    cmp r2, r1
1776; THUMB2-NEXT:    it eq
1777; THUMB2-NEXT:    bxeq lr
1778; THUMB2-NEXT:  .LBB57_1: @ %true_br
1779; THUMB2-NEXT:    push {r7, lr}
1780; THUMB2-NEXT:    bl consume
1781; THUMB2-NEXT:    pop.w {r7, lr}
1782; THUMB2-NEXT:    bx lr
1783    %sh = shl i32 %a, %b
1784    %cmp = icmp ne i32 %sh, %c
1785    br i1 %cmp, label %true_br, label %exit
1786true_br:
1787    call void @consume(i32 %a)
1788    br label %exit
1789exit:
1790    ret void
1791}
1792