1; This tests that MC/asm header conversion is smooth and that the 2; build attributes are correct 3 4; RUN: llc < %s -mtriple=thumbv5-linux-gnueabi -mcpu=xscale -mattr=+strict-align | FileCheck %s --check-prefix=XSCALE 5; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6 6; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6-FAST 7; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 8; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M 9; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST 10; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M 11; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST 12; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align | FileCheck %s --check-prefix=ARM1156T2F-S 13; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=ARM1156T2F-S-FAST 14; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 15; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi | FileCheck %s --check-prefix=V7M 16; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7M-FAST 17; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 18; RUN: llc < %s -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=V7 19; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 20; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7-FAST 21; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8 22; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V8-FAST 23; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 24; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi | FileCheck %s --check-prefix=Vt8 25; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 26; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-neon,-crypto | FileCheck %s --check-prefix=V8-FPARMv8 27; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-fp-armv8,-crypto | FileCheck %s --check-prefix=V8-NEON 28; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-crypto | FileCheck %s --check-prefix=V8-FPARMv8-NEON 29; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8-FPARMv8-NEON-CRYPTO 30; RUN: llc < %s -mtriple=thumbv8m.base-linux-gnueabi | FileCheck %s --check-prefix=V8MBASELINE 31; RUN: llc < %s -mtriple=thumbv8m.main-linux-gnueabi | FileCheck %s --check-prefix=V8MMAINLINE 32; RUN: llc < %s -mtriple=thumbv8m.main-linux-gnueabi -mattr=+dsp | FileCheck %s --check-prefix=V8MMAINLINE_DSP 33; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT 34; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT-FAST 35; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 36; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-neon,-d32 | FileCheck %s --check-prefix=CORTEX-A5-NONEON 37; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2sp | FileCheck %s --check-prefix=CORTEX-A5-NOFPU 38; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2sp -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-NOFPU-FAST 39; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A8-SOFT 40; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A8-SOFT-FAST 41; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A8-HARD 42; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=hard -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A8-HARD-FAST 43; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 44; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A8-SOFT 45; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT 46; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-SOFT-FAST 47; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A9-HARD 48; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-HARD-FAST 49; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 50; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT 51; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT 52; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT-FAST 53; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2sp | FileCheck %s --check-prefix=CORTEX-A12-NOFPU 54; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2sp -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-NOFPU-FAST 55; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 56; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CORTEX-A15 57; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A15-FAST 58; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 59; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 | FileCheck %s --check-prefix=CORTEX-A17-DEFAULT 60; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-FAST 61; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2sp | FileCheck %s --check-prefix=CORTEX-A17-NOFPU 62; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2sp -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-NOFPU-FAST 63 64; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-no-trapping-fp-math | FileCheck %s --check-prefix=NO-TRAPPING-MATH 65; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -denormal-fp-math=ieee | FileCheck %s --check-prefix=DENORMAL-IEEE 66; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -denormal-fp-math=preserve-sign | FileCheck %s --check-prefix=DENORMAL-PRESERVE-SIGN 67; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -denormal-fp-math=positive-zero | FileCheck %s --check-prefix=DENORMAL-POSITIVE-ZERO 68 69; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-FP16 70; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,-d32,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-D16-FP16 71; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,-fp64,-d32 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD 72; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,-fp64,-d32,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD-FP16 73; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=+neon,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-NEON-FP16 74 75; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 76; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 | FileCheck %s --check-prefix=CORTEX-M0 77; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0-FAST 78; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 79; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus | FileCheck %s --check-prefix=CORTEX-M0PLUS 80; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0PLUS-FAST 81; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 82; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 | FileCheck %s --check-prefix=CORTEX-M1 83; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M1-FAST 84; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 85; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align | FileCheck %s --check-prefix=SC000 86; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC000-FAST 87; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 88; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=CORTEX-M3 89; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M3-FAST 90; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 91; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 | FileCheck %s --check-prefix=SC300 92; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC300-FAST 93; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 94; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-M4-SOFT 95; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-SOFT-FAST 96; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-M4-HARD 97; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-HARD-FAST 98; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 99; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2sp | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SOFT 100; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2sp -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-NOFPU-FAST 101; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-fp64 | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SINGLE 102; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-fp64 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-FAST 103; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 | FileCheck %s --check-prefix=CORTEX-M7-DOUBLE 104; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 105; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m23 | FileCheck %s --check-prefix=CORTEX-M23 106; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m33 | FileCheck %s --check-prefix=CORTEX-M33 107; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m33 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M33-FAST 108; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m33 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 109 110; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m35p | FileCheck %s --check-prefix=CORTEX-M35P 111; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m35p -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 112 113; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4 | FileCheck %s --check-prefix=CORTEX-R4 114; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4f | FileCheck %s --check-prefix=CORTEX-R4F 115; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5 116; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R5-FAST 117; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 118; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 | FileCheck %s --check-prefix=CORTEX-R7 119; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R7-FAST 120; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 121; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 | FileCheck %s --check-prefix=CORTEX-R8 122; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R8-FAST 123; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 124; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 | FileCheck %s --check-prefix=CORTEX-A32 125; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A32-FAST 126; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 127; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=CORTEX-A35 128; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A35-FAST 129; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 130; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 | FileCheck %s --check-prefix=CORTEX-A53 131; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A53-FAST 132; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 133; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=CORTEX-A57 134; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A57-FAST 135; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 136; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=CORTEX-A72 137; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A72-FAST 138; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 139; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a73 | FileCheck %s --check-prefix=CORTEX-A73 140; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A 141; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m3 | FileCheck %s --check-prefix=EXYNOS-M3 142; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m3 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-FAST 143; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 144; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m4 | FileCheck %s --check-prefix=EXYNOS-M4 145; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m4 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-FAST 146; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m4 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 147; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m5 | FileCheck %s --check-prefix=EXYNOS-M5 148; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m5 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-FAST 149; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 150; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A-FAST 151; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 152; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=CORTEX-A7-CHECK 153; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-CHECK-FAST 154; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2sp,-vfp3,-vfp4,-neon,-fp16 | FileCheck %s --check-prefix=CORTEX-A7-NOFPU 155; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2sp,-vfp3,-vfp4,-neon,-fp16 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-NOFPU-FAST 156; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4 157; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 158; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-FPUV4-FAST 159; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,,-d32,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4 160; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=pic | FileCheck %s --check-prefix=RELOC-PIC 161; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=static | FileCheck %s --check-prefix=RELOC-OTHER 162; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=dynamic-no-pic | FileCheck %s --check-prefix=RELOC-OTHER 163; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=RELOC-OTHER 164; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=PCS-R9-USE 165; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+reserve-r9,+strict-align | FileCheck %s --check-prefix=PCS-R9-RESERVE 166; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=ropi | FileCheck %s --check-prefix=RELOC-ROPI 167; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=rwpi | FileCheck %s --check-prefix=RELOC-RWPI 168; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=ropi-rwpi | FileCheck %s --check-prefix=RELOC-ROPI-RWPI 169 170; ARMv8.1a (AArch32) 171; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN 172; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 173; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN 174; ARMv8a (AArch32) 175; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a32 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 176; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a32 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 177; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 178; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 179; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 180; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 181; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 182; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 183; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 184; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m3 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 185; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m4 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 186; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m4 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 187; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 188; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m5 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 189 190; ARMv9a (AArch32) 191; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a510 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 192; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a510 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 193; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a710 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 194; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a710 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 195 196; ARMv7a 197; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 198; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 199; ARMv7ve 200; RUN: llc < %s -mtriple=armv7ve-none-linux-gnueabi | FileCheck %s --check-prefix=V7VE 201; ARMv7r 202; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 203; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 204; ARMv7em 205; RUN: llc < %s -mtriple=thumbv7em-none-linux-gnueabi -mcpu=cortex-m4 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 206; RUN: llc < %s -mtriple=thumbv7em-none-linux-gnueabi -mcpu=cortex-m4 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 207; ARMv7m 208; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 209; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 210; ARMv6 211; RUN: llc < %s -mtriple=armv6-none-netbsd-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN 212; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 213; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN 214; ARMv6k 215; RUN: llc < %s -mtriple=armv6k-none-netbsd-gnueabi -mcpu=mpcore 2> %t | FileCheck %s --check-prefix=NO-STRICT-ALIGN 216; RUN: FileCheck %s < %t --allow-empty --check-prefix=CPU-SUPPORTED 217; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=mpcore -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 218; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=mpcore | FileCheck %s --check-prefix=NO-STRICT-ALIGN 219; ARMv6m 220; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 221; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mattr=+strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN 222; RUN: llc < %s -mtriple=thumbv6m-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 223; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 224; ARMv5 225; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e | FileCheck %s --check-prefix=NO-STRICT-ALIGN 226; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 227 228; ARMv8-R 229; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-r52 -mattr=-vfp2sp,-fp16 | FileCheck %s --check-prefix=ARMv8R --check-prefix=ARMv8R-NOFPU 230; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-r52 -mattr=-neon,-fp64,-d32 | FileCheck %s --check-prefix=ARMv8R --check-prefix=ARMv8R-SP 231; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-r52 | FileCheck %s --check-prefix=ARMv8R --check-prefix=ARMv8R-NEON 232 233; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-r52plus -mattr=-vfp2sp,-fp16 | FileCheck %s --check-prefix=ARMv8R --check-prefix=ARMv8R-NOFPU 234; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-r52plus -mattr=-neon,-fp64,-d32 | FileCheck %s --check-prefix=ARMv8R --check-prefix=ARMv8R-SP 235; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-r52plus | FileCheck %s --check-prefix=ARMv8R --check-prefix=ARMv8R-NEON 236 237; ARMv8-M 238; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m23 | FileCheck %s --check-prefix=STRICT-ALIGN 239; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m33 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 240; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m33 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 241; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m35p | FileCheck %s --check-prefix=NO-STRICT-ALIGN 242; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m35p -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 243; RUN: llc < %s -mtriple=thumbv8.1m.main-none-none-eabi | FileCheck %s --check-prefix=ARMv81M-MAIN 244; RUN: llc < %s -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve | FileCheck %s --check-prefix=ARMv81M-MAIN-MVEINT 245; RUN: llc < %s -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp | FileCheck %s --check-prefix=ARMv81M-MAIN-MVEFP 246; RUN: llc < %s -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+pacbti | FileCheck %s --check-prefix=ARMv81M-MAIN-PACBTI 247; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-m55 | FileCheck %s --check-prefix=CORTEX-M55 248; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-m85 | FileCheck %s --check-prefix=CORTEX-M85 249; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-m85+nopacbti | FileCheck %s --check-prefix=CHECK-NO-PACBTI 250 251; CPU-SUPPORTED-NOT: is not a recognized processor for this target 252 253; XSCALE: .eabi_attribute 6, 5 254; XSCALE: .eabi_attribute 8, 1 255; XSCALE: .eabi_attribute 9, 1 256 257; DYN-ROUNDING: .eabi_attribute 19, 1 258 259; V6: .eabi_attribute 6, 6 260; V6: .eabi_attribute 8, 1 261;; We assume round-to-nearest by default (matches GCC) 262; V6-NOT: .eabi_attribute 27 263; V6-NOT: .eabi_attribute 36 264; V6-NOT: .eabi_attribute 42 265; V6-NOT: .eabi_attribute 44 266; V6-NOT: .eabi_attribute 68 267; V6-NOT: .eabi_attribute 19 268;; The default choice made by llc is for a V6 CPU without an FPU. 269;; This is not an interesting detail, but for such CPUs, the default intention is to use 270;; software floating-point support. The choice is not important for targets without 271;; FPU support! 272; V6: .eabi_attribute 20, 1 273; V6: .eabi_attribute 21, 1 274; V6-NOT: .eabi_attribute 22 275; V6: .eabi_attribute 23, 3 276; V6: .eabi_attribute 24, 1 277; V6: .eabi_attribute 25, 1 278; V6-NOT: .eabi_attribute 28 279; V6: .eabi_attribute 38, 1 280 281; V6-FAST-NOT: .eabi_attribute 19 282;; Despite the V6 CPU having no FPU by default, we chose to flush to 283;; positive zero here. There's no hardware support doing this, but the 284;; fast maths software library might. 285; V6-FAST-NOT: .eabi_attribute 20 286; V6-FAST-NOT: .eabi_attribute 21 287; V6-FAST-NOT: .eabi_attribute 22 288; V6-FAST: .eabi_attribute 23, 1 289 290;; We emit 6, 12 for both v6-M and v6S-M, technically this is incorrect for 291;; V6-M, however we don't model the OS extension so this is fine. 292; V6M: .eabi_attribute 6, 12 293; V6M: .eabi_attribute 7, 77 294; V6M: .eabi_attribute 8, 0 295; V6M: .eabi_attribute 9, 1 296; V6M-NOT: .eabi_attribute 27 297; V6M-NOT: .eabi_attribute 36 298; V6M-NOT: .eabi_attribute 42 299; V6M-NOT: .eabi_attribute 44 300; V6M-NOT: .eabi_attribute 68 301; V6M-NOT: .eabi_attribute 19 302;; The default choice made by llc is for a V6M CPU without an FPU. 303;; This is not an interesting detail, but for such CPUs, the default intention is to use 304;; software floating-point support. The choice is not important for targets without 305;; FPU support! 306; V6M: .eabi_attribute 20, 1 307; V6M: .eabi_attribute 21, 1 308; V6M-NOT: .eabi_attribute 22 309; V6M: .eabi_attribute 23, 3 310; V6M: .eabi_attribute 24, 1 311; V6M: .eabi_attribute 25, 1 312; V6M-NOT: .eabi_attribute 28 313; V6M: .eabi_attribute 38, 1 314 315; V6M-FAST-NOT: .eabi_attribute 19 316;; Despite the V6M CPU having no FPU by default, we chose to flush to 317;; positive zero here. There's no hardware support doing this, but the 318;; fast maths software library might. 319; V6M-FAST-NOT: .eabi_attribute 20 320; V6M-FAST-NOT: .eabi_attribute 21 321; V6M-FAST-NOT: .eabi_attribute 22 322; V6M-FAST: .eabi_attribute 23, 1 323 324; ARM1156T2F-S: .cpu arm1156t2f-s 325; ARM1156T2F-S: .eabi_attribute 6, 8 326; ARM1156T2F-S: .eabi_attribute 8, 1 327; ARM1156T2F-S: .eabi_attribute 9, 2 328; ARM1156T2F-S: .fpu vfpv2 329; ARM1156T2F-S-NOT: .eabi_attribute 27 330; ARM1156T2F-S-NOT: .eabi_attribute 36 331; ARM1156T2F-S-NOT: .eabi_attribute 42 332; ARM1156T2F-S-NOT: .eabi_attribute 44 333; ARM1156T2F-S-NOT: .eabi_attribute 68 334; ARM1156T2F-S-NOT: .eabi_attribute 19 335;; We default to IEEE 754 compliance 336; ARM1156T2F-S: .eabi_attribute 20, 1 337; ARM1156T2F-S: .eabi_attribute 21, 1 338; ARM1156T2F-S-NOT: .eabi_attribute 22 339; ARM1156T2F-S: .eabi_attribute 23, 3 340; ARM1156T2F-S: .eabi_attribute 24, 1 341; ARM1156T2F-S: .eabi_attribute 25, 1 342; ARM1156T2F-S-NOT: .eabi_attribute 28 343; ARM1156T2F-S: .eabi_attribute 38, 1 344 345; ARM1156T2F-S-FAST-NOT: .eabi_attribute 19 346;; V6 cores default to flush to positive zero (value 0). Note that value 2 is also equally 347;; valid for this core, it's an implementation defined question as to which of 0 and 2 you 348;; select. LLVM historically picks 0. 349; ARM1156T2F-S-FAST-NOT: .eabi_attribute 20 350; ARM1156T2F-S-FAST-NOT: .eabi_attribute 21 351; ARM1156T2F-S-FAST-NOT: .eabi_attribute 22 352; ARM1156T2F-S-FAST: .eabi_attribute 23, 1 353 354; V7M: .eabi_attribute 6, 10 355; V7M: .eabi_attribute 7, 77 356; V7M: .eabi_attribute 8, 0 357; V7M: .eabi_attribute 9, 2 358; V7M-NOT: .eabi_attribute 27 359; V7M-NOT: .eabi_attribute 36 360; V7M-NOT: .eabi_attribute 42 361; V7M-NOT: .eabi_attribute 44 362; V7M-NOT: .eabi_attribute 68 363; V7M-NOT: .eabi_attribute 19 364;; The default choice made by llc is for a V7M CPU without an FPU. 365;; This is not an interesting detail, but for such CPUs, the default intention is to use 366;; software floating-point support. The choice is not important for targets without 367;; FPU support! 368; V7M: .eabi_attribute 20, 1 369; V7M: .eabi_attribute 21, 1 370; V7M-NOT: .eabi_attribute 22 371; V7M: .eabi_attribute 23, 3 372; V7M: .eabi_attribute 24, 1 373; V7M: .eabi_attribute 25, 1 374; V7M-NOT: .eabi_attribute 28 375; V7M: .eabi_attribute 38, 1 376 377; V7M-FAST-NOT: .eabi_attribute 19 378;; Despite the V7M CPU having no FPU by default, we chose to flush 379;; preserving sign. This matches what the hardware would do in the 380;; architecture revision were to exist on the current target. 381; V7M-FAST: .eabi_attribute 20, 2 382; V7M-FAST-NOT: .eabi_attribute 21 383; V7M-FAST-NOT: .eabi_attribute 22 384; V7M-FAST: .eabi_attribute 23, 1 385 386; V7: .syntax unified 387; V7: .eabi_attribute 6, 10 388; V7-NOT: .eabi_attribute 27 389; V7-NOT: .eabi_attribute 36 390; V7-NOT: .eabi_attribute 42 391; V7-NOT: .eabi_attribute 44 392; V7-NOT: .eabi_attribute 68 393; V7-NOT: .eabi_attribute 19 394;; In safe-maths mode we default to an IEEE 754 compliant choice. 395; V7: .eabi_attribute 20, 1 396; V7: .eabi_attribute 21, 1 397; V7-NOT: .eabi_attribute 22 398; V7: .eabi_attribute 23, 3 399; V7: .eabi_attribute 24, 1 400; V7: .eabi_attribute 25, 1 401; V7-NOT: .eabi_attribute 28 402; V7: .eabi_attribute 38, 1 403 404; V7-FAST-NOT: .eabi_attribute 19 405;; The default CPU does have an FPU and it must be VFPv3 or better, so it flushes 406;; denormals to zero preserving the sign. 407; V7-FAST: .eabi_attribute 20, 2 408; V7-FAST-NOT: .eabi_attribute 21 409; V7-FAST-NOT: .eabi_attribute 22 410; V7-FAST: .eabi_attribute 23, 1 411 412; V7VE: .syntax unified 413; V7VE: .eabi_attribute 6, 10 @ Tag_CPU_arch 414; V7VE: .eabi_attribute 7, 65 @ Tag_CPU_arch_profile 415; V7VE: .eabi_attribute 8, 1 @ Tag_ARM_ISA_use 416; V7VE: .eabi_attribute 9, 2 @ Tag_THUMB_ISA_use 417; V7VE: .eabi_attribute 42, 1 @ Tag_MPextension_use 418; V7VE: .eabi_attribute 44, 2 @ Tag_DIV_use 419; V7VE: .eabi_attribute 68, 3 @ Tag_Virtualization_use 420; V7VE: .eabi_attribute 17, 1 @ Tag_ABI_PCS_GOT_use 421; V7VE: .eabi_attribute 20, 1 @ Tag_ABI_FP_denormal 422; V7VE: .eabi_attribute 21, 1 @ Tag_ABI_FP_exceptions 423; V7VE: .eabi_attribute 23, 3 @ Tag_ABI_FP_number_model 424; V7VE: .eabi_attribute 24, 1 @ Tag_ABI_align_needed 425; V7VE: .eabi_attribute 25, 1 @ Tag_ABI_align_preserved 426; V7VE: .eabi_attribute 38, 1 @ Tag_ABI_FP_16bit_format 427 428; V8: .syntax unified 429; V8: .eabi_attribute 67, "2.09" 430; V8: .eabi_attribute 6, 14 431; V8-NOT: .eabi_attribute 44 432; V8-NOT: .eabi_attribute 19 433; V8: .eabi_attribute 20, 1 434; V8: .eabi_attribute 21, 1 435; V8-NOT: .eabi_attribute 22 436; V8: .eabi_attribute 23, 3 437 438; V8-FAST-NOT: .eabi_attribute 19 439;; The default does have an FPU, and for V8-A, it flushes preserving sign. 440; V8-FAST: .eabi_attribute 20, 2 441; V8-FAST-NOT: .eabi_attribute 21 442; V8-FAST-NOT: .eabi_attribute 22 443; V8-FAST: .eabi_attribute 23, 1 444 445; Vt8: .syntax unified 446; Vt8: .eabi_attribute 6, 14 447; Vt8-NOT: .eabi_attribute 19 448; Vt8: .eabi_attribute 20, 1 449; Vt8: .eabi_attribute 21, 1 450; Vt8-NOT: .eabi_attribute 22 451; Vt8: .eabi_attribute 23, 3 452 453; V8-FPARMv8: .syntax unified 454; V8-FPARMv8: .eabi_attribute 6, 14 455; V8-FPARMv8: .fpu fp-armv8 456 457; V8-NEON: .syntax unified 458; V8-NEON: .eabi_attribute 6, 14 459; V8-NEON: .fpu neon 460; V8-NEON: .eabi_attribute 12, 3 461 462; V8-FPARMv8-NEON: .syntax unified 463; V8-FPARMv8-NEON: .eabi_attribute 6, 14 464; V8-FPARMv8-NEON: .fpu neon-fp-armv8 465; V8-FPARMv8-NEON: .eabi_attribute 12, 3 466 467; V8-FPARMv8-NEON-CRYPTO: .syntax unified 468; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 6, 14 469; V8-FPARMv8-NEON-CRYPTO: .fpu crypto-neon-fp-armv8 470; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 12, 3 471 472; V8MBASELINE: .syntax unified 473; '6' is Tag_CPU_arch, '16' is ARM v8-M Baseline 474; V8MBASELINE: .eabi_attribute 6, 16 475; '7' is Tag_CPU_arch_profile, '77' is 'M' 476; V8MBASELINE: .eabi_attribute 7, 77 477; '8' is Tag_ARM_ISA_use 478; V8MBASELINE: .eabi_attribute 8, 0 479; '9' is Tag_Thumb_ISA_use 480; V8MBASELINE: .eabi_attribute 9, 3 481 482; V8MMAINLINE: .syntax unified 483; '6' is Tag_CPU_arch, '17' is ARM v8-M Mainline 484; V8MMAINLINE: .eabi_attribute 6, 17 485; V8MMAINLINE: .eabi_attribute 7, 77 486; V8MMAINLINE: .eabi_attribute 8, 0 487; V8MMAINLINE: .eabi_attribute 9, 3 488; V8MMAINLINE_DSP-NOT: .eabi_attribute 46 489 490; V8MMAINLINE_DSP: .syntax unified 491; V8MBASELINE_DSP: .eabi_attribute 6, 17 492; V8MBASELINE_DSP: .eabi_attribute 7, 77 493; V8MMAINLINE_DSP: .eabi_attribute 8, 0 494; V8MMAINLINE_DSP: .eabi_attribute 9, 3 495; V8MMAINLINE_DSP: .eabi_attribute 46, 1 496 497; Tag_CPU_unaligned_access 498; NO-STRICT-ALIGN: .eabi_attribute 34, 1 499; STRICT-ALIGN: .eabi_attribute 34, 0 500 501; Tag_CPU_arch 'ARMv7' 502; CORTEX-A7-CHECK: .eabi_attribute 6, 10 503; CORTEX-A7-NOFPU: .eabi_attribute 6, 10 504 505; CORTEX-A7-FPUV4: .eabi_attribute 6, 10 506 507; Tag_CPU_arch_profile 'A' 508; CORTEX-A7-CHECK: .eabi_attribute 7, 65 509; CORTEX-A7-NOFPU: .eabi_attribute 7, 65 510; CORTEX-A7-FPUV4: .eabi_attribute 7, 65 511 512; Tag_ARM_ISA_use 513; CORTEX-A7-CHECK: .eabi_attribute 8, 1 514; CORTEX-A7-NOFPU: .eabi_attribute 8, 1 515; CORTEX-A7-FPUV4: .eabi_attribute 8, 1 516 517; Tag_THUMB_ISA_use 518; CORTEX-A7-CHECK: .eabi_attribute 9, 2 519; CORTEX-A7-NOFPU: .eabi_attribute 9, 2 520; CORTEX-A7-FPUV4: .eabi_attribute 9, 2 521 522; CORTEX-A7-CHECK: .fpu neon-vfpv4 523; CORTEX-A7-NOFPU-NOT: .fpu 524; CORTEX-A7-FPUV4: .fpu vfpv4 525 526; CORTEX-A7-CHECK-NOT: .eabi_attribute 19 527 528; Tag_FP_HP_extension 529; CORTEX-A7-CHECK: .eabi_attribute 36, 1 530; CORTEX-A7-NOFPU-NOT: .eabi_attribute 36 531; CORTEX-A7-FPUV4: .eabi_attribute 36, 1 532 533; Tag_MPextension_use 534; CORTEX-A7-CHECK: .eabi_attribute 42, 1 535; CORTEX-A7-NOFPU: .eabi_attribute 42, 1 536; CORTEX-A7-FPUV4: .eabi_attribute 42, 1 537 538; Tag_DIV_use 539; CORTEX-A7-CHECK: .eabi_attribute 44, 2 540; CORTEX-A7-NOFPU: .eabi_attribute 44, 2 541; CORTEX-A7-FPUV4: .eabi_attribute 44, 2 542 543; Tag_DSP_extension 544; CORTEX-A7-CHECK-NOT: .eabi_attribute 46 545 546; Tag_Virtualization_use 547; CORTEX-A7-CHECK: .eabi_attribute 68, 3 548; CORTEX-A7-NOFPU: .eabi_attribute 68, 3 549; CORTEX-A7-FPUV4: .eabi_attribute 68, 3 550 551; Tag_ABI_FP_denormal 552;; We default to IEEE 754 compliance 553; CORTEX-A7-CHECK: .eabi_attribute 20, 1 554;; The A7 has VFPv3 support by default, so flush preserving sign. 555; CORTEX-A7-CHECK-FAST: .eabi_attribute 20, 2 556; CORTEX-A7-NOFPU: .eabi_attribute 20, 1 557;; Despite there being no FPU, we chose to flush to zero preserving 558;; sign. This matches what the hardware would do for this architecture 559;; revision. 560; CORTEX-A7-NOFPU-FAST: .eabi_attribute 20, 2 561; CORTEX-A7-FPUV4: .eabi_attribute 20, 1 562;; The VFPv4 FPU flushes preserving sign. 563; CORTEX-A7-FPUV4-FAST: .eabi_attribute 20, 2 564 565; Tag_ABI_FP_exceptions 566; CORTEX-A7-CHECK: .eabi_attribute 21, 1 567; CORTEX-A7-NOFPU: .eabi_attribute 21, 1 568; CORTEX-A7-FPUV4: .eabi_attribute 21, 1 569 570; Tag_ABI_FP_user_exceptions 571; CORTEX-A7-CHECK-NOT: .eabi_attribute 22 572; CORTEX-A7-NOFPU-NOT: .eabi_attribute 22 573; CORTEX-A7-FPUV4-NOT: .eabi_attribute 22 574 575; Tag_ABI_FP_number_model 576; CORTEX-A7-CHECK: .eabi_attribute 23, 3 577; CORTEX-A7-NOFPU: .eabi_attribute 23, 3 578; CORTEX-A7-FPUV4: .eabi_attribute 23, 3 579 580; Tag_ABI_align_needed 581; CORTEX-A7-CHECK: .eabi_attribute 24, 1 582; CORTEX-A7-NOFPU: .eabi_attribute 24, 1 583; CORTEX-A7-FPUV4: .eabi_attribute 24, 1 584 585; Tag_ABI_align_preserved 586; CORTEX-A7-CHECK: .eabi_attribute 25, 1 587; CORTEX-A7-NOFPU: .eabi_attribute 25, 1 588; CORTEX-A7-FPUV4: .eabi_attribute 25, 1 589 590; Tag_FP_16bit_format 591; CORTEX-A7-CHECK: .eabi_attribute 38, 1 592; CORTEX-A7-NOFPU: .eabi_attribute 38, 1 593; CORTEX-A7-FPUV4: .eabi_attribute 38, 1 594 595; CORTEX-A5-DEFAULT: .cpu cortex-a5 596; CORTEX-A5-DEFAULT: .eabi_attribute 6, 10 597; CORTEX-A5-DEFAULT: .eabi_attribute 7, 65 598; CORTEX-A5-DEFAULT: .eabi_attribute 8, 1 599; CORTEX-A5-DEFAULT: .eabi_attribute 9, 2 600; CORTEX-A5-DEFAULT: .fpu neon-vfpv4 601; CORTEX-A5-DEFAULT: .eabi_attribute 42, 1 602; CORTEX-A5-DEFAULT-NOT: .eabi_attribute 44 603; CORTEX-A5-DEFAULT: .eabi_attribute 68, 1 604; CORTEX-A5-NOT: .eabi_attribute 19 605;; We default to IEEE 754 compliance 606; CORTEX-A5-DEFAULT: .eabi_attribute 20, 1 607; CORTEX-A5-DEFAULT: .eabi_attribute 21, 1 608; CORTEX-A5-DEFAULT-NOT: .eabi_attribute 22 609; CORTEX-A5-DEFAULT: .eabi_attribute 23, 3 610; CORTEX-A5-DEFAULT: .eabi_attribute 24, 1 611; CORTEX-A5-DEFAULT: .eabi_attribute 25, 1 612 613; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 19 614;; The A5 defaults to a VFPv4 FPU, so it flushed preserving the sign when -ffast-math 615;; is given. 616; CORTEX-A5-DEFAULT-FAST: .eabi_attribute 20, 2 617; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 21 618; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 22 619; CORTEX-A5-DEFAULT-FAST: .eabi_attribute 23, 1 620 621; CORTEX-A5-NONEON: .cpu cortex-a5 622; CORTEX-A5-NONEON: .eabi_attribute 6, 10 623; CORTEX-A5-NONEON: .eabi_attribute 7, 65 624; CORTEX-A5-NONEON: .eabi_attribute 8, 1 625; CORTEX-A5-NONEON: .eabi_attribute 9, 2 626; CORTEX-A5-NONEON: .fpu vfpv4-d16 627; CORTEX-A5-NONEON: .eabi_attribute 42, 1 628; CORTEX-A5-NONEON: .eabi_attribute 68, 1 629;; We default to IEEE 754 compliance 630; CORTEX-A5-NONEON: .eabi_attribute 20, 1 631; CORTEX-A5-NONEON: .eabi_attribute 21, 1 632; CORTEX-A5-NONEON-NOT: .eabi_attribute 22 633; CORTEX-A5-NONEON: .eabi_attribute 23, 3 634; CORTEX-A5-NONEON: .eabi_attribute 24, 1 635; CORTEX-A5-NONEON: .eabi_attribute 25, 1 636 637; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 19 638;; The A5 defaults to a VFPv4 FPU, so it flushed preserving sign when -ffast-math 639;; is given. 640; CORTEX-A5-NONEON-FAST: .eabi_attribute 20, 2 641; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 21 642; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 22 643; CORTEX-A5-NONEON-FAST: .eabi_attribute 23, 1 644 645; CORTEX-A5-NOFPU: .cpu cortex-a5 646; CORTEX-A5-NOFPU: .eabi_attribute 6, 10 647; CORTEX-A5-NOFPU: .eabi_attribute 7, 65 648; CORTEX-A5-NOFPU: .eabi_attribute 8, 1 649; CORTEX-A5-NOFPU: .eabi_attribute 9, 2 650; CORTEX-A5-NOFPU-NOT: .fpu 651; CORTEX-A5-NOFPU: .eabi_attribute 42, 1 652; CORTEX-A5-NOFPU: .eabi_attribute 68, 1 653; CORTEX-A5-NOFPU-NOT: .eabi_attribute 19 654;; We default to IEEE 754 compliance 655; CORTEX-A5-NOFPU: .eabi_attribute 20, 1 656; CORTEX-A5-NOFPU: .eabi_attribute 21, 1 657; CORTEX-A5-NOFPU-NOT: .eabi_attribute 22 658; CORTEX-A5-NOFPU: .eabi_attribute 23, 3 659; CORTEX-A5-NOFPU: .eabi_attribute 24, 1 660; CORTEX-A5-NOFPU: .eabi_attribute 25, 1 661 662; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 19 663;; Despite there being no FPU, we chose to flush to zero preserving 664;; sign. This matches what the hardware would do for this architecture 665;; revision. 666; CORTEX-A5-NOFPU-FAST: .eabi_attribute 20, 2 667; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 21 668; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 22 669; CORTEX-A5-NOFPU-FAST: .eabi_attribute 23, 1 670 671; CORTEX-A8-SOFT: .cpu cortex-a8 672; CORTEX-A8-SOFT: .eabi_attribute 6, 10 673; CORTEX-A8-SOFT: .eabi_attribute 7, 65 674; CORTEX-A8-SOFT: .eabi_attribute 8, 1 675; CORTEX-A8-SOFT: .eabi_attribute 9, 2 676; CORTEX-A8-SOFT: .fpu neon 677; CORTEX-A8-SOFT-NOT: .eabi_attribute 27 678; CORTEX-A8-SOFT-NOT: .eabi_attribute 36, 1 679; CORTEX-A8-SOFT-NOT: .eabi_attribute 42, 1 680; CORTEX-A8-SOFT-NOT: .eabi_attribute 44 681; CORTEX-A8-SOFT: .eabi_attribute 68, 1 682; CORTEX-A8-SOFT-NOT: .eabi_attribute 19 683;; We default to IEEE 754 compliance 684; CORTEX-A8-SOFT: .eabi_attribute 20, 1 685; CORTEX-A8-SOFT: .eabi_attribute 21, 1 686; CORTEX-A8-SOFT-NOT: .eabi_attribute 22 687; CORTEX-A8-SOFT: .eabi_attribute 23, 3 688; CORTEX-A8-SOFT: .eabi_attribute 24, 1 689; CORTEX-A8-SOFT: .eabi_attribute 25, 1 690; CORTEX-A8-SOFT-NOT: .eabi_attribute 28 691; CORTEX-A8-SOFT: .eabi_attribute 38, 1 692 693; CORTEX-A9-SOFT: .cpu cortex-a9 694; CORTEX-A9-SOFT: .eabi_attribute 6, 10 695; CORTEX-A9-SOFT: .eabi_attribute 7, 65 696; CORTEX-A9-SOFT: .eabi_attribute 8, 1 697; CORTEX-A9-SOFT: .eabi_attribute 9, 2 698; CORTEX-A9-SOFT: .fpu neon 699; CORTEX-A9-SOFT-NOT: .eabi_attribute 27 700; CORTEX-A9-SOFT: .eabi_attribute 36, 1 701; CORTEX-A9-SOFT: .eabi_attribute 42, 1 702; CORTEX-A9-SOFT-NOT: .eabi_attribute 44 703; CORTEX-A9-SOFT: .eabi_attribute 68, 1 704; CORTEX-A9-SOFT-NOT: .eabi_attribute 19 705;; We default to IEEE 754 compliance 706; CORTEX-A9-SOFT: .eabi_attribute 20, 1 707; CORTEX-A9-SOFT: .eabi_attribute 21, 1 708; CORTEX-A9-SOFT-NOT: .eabi_attribute 22 709; CORTEX-A9-SOFT: .eabi_attribute 23, 3 710; CORTEX-A9-SOFT: .eabi_attribute 24, 1 711; CORTEX-A9-SOFT: .eabi_attribute 25, 1 712; CORTEX-A9-SOFT-NOT: .eabi_attribute 28 713; CORTEX-A9-SOFT: .eabi_attribute 38, 1 714 715; CORTEX-A8-SOFT-FAST-NOT: .eabi_attribute 19 716; CORTEX-A9-SOFT-FAST-NOT: .eabi_attribute 19 717;; The A9 defaults to a VFPv3 FPU, so it flushes preserving the sign when 718;; -ffast-math is specified. 719; CORTEX-A8-SOFT-FAST: .eabi_attribute 20, 2 720; CORTEX-A9-SOFT-FAST: .eabi_attribute 20, 2 721; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 21 722; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 22 723; CORTEX-A5-SOFT-FAST: .eabi_attribute 23, 1 724 725; CORTEX-A8-HARD: .cpu cortex-a8 726; CORTEX-A8-HARD: .eabi_attribute 6, 10 727; CORTEX-A8-HARD: .eabi_attribute 7, 65 728; CORTEX-A8-HARD: .eabi_attribute 8, 1 729; CORTEX-A8-HARD: .eabi_attribute 9, 2 730; CORTEX-A8-HARD: .fpu neon 731; CORTEX-A8-HARD-NOT: .eabi_attribute 27 732; CORTEX-A8-HARD-NOT: .eabi_attribute 36, 1 733; CORTEX-A8-HARD-NOT: .eabi_attribute 42, 1 734; CORTEX-A8-HARD: .eabi_attribute 68, 1 735; CORTEX-A8-HARD-NOT: .eabi_attribute 19 736;; We default to IEEE 754 compliance 737; CORTEX-A8-HARD: .eabi_attribute 20, 1 738; CORTEX-A8-HARD: .eabi_attribute 21, 1 739; CORTEX-A8-HARD-NOT: .eabi_attribute 22 740; CORTEX-A8-HARD: .eabi_attribute 23, 3 741; CORTEX-A8-HARD: .eabi_attribute 24, 1 742; CORTEX-A8-HARD: .eabi_attribute 25, 1 743; CORTEX-A8-HARD: .eabi_attribute 28, 1 744; CORTEX-A8-HARD: .eabi_attribute 38, 1 745 746 747 748; CORTEX-A9-HARD: .cpu cortex-a9 749; CORTEX-A9-HARD: .eabi_attribute 6, 10 750; CORTEX-A9-HARD: .eabi_attribute 7, 65 751; CORTEX-A9-HARD: .eabi_attribute 8, 1 752; CORTEX-A9-HARD: .eabi_attribute 9, 2 753; CORTEX-A9-HARD: .fpu neon 754; CORTEX-A9-HARD-NOT: .eabi_attribute 27 755; CORTEX-A9-HARD: .eabi_attribute 36, 1 756; CORTEX-A9-HARD: .eabi_attribute 42, 1 757; CORTEX-A9-HARD: .eabi_attribute 68, 1 758; CORTEX-A9-HARD-NOT: .eabi_attribute 19 759;; We default to IEEE 754 compliance 760; CORTEX-A9-HARD: .eabi_attribute 20, 1 761; CORTEX-A9-HARD: .eabi_attribute 21, 1 762; CORTEX-A9-HARD-NOT: .eabi_attribute 22 763; CORTEX-A9-HARD: .eabi_attribute 23, 3 764; CORTEX-A9-HARD: .eabi_attribute 24, 1 765; CORTEX-A9-HARD: .eabi_attribute 25, 1 766; CORTEX-A9-HARD: .eabi_attribute 28, 1 767; CORTEX-A9-HARD: .eabi_attribute 38, 1 768 769; CORTEX-A8-HARD-FAST-NOT: .eabi_attribute 19 770;; The A8 defaults to a VFPv3 FPU, so it flushes preserving the sign when 771;; -ffast-math is specified. 772; CORTEX-A8-HARD-FAST: .eabi_attribute 20, 2 773; CORTEX-A8-HARD-FAST-NOT: .eabi_attribute 21 774; CORTEX-A8-HARD-FAST-NOT: .eabi_attribute 22 775; CORTEX-A8-HARD-FAST: .eabi_attribute 23, 1 776 777; CORTEX-A9-HARD-FAST-NOT: .eabi_attribute 19 778;; The A9 defaults to a VFPv3 FPU, so it flushes preserving the sign when 779;; -ffast-math is specified. 780; CORTEX-A9-HARD-FAST: .eabi_attribute 20, 2 781; CORTEX-A9-HARD-FAST-NOT: .eabi_attribute 21 782; CORTEX-A9-HARD-FAST-NOT: .eabi_attribute 22 783; CORTEX-A9-HARD-FAST: .eabi_attribute 23, 1 784 785; CORTEX-A12-DEFAULT: .cpu cortex-a12 786; CORTEX-A12-DEFAULT: .eabi_attribute 6, 10 787; CORTEX-A12-DEFAULT: .eabi_attribute 7, 65 788; CORTEX-A12-DEFAULT: .eabi_attribute 8, 1 789; CORTEX-A12-DEFAULT: .eabi_attribute 9, 2 790; CORTEX-A12-DEFAULT: .fpu neon-vfpv4 791; CORTEX-A12-DEFAULT: .eabi_attribute 42, 1 792; CORTEX-A12-DEFAULT: .eabi_attribute 44, 2 793; CORTEX-A12-DEFAULT: .eabi_attribute 68, 3 794; CORTEX-A12-DEFAULT-NOT: .eabi_attribute 19 795;; We default to IEEE 754 compliance 796; CORTEX-A12-DEFAULT: .eabi_attribute 20, 1 797; CORTEX-A12-DEFAULT: .eabi_attribute 21, 1 798; CORTEX-A12-DEFAULT-NOT: .eabi_attribute 22 799; CORTEX-A12-DEFAULT: .eabi_attribute 23, 3 800; CORTEX-A12-DEFAULT: .eabi_attribute 24, 1 801; CORTEX-A12-DEFAULT: .eabi_attribute 25, 1 802 803; CORTEX-A12-DEFAULT-FAST-NOT: .eabi_attribute 19 804;; The A12 defaults to a VFPv3 FPU, so it flushes preserving the sign when 805;; -ffast-math is specified. 806; CORTEX-A12-DEFAULT-FAST: .eabi_attribute 20, 2 807; CORTEX-A12-HARD-FAST-NOT: .eabi_attribute 21 808; CORTEX-A12-HARD-FAST-NOT: .eabi_attribute 22 809; CORTEX-A12-HARD-FAST: .eabi_attribute 23, 1 810 811; CORTEX-A12-NOFPU: .cpu cortex-a12 812; CORTEX-A12-NOFPU: .eabi_attribute 6, 10 813; CORTEX-A12-NOFPU: .eabi_attribute 7, 65 814; CORTEX-A12-NOFPU: .eabi_attribute 8, 1 815; CORTEX-A12-NOFPU: .eabi_attribute 9, 2 816; CORTEX-A12-NOFPU-NOT: .fpu 817; CORTEX-A12-NOFPU: .eabi_attribute 42, 1 818; CORTEX-A12-NOFPU: .eabi_attribute 44, 2 819; CORTEX-A12-NOFPU: .eabi_attribute 68, 3 820; CORTEX-A12-NOFPU-NOT: .eabi_attribute 19 821;; We default to IEEE 754 compliance 822; CORTEX-A12-NOFPU: .eabi_attribute 20, 1 823; CORTEX-A12-NOFPU: .eabi_attribute 21, 1 824; CORTEX-A12-NOFPU-NOT: .eabi_attribute 22 825; CORTEX-A12-NOFPU: .eabi_attribute 23, 3 826; CORTEX-A12-NOFPU: .eabi_attribute 24, 1 827; CORTEX-A12-NOFPU: .eabi_attribute 25, 1 828 829; CORTEX-A12-NOFPU-FAST-NOT: .eabi_attribute 19 830;; Despite there being no FPU, we chose to flush to zero preserving 831;; sign. This matches what the hardware would do for this architecture 832;; revision. 833; CORTEX-A12-NOFPU-FAST: .eabi_attribute 20, 2 834; CORTEX-A12-NOFPU-FAST-NOT: .eabi_attribute 21 835; CORTEX-A12-NOFPU-FAST-NOT: .eabi_attribute 22 836; CORTEX-A12-NOFPU-FAST: .eabi_attribute 23, 1 837 838; CORTEX-A15: .cpu cortex-a15 839; CORTEX-A15: .eabi_attribute 6, 10 840; CORTEX-A15: .eabi_attribute 7, 65 841; CORTEX-A15: .eabi_attribute 8, 1 842; CORTEX-A15: .eabi_attribute 9, 2 843; CORTEX-A15: .fpu neon-vfpv4 844; CORTEX-A15-NOT: .eabi_attribute 27 845; CORTEX-A15: .eabi_attribute 36, 1 846; CORTEX-A15: .eabi_attribute 42, 1 847; CORTEX-A15: .eabi_attribute 44, 2 848; CORTEX-A15: .eabi_attribute 68, 3 849; CORTEX-A15-NOT: .eabi_attribute 19 850;; We default to IEEE 754 compliance 851; CORTEX-A15: .eabi_attribute 20, 1 852; CORTEX-A15: .eabi_attribute 21, 1 853; CORTEX-A15-NOT: .eabi_attribute 22 854; CORTEX-A15: .eabi_attribute 23, 3 855; CORTEX-A15: .eabi_attribute 24, 1 856; CORTEX-A15: .eabi_attribute 25, 1 857; CORTEX-A15-NOT: .eabi_attribute 28 858; CORTEX-A15: .eabi_attribute 38, 1 859 860; CORTEX-A15-FAST-NOT: .eabi_attribute 19 861;; The A15 defaults to a VFPv3 FPU, so it flushes preserving the sign when 862;; -ffast-math is specified. 863; CORTEX-A15-FAST: .eabi_attribute 20, 2 864; CORTEX-A15-FAST-NOT: .eabi_attribute 21 865; CORTEX-A15-FAST-NOT: .eabi_attribute 22 866; CORTEX-A15-FAST: .eabi_attribute 23, 1 867 868; CORTEX-A17-DEFAULT: .cpu cortex-a17 869; CORTEX-A17-DEFAULT: .eabi_attribute 6, 10 870; CORTEX-A17-DEFAULT: .eabi_attribute 7, 65 871; CORTEX-A17-DEFAULT: .eabi_attribute 8, 1 872; CORTEX-A17-DEFAULT: .eabi_attribute 9, 2 873; CORTEX-A17-DEFAULT: .fpu neon-vfpv4 874; CORTEX-A17-DEFAULT: .eabi_attribute 42, 1 875; CORTEX-A17-DEFAULT: .eabi_attribute 44, 2 876; CORTEX-A17-DEFAULT: .eabi_attribute 68, 3 877; CORTEX-A17-DEFAULT-NOT: .eabi_attribute 19 878;; We default to IEEE 754 compliance 879; CORTEX-A17-DEFAULT: .eabi_attribute 20, 1 880; CORTEX-A17-DEFAULT: .eabi_attribute 21, 1 881; CORTEX-A17-DEFAULT-NOT: .eabi_attribute 22 882; CORTEX-A17-DEFAULT: .eabi_attribute 23, 3 883; CORTEX-A17-DEFAULT: .eabi_attribute 24, 1 884; CORTEX-A17-DEFAULT: .eabi_attribute 25, 1 885 886; CORTEX-A17-FAST-NOT: .eabi_attribute 19 887;; The A17 defaults to a VFPv3 FPU, so it flushes preserving the sign when 888;; -ffast-math is specified. 889; CORTEX-A17-FAST: .eabi_attribute 20, 2 890; CORTEX-A17-FAST-NOT: .eabi_attribute 21 891; CORTEX-A17-FAST-NOT: .eabi_attribute 22 892; CORTEX-A17-FAST: .eabi_attribute 23, 1 893 894; CORTEX-A17-NOFPU: .cpu cortex-a17 895; CORTEX-A17-NOFPU: .eabi_attribute 6, 10 896; CORTEX-A17-NOFPU: .eabi_attribute 7, 65 897; CORTEX-A17-NOFPU: .eabi_attribute 8, 1 898; CORTEX-A17-NOFPU: .eabi_attribute 9, 2 899; CORTEX-A17-NOFPU-NOT: .fpu 900; CORTEX-A17-NOFPU: .eabi_attribute 42, 1 901; CORTEX-A17-NOFPU: .eabi_attribute 44, 2 902; CORTEX-A17-NOFPU: .eabi_attribute 68, 3 903; CORTEX-A17-NOFPU-NOT: .eabi_attribute 19 904;; We default to IEEE 754 compliance 905; CORTEX-A17-NOFPU: .eabi_attribute 20, 1 906; CORTEX-A17-NOFPU: .eabi_attribute 21, 1 907; CORTEX-A17-NOFPU-NOT: .eabi_attribute 22 908; CORTEX-A17-NOFPU: .eabi_attribute 23, 3 909; CORTEX-A17-NOFPU: .eabi_attribute 24, 1 910; CORTEX-A17-NOFPU: .eabi_attribute 25, 1 911 912; CORTEX-A17-NOFPU-NOT: .eabi_attribute 19 913;; Despite there being no FPU, we chose to flush to zero preserving 914;; sign. This matches what the hardware would do for this architecture 915;; revision. 916; CORTEX-A17-NOFPU-FAST: .eabi_attribute 20, 2 917; CORTEX-A17-NOFPU-FAST-NOT: .eabi_attribute 21 918; CORTEX-A17-NOFPU-FAST-NOT: .eabi_attribute 22 919; CORTEX-A17-NOFPU-FAST: .eabi_attribute 23, 1 920 921; Test flags -enable-no-trapping-fp-math and -denormal-fp-math: 922; NO-TRAPPING-MATH: .eabi_attribute 21, 0 923; DENORMAL-IEEE: .eabi_attribute 20, 1 924; DENORMAL-PRESERVE-SIGN: .eabi_attribute 20, 2 925; DENORMAL-POSITIVE-ZERO: .eabi_attribute 20, 0 926 927; CORTEX-M0: .cpu cortex-m0 928; CORTEX-M0: .eabi_attribute 6, 12 929; CORTEX-M0: .eabi_attribute 7, 77 930; CORTEX-M0: .eabi_attribute 8, 0 931; CORTEX-M0: .eabi_attribute 9, 1 932; CORTEX-M0-NOT: .eabi_attribute 27 933; CORTEX-M0-NOT: .eabi_attribute 36 934; CORTEX-M0: .eabi_attribute 34, 0 935; CORTEX-M0-NOT: .eabi_attribute 42 936; CORTEX-M0-NOT: .eabi_attribute 44 937; CORTEX-M0-NOT: .eabi_attribute 68 938; CORTEX-M0-NOT: .eabi_attribute 19 939;; We default to IEEE 754 compliance 940; CORTEX-M0: .eabi_attribute 20, 1 941; CORTEX-M0: .eabi_attribute 21, 1 942; CORTEX-M0-NOT: .eabi_attribute 22 943; CORTEX-M0: .eabi_attribute 23, 3 944; CORTEX-M0: .eabi_attribute 24, 1 945; CORTEX-M0: .eabi_attribute 25, 1 946; CORTEX-M0-NOT: .eabi_attribute 28 947; CORTEX-M0: .eabi_attribute 38, 1 948 949; CORTEX-M0-FAST-NOT: .eabi_attribute 19 950;; Despite the M0 CPU having no FPU in this scenario, we chose to 951;; flush to positive zero here. There's no hardware support doing 952;; this, but the fast maths software library might and such behaviour 953;; would match hardware support on this architecture revision if it 954;; existed. 955; CORTEX-M0-FAST-NOT: .eabi_attribute 20 956; CORTEX-M0-FAST-NOT: .eabi_attribute 21 957; CORTEX-M0-FAST-NOT: .eabi_attribute 22 958; CORTEX-M0-FAST: .eabi_attribute 23, 1 959 960; CORTEX-M0PLUS: .cpu cortex-m0plus 961; CORTEX-M0PLUS: .eabi_attribute 6, 12 962; CORTEX-M0PLUS: .eabi_attribute 7, 77 963; CORTEX-M0PLUS: .eabi_attribute 8, 0 964; CORTEX-M0PLUS: .eabi_attribute 9, 1 965; CORTEX-M0PLUS-NOT: .eabi_attribute 27 966; CORTEX-M0PLUS-NOT: .eabi_attribute 36 967; CORTEX-M0PLUS-NOT: .eabi_attribute 42 968; CORTEX-M0PLUS-NOT: .eabi_attribute 44 969; CORTEX-M0PLUS-NOT: .eabi_attribute 68 970; CORTEX-M0PLUS-NOT: .eabi_attribute 19 971;; We default to IEEE 754 compliance 972; CORTEX-M0PLUS: .eabi_attribute 20, 1 973; CORTEX-M0PLUS: .eabi_attribute 21, 1 974; CORTEX-M0PLUS-NOT: .eabi_attribute 22 975; CORTEX-M0PLUS: .eabi_attribute 23, 3 976; CORTEX-M0PLUS: .eabi_attribute 24, 1 977; CORTEX-M0PLUS: .eabi_attribute 25, 1 978; CORTEX-M0PLUS-NOT: .eabi_attribute 28 979; CORTEX-M0PLUS: .eabi_attribute 38, 1 980 981; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 19 982;; Despite the M0+ CPU having no FPU in this scenario, we chose to 983;; flush to positive zero here. There's no hardware support doing 984;; this, but the fast maths software library might and such behaviour 985;; would match hardware support on this architecture revision if it 986;; existed. 987; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 20 988; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 21 989; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 22 990; CORTEX-M0PLUS-FAST: .eabi_attribute 23, 1 991 992; CORTEX-M1: .cpu cortex-m1 993; CORTEX-M1: .eabi_attribute 6, 12 994; CORTEX-M1: .eabi_attribute 7, 77 995; CORTEX-M1: .eabi_attribute 8, 0 996; CORTEX-M1: .eabi_attribute 9, 1 997; CORTEX-M1-NOT: .eabi_attribute 27 998; CORTEX-M1-NOT: .eabi_attribute 36 999; CORTEX-M1-NOT: .eabi_attribute 42 1000; CORTEX-M1-NOT: .eabi_attribute 44 1001; CORTEX-M1-NOT: .eabi_attribute 68 1002; CORTEX-M1-NOT: .eabi_attribute 19 1003;; We default to IEEE 754 compliance 1004; CORTEX-M1: .eabi_attribute 20, 1 1005; CORTEX-M1: .eabi_attribute 21, 1 1006; CORTEX-M1-NOT: .eabi_attribute 22 1007; CORTEX-M1: .eabi_attribute 23, 3 1008; CORTEX-M1: .eabi_attribute 24, 1 1009; CORTEX-M1: .eabi_attribute 25, 1 1010; CORTEX-M1-NOT: .eabi_attribute 28 1011; CORTEX-M1: .eabi_attribute 38, 1 1012 1013; CORTEX-M1-FAST-NOT: .eabi_attribute 19 1014;; Despite the M1 CPU having no FPU in this scenario, we chose to 1015;; flush to positive zero here. There's no hardware support doing 1016;; this, but the fast maths software library might and such behaviour 1017;; would match hardware support on this architecture revision if it 1018;; existed. 1019; CORTEX-M1-FAST-NOT: .eabi_attribute 20 1020; CORTEX-M1-FAST-NOT: .eabi_attribute 21 1021; CORTEX-M1-FAST-NOT: .eabi_attribute 22 1022; CORTEX-M1-FAST: .eabi_attribute 23, 1 1023 1024; SC000: .cpu sc000 1025; SC000: .eabi_attribute 6, 12 1026; SC000: .eabi_attribute 7, 77 1027; SC000: .eabi_attribute 8, 0 1028; SC000: .eabi_attribute 9, 1 1029; SC000-NOT: .eabi_attribute 27 1030; SC000-NOT: .eabi_attribute 42 1031; SC000-NOT: .eabi_attribute 44 1032; SC000-NOT: .eabi_attribute 68 1033; SC000-NOT: .eabi_attribute 19 1034;; We default to IEEE 754 compliance 1035; SC000: .eabi_attribute 20, 1 1036; SC000: .eabi_attribute 21, 1 1037; SC000-NOT: .eabi_attribute 22 1038; SC000: .eabi_attribute 23, 3 1039; SC000: .eabi_attribute 24, 1 1040; SC000: .eabi_attribute 25, 1 1041; SC000-NOT: .eabi_attribute 28 1042; SC000: .eabi_attribute 38, 1 1043 1044; SC000-FAST-NOT: .eabi_attribute 19 1045;; Despite the SC000 CPU having no FPU in this scenario, we chose to 1046;; flush to positive zero here. There's no hardware support doing 1047;; this, but the fast maths software library might and such behaviour 1048;; would match hardware support on this architecture revision if it 1049;; existed. 1050; SC000-FAST-NOT: .eabi_attribute 20 1051; SC000-FAST-NOT: .eabi_attribute 21 1052; SC000-FAST-NOT: .eabi_attribute 22 1053; SC000-FAST: .eabi_attribute 23, 1 1054 1055; CORTEX-M3: .cpu cortex-m3 1056; CORTEX-M3: .eabi_attribute 6, 10 1057; CORTEX-M3: .eabi_attribute 7, 77 1058; CORTEX-M3: .eabi_attribute 8, 0 1059; CORTEX-M3: .eabi_attribute 9, 2 1060; CORTEX-M3-NOT: .eabi_attribute 27 1061; CORTEX-M3-NOT: .eabi_attribute 36 1062; CORTEX-M3-NOT: .eabi_attribute 42 1063; CORTEX-M3-NOT: .eabi_attribute 44 1064; CORTEX-M3-NOT: .eabi_attribute 68 1065; CORTEX-M3-NOT: .eabi_attribute 19 1066;; We default to IEEE 754 compliance 1067; CORTEX-M3: .eabi_attribute 20, 1 1068; CORTEX-M3: .eabi_attribute 21, 1 1069; CORTEX-M3-NOT: .eabi_attribute 22 1070; CORTEX-M3: .eabi_attribute 23, 3 1071; CORTEX-M3: .eabi_attribute 24, 1 1072; CORTEX-M3: .eabi_attribute 25, 1 1073; CORTEX-M3-NOT: .eabi_attribute 28 1074; CORTEX-M3: .eabi_attribute 38, 1 1075 1076; CORTEX-M3-FAST-NOT: .eabi_attribute 19 1077;; Despite there being no FPU, we chose to flush to zero preserving 1078;; sign. This matches what the hardware would do for this architecture 1079;; revision. 1080; CORTEX-M3-FAST: .eabi_attribute 20, 2 1081; CORTEX-M3-FAST-NOT: .eabi_attribute 21 1082; CORTEX-M3-FAST-NOT: .eabi_attribute 22 1083; CORTEX-M3-FAST: .eabi_attribute 23, 1 1084 1085; SC300: .cpu sc300 1086; SC300: .eabi_attribute 6, 10 1087; SC300: .eabi_attribute 7, 77 1088; SC300: .eabi_attribute 8, 0 1089; SC300: .eabi_attribute 9, 2 1090; SC300-NOT: .eabi_attribute 27 1091; SC300-NOT: .eabi_attribute 36 1092; SC300-NOT: .eabi_attribute 42 1093; SC300-NOT: .eabi_attribute 44 1094; SC300-NOT: .eabi_attribute 68 1095; SC300-NOT: .eabi_attribute 19 1096;; We default to IEEE 754 compliance 1097; SC300: .eabi_attribute 20, 1 1098; SC300: .eabi_attribute 21, 1 1099; SC300-NOT: .eabi_attribute 22 1100; SC300: .eabi_attribute 23, 3 1101; SC300: .eabi_attribute 24, 1 1102; SC300: .eabi_attribute 25, 1 1103; SC300-NOT: .eabi_attribute 28 1104; SC300: .eabi_attribute 38, 1 1105 1106; SC300-FAST-NOT: .eabi_attribute 19 1107;; Despite there being no FPU, we chose to flush to zero preserving 1108;; sign. This matches what the hardware would do for this architecture 1109;; revision. 1110; SC300-FAST: .eabi_attribute 20, 2 1111; SC300-FAST-NOT: .eabi_attribute 21 1112; SC300-FAST-NOT: .eabi_attribute 22 1113; SC300-FAST: .eabi_attribute 23, 1 1114 1115; CORTEX-M4-SOFT: .cpu cortex-m4 1116; CORTEX-M4-SOFT: .eabi_attribute 6, 13 1117; CORTEX-M4-SOFT: .eabi_attribute 7, 77 1118; CORTEX-M4-SOFT: .eabi_attribute 8, 0 1119; CORTEX-M4-SOFT: .eabi_attribute 9, 2 1120; CORTEX-M4-SOFT: .fpu fpv4-sp-d16 1121; CORTEX-M4-SOFT: .eabi_attribute 27, 1 1122; CORTEX-M4-SOFT: .eabi_attribute 36, 1 1123; CORTEX-M4-SOFT-NOT: .eabi_attribute 42 1124; CORTEX-M4-SOFT-NOT: .eabi_attribute 44 1125; CORTEX-M4-SOFT-NOT: .eabi_attribute 68 1126; CORTEX-M4-SOFT-NOT: .eabi_attribute 19 1127;; We default to IEEE 754 compliance 1128; CORTEX-M4-SOFT: .eabi_attribute 20, 1 1129; CORTEX-M4-SOFT: .eabi_attribute 21, 1 1130; CORTEX-M4-SOFT-NOT: .eabi_attribute 22 1131; CORTEX-M4-SOFT: .eabi_attribute 23, 3 1132; CORTEX-M4-SOFT: .eabi_attribute 24, 1 1133; CORTEX-M4-SOFT: .eabi_attribute 25, 1 1134; CORTEX-M4-SOFT-NOT: .eabi_attribute 28 1135; CORTEX-M4-SOFT: .eabi_attribute 38, 1 1136 1137; CORTEX-M4-SOFT-FAST-NOT: .eabi_attribute 19 1138;; The M4 defaults to a VFPv4 FPU, so it flushes preserving the sign when 1139;; -ffast-math is specified. 1140; CORTEX-M4-SOFT-FAST: .eabi_attribute 20, 2 1141; CORTEX-M4-SOFT-FAST-NOT: .eabi_attribute 21 1142; CORTEX-M4-SOFT-FAST-NOT: .eabi_attribute 22 1143; CORTEX-M4-SOFT-FAST: .eabi_attribute 23, 1 1144 1145; CORTEX-M4-HARD: .cpu cortex-m4 1146; CORTEX-M4-HARD: .eabi_attribute 6, 13 1147; CORTEX-M4-HARD: .eabi_attribute 7, 77 1148; CORTEX-M4-HARD: .eabi_attribute 8, 0 1149; CORTEX-M4-HARD: .eabi_attribute 9, 2 1150; CORTEX-M4-HARD: .fpu fpv4-sp-d16 1151; CORTEX-M4-HARD: .eabi_attribute 27, 1 1152; CORTEX-M4-HARD: .eabi_attribute 36, 1 1153; CORTEX-M4-HARD-NOT: .eabi_attribute 42 1154; CORTEX-M4-HARD-NOT: .eabi_attribute 44 1155; CORTEX-M4-HARD-NOT: .eabi_attribute 68 1156; CORTEX-M4-HARD-NOT: .eabi_attribute 19 1157;; We default to IEEE 754 compliance 1158; CORTEX-M4-HARD: .eabi_attribute 20, 1 1159; CORTEX-M4-HARD: .eabi_attribute 21, 1 1160; CORTEX-M4-HARD-NOT: .eabi_attribute 22 1161; CORTEX-M4-HARD: .eabi_attribute 23, 3 1162; CORTEX-M4-HARD: .eabi_attribute 24, 1 1163; CORTEX-M4-HARD: .eabi_attribute 25, 1 1164; CORTEX-M4-HARD: .eabi_attribute 28, 1 1165; CORTEX-M4-HARD: .eabi_attribute 38, 1 1166 1167; CORTEX-M4-HARD-FAST-NOT: .eabi_attribute 19 1168;; The M4 defaults to a VFPv4 FPU, so it flushes preserving the sign when 1169;; -ffast-math is specified. 1170; CORTEX-M4-HARD-FAST: .eabi_attribute 20, 2 1171; CORTEX-M4-HARD-FAST-NOT: .eabi_attribute 21 1172; CORTEX-M4-HARD-FAST-NOT: .eabi_attribute 22 1173; CORTEX-M4-HARD-FAST: .eabi_attribute 23, 1 1174 1175; CORTEX-M7: .cpu cortex-m7 1176; CORTEX-M7: .eabi_attribute 6, 13 1177; CORTEX-M7: .eabi_attribute 7, 77 1178; CORTEX-M7: .eabi_attribute 8, 0 1179; CORTEX-M7: .eabi_attribute 9, 2 1180; CORTEX-M7-SOFT-NOT: .fpu 1181; CORTEX-M7-SINGLE: .fpu fpv5-sp-d16 1182; CORTEX-M7-DOUBLE: .fpu fpv5-d16 1183; CORTEX-M7-SOFT-NOT: .eabi_attribute 27 1184; CORTEX-M7-SINGLE: .eabi_attribute 27, 1 1185; CORTEX-M7-DOUBLE-NOT: .eabi_attribute 27 1186; CORTEX-M7: .eabi_attribute 36, 1 1187; CORTEX-M7-NOT: .eabi_attribute 44 1188; CORTEX-M7: .eabi_attribute 17, 1 1189; CORTEX-M7-NOT: .eabi_attribute 19 1190;; We default to IEEE 754 compliance 1191; CORTEX-M7: .eabi_attribute 20, 1 1192; CORTEX-M7: .eabi_attribute 21, 1 1193; CORTEX-M7-NOT: .eabi_attribute 22 1194; CORTEX-M7: .eabi_attribute 23, 3 1195; CORTEX-M7: .eabi_attribute 24, 1 1196; CORTEX-M7: .eabi_attribute 25, 1 1197; CORTEX-M7: .eabi_attribute 38, 1 1198; CORTEX-M7: .eabi_attribute 14, 0 1199 1200; CORTEX-M7-NOFPU-FAST-NOT: .eabi_attribute 19 1201;; The M7 has the ARMv8 FP unit, which always flushes preserving sign. 1202; CORTEX-M7-FAST: .eabi_attribute 20, 2 1203;; Despite there being no FPU, we chose to flush to zero preserving 1204;; sign. This matches what the hardware would do for this architecture 1205;; revision. 1206; CORTEX-M7-NOFPU-FAST: .eabi_attribute 20, 2 1207; CORTEX-M7-NOFPU-FAST-NOT: .eabi_attribute 21 1208; CORTEX-M7-NOFPU-FAST-NOT: .eabi_attribute 22 1209; CORTEX-M7-NOFPU-FAST: .eabi_attribute 23, 1 1210 1211; CORTEX-R4: .cpu cortex-r4 1212; CORTEX-R4: .eabi_attribute 6, 10 1213; CORTEX-R4: .eabi_attribute 7, 82 1214; CORTEX-R4: .eabi_attribute 8, 1 1215; CORTEX-R4: .eabi_attribute 9, 2 1216; CORTEX-R4-NOT: .fpu vfpv3-d16 1217; CORTEX-R4-NOT: .eabi_attribute 36 1218; CORTEX-R4-NOT: .eabi_attribute 42 1219; CORTEX-R4-NOT: .eabi_attribute 44 1220; CORTEX-R4-NOT: .eabi_attribute 68 1221; CORTEX-R4-NOT: .eabi_attribute 19 1222;; We default to IEEE 754 compliance 1223; CORTEX-R4: .eabi_attribute 20, 1 1224; CORTEX-R4: .eabi_attribute 21, 1 1225; CORTEX-R4-NOT: .eabi_attribute 22 1226; CORTEX-R4: .eabi_attribute 23, 3 1227; CORTEX-R4: .eabi_attribute 24, 1 1228; CORTEX-R4: .eabi_attribute 25, 1 1229; CORTEX-R4-NOT: .eabi_attribute 28 1230; CORTEX-R4: .eabi_attribute 38, 1 1231 1232; CORTEX-R4F: .cpu cortex-r4f 1233; CORTEX-R4F: .eabi_attribute 6, 10 1234; CORTEX-R4F: .eabi_attribute 7, 82 1235; CORTEX-R4F: .eabi_attribute 8, 1 1236; CORTEX-R4F: .eabi_attribute 9, 2 1237; CORTEX-R4F: .fpu vfpv3-d16 1238; CORTEX-R4F-NOT: .eabi_attribute 27, 1 1239; CORTEX-R4F-NOT: .eabi_attribute 36 1240; CORTEX-R4F-NOT: .eabi_attribute 42 1241; CORTEX-R4F-NOT: .eabi_attribute 44 1242; CORTEX-R4F-NOT: .eabi_attribute 68 1243; CORTEX-R4F-NOT: .eabi_attribute 19 1244;; We default to IEEE 754 compliance 1245; CORTEX-R4F: .eabi_attribute 20, 1 1246; CORTEX-R4F: .eabi_attribute 21, 1 1247; CORTEX-R4F-NOT: .eabi_attribute 22 1248; CORTEX-R4F: .eabi_attribute 23, 3 1249; CORTEX-R4F: .eabi_attribute 24, 1 1250; CORTEX-R4F: .eabi_attribute 25, 1 1251; CORTEX-R4F-NOT: .eabi_attribute 28 1252; CORTEX-R4F: .eabi_attribute 38, 1 1253 1254; CORTEX-R5: .cpu cortex-r5 1255; CORTEX-R5: .eabi_attribute 6, 10 1256; CORTEX-R5: .eabi_attribute 7, 82 1257; CORTEX-R5: .eabi_attribute 8, 1 1258; CORTEX-R5: .eabi_attribute 9, 2 1259; CORTEX-R5: .fpu vfpv3-d16 1260; CORTEX-R5-NOT: .eabi_attribute 27, 1 1261; CORTEX-R5-NOT: .eabi_attribute 36 1262; CORTEX-R5: .eabi_attribute 44, 2 1263; CORTEX-R5-NOT: .eabi_attribute 42 1264; CORTEX-R5-NOT: .eabi_attribute 68 1265; CORTEX-R5-NOT: .eabi_attribute 19 1266;; We default to IEEE 754 compliance 1267; CORTEX-R5: .eabi_attribute 20, 1 1268; CORTEX-R5: .eabi_attribute 21, 1 1269; CORTEX-R5-NOT: .eabi_attribute 22 1270; CORTEX-R5: .eabi_attribute 23, 3 1271; CORTEX-R5: .eabi_attribute 24, 1 1272; CORTEX-R5: .eabi_attribute 25, 1 1273; CORTEX-R5-NOT: .eabi_attribute 28 1274; CORTEX-R5: .eabi_attribute 38, 1 1275 1276; CORTEX-R5-FAST-NOT: .eabi_attribute 19 1277;; The R5 has the VFPv3 FP unit, which always flushes preserving sign. 1278; CORTEX-R5-FAST: .eabi_attribute 20, 2 1279; CORTEX-R5-FAST-NOT: .eabi_attribute 21 1280; CORTEX-R5-FAST-NOT: .eabi_attribute 22 1281; CORTEX-R5-FAST: .eabi_attribute 23, 1 1282 1283; CORTEX-R7: .cpu cortex-r7 1284; CORTEX-R7: .eabi_attribute 6, 10 1285; CORTEX-R7: .eabi_attribute 7, 82 1286; CORTEX-R7: .eabi_attribute 8, 1 1287; CORTEX-R7: .eabi_attribute 9, 2 1288; CORTEX-R7: .fpu vfpv3-d16-fp16 1289; CORTEX-R7: .eabi_attribute 36, 1 1290; CORTEX-R7: .eabi_attribute 42, 1 1291; CORTEX-R7: .eabi_attribute 44, 2 1292; CORTEX-R7-NOT: .eabi_attribute 68 1293; CORTEX-R7-NOT: .eabi_attribute 19 1294;; We default to IEEE 754 compliance 1295; CORTEX-R7: .eabi_attribute 20, 1 1296; CORTEX-R7: .eabi_attribute 21, 1 1297; CORTEX-R7-NOT: .eabi_attribute 22 1298; CORTEX-R7: .eabi_attribute 23, 3 1299; CORTEX-R7: .eabi_attribute 24, 1 1300; CORTEX-R7: .eabi_attribute 25, 1 1301; CORTEX-R7-NOT: .eabi_attribute 28 1302; CORTEX-R7: .eabi_attribute 38, 1 1303 1304; CORTEX-R7-FAST-NOT: .eabi_attribute 19 1305;; The R7 has the VFPv3 FP unit, which always flushes preserving sign. 1306; CORTEX-R7-FAST: .eabi_attribute 20, 2 1307; CORTEX-R7-FAST-NOT: .eabi_attribute 21 1308; CORTEX-R7-FAST-NOT: .eabi_attribute 22 1309; CORTEX-R7-FAST: .eabi_attribute 23, 1 1310 1311; CORTEX-R8: .cpu cortex-r8 1312; CORTEX-R8: .eabi_attribute 6, 10 1313; CORTEX-R8: .eabi_attribute 7, 82 1314; CORTEX-R8: .eabi_attribute 8, 1 1315; CORTEX-R8: .eabi_attribute 9, 2 1316; CORTEX-R8: .fpu vfpv3-d16-fp16 1317; CORTEX-R8: .eabi_attribute 36, 1 1318; CORTEX-R8: .eabi_attribute 42, 1 1319; CORTEX-R8: .eabi_attribute 44, 2 1320; CORTEX-R8-NOT: .eabi_attribute 68 1321; CORTEX-R8-NOT: .eabi_attribute 19 1322;; We default to IEEE 754 compliance 1323; CORTEX-R8: .eabi_attribute 20, 1 1324; CORTEX-R8: .eabi_attribute 21, 1 1325; CORTEX-R8-NOT: .eabi_attribute 22 1326; CORTEX-R8: .eabi_attribute 23, 3 1327; CORTEX-R8: .eabi_attribute 24, 1 1328; CORTEX-R8: .eabi_attribute 25, 1 1329; CORTEX-R8-NOT: .eabi_attribute 28 1330; CORTEX-R8: .eabi_attribute 38, 1 1331 1332; CORTEX-R8-FAST-NOT: .eabi_attribute 19 1333;; The R8 has the VFPv3 FP unit, which always flushes preserving sign. 1334; CORTEX-R8-FAST: .eabi_attribute 20, 2 1335; CORTEX-R8-FAST-NOT: .eabi_attribute 21 1336; CORTEX-R8-FAST-NOT: .eabi_attribute 22 1337; CORTEX-R8-FAST: .eabi_attribute 23, 1 1338 1339; CORTEX-A32: .cpu cortex-a32 1340; CORTEX-A32: .eabi_attribute 6, 14 1341; CORTEX-A32: .eabi_attribute 7, 65 1342; CORTEX-A32: .eabi_attribute 8, 1 1343; CORTEX-A32: .eabi_attribute 9, 2 1344; CORTEX-A32: .fpu crypto-neon-fp-armv8 1345; CORTEX-A32: .eabi_attribute 12, 3 1346; CORTEX-A32-NOT: .eabi_attribute 27 1347; CORTEX-A32: .eabi_attribute 36, 1 1348; CORTEX-A32: .eabi_attribute 42, 1 1349; CORTEX-A32-NOT: .eabi_attribute 44 1350; CORTEX-A32: .eabi_attribute 68, 3 1351; CORTEX-A32-NOT: .eabi_attribute 19 1352;; We default to IEEE 754 compliance 1353; CORTEX-A32: .eabi_attribute 20, 1 1354; CORTEX-A32: .eabi_attribute 21, 1 1355; CORTEX-A32-NOT: .eabi_attribute 22 1356; CORTEX-A32: .eabi_attribute 23, 3 1357; CORTEX-A32: .eabi_attribute 24, 1 1358; CORTEX-A32: .eabi_attribute 25, 1 1359; CORTEX-A32-NOT: .eabi_attribute 28 1360; CORTEX-A32: .eabi_attribute 38, 1 1361 1362; CORTEX-A32-FAST-NOT: .eabi_attribute 19 1363;; The A32 has the ARMv8 FP unit, which always flushes preserving sign. 1364; CORTEX-A32-FAST: .eabi_attribute 20, 2 1365; CORTEX-A32-FAST-NOT: .eabi_attribute 21 1366; CORTEX-A32-FAST-NOT: .eabi_attribute 22 1367; CORTEX-A32-FAST: .eabi_attribute 23, 1 1368 1369; CORTEX-M23: .cpu cortex-m23 1370; CORTEX-M23: .eabi_attribute 6, 16 1371; CORTEX-M23: .eabi_attribute 7, 77 1372; CORTEX-M23: .eabi_attribute 8, 0 1373; CORTEX-M23: .eabi_attribute 9, 3 1374; CORTEX-M23-NOT: .eabi_attribute 27 1375; CORTEX-M23: .eabi_attribute 34, 0 1376; CORTEX-M23-NOT: .eabi_attribute 44 1377; CORTEX-M23: .eabi_attribute 17, 1 1378;; We default to IEEE 754 compliance 1379; CORTEX-M23-NOT: .eabi_attribute 19 1380; CORTEX-M23: .eabi_attribute 20, 1 1381; CORTEX-M23: .eabi_attribute 21, 1 1382; CORTEX-M23: .eabi_attribute 23, 3 1383; CORTEX-M23: .eabi_attribute 24, 1 1384; CORTEX-M23-NOT: .eabi_attribute 28 1385; CORTEX-M23: .eabi_attribute 25, 1 1386; CORTEX-M23: .eabi_attribute 38, 1 1387; CORTEX-M23: .eabi_attribute 14, 0 1388 1389; CORTEX-M33: .cpu cortex-m33 1390; CORTEX-M33: .eabi_attribute 6, 17 1391; CORTEX-M33: .eabi_attribute 7, 77 1392; CORTEX-M33: .eabi_attribute 8, 0 1393; CORTEX-M33: .eabi_attribute 9, 3 1394; CORTEX-M33: .fpu fpv5-sp-d16 1395; CORTEX-M33: .eabi_attribute 27, 1 1396; CORTEX-M33: .eabi_attribute 36, 1 1397; CORTEX-M33-NOT: .eabi_attribute 44 1398; CORTEX-M33: .eabi_attribute 46, 1 1399; CORTEX-M33: .eabi_attribute 34, 1 1400; CORTEX-M33: .eabi_attribute 17, 1 1401;; We default to IEEE 754 compliance 1402; CORTEX-M23-NOT: .eabi_attribute 19 1403; CORTEX-M33: .eabi_attribute 20, 1 1404; CORTEX-M33: .eabi_attribute 21, 1 1405; CORTEX-M33: .eabi_attribute 23, 3 1406; CORTEX-M33: .eabi_attribute 24, 1 1407; CORTEX-M33: .eabi_attribute 25, 1 1408; CORTEX-M33-NOT: .eabi_attribute 28 1409; CORTEX-M33: .eabi_attribute 38, 1 1410; CORTEX-M33: .eabi_attribute 14, 0 1411 1412; CORTEX-M35P: .cpu cortex-m35p 1413; CORTEX-M35P: .eabi_attribute 6, 17 1414; CORTEX-M35P: .eabi_attribute 7, 77 1415; CORTEX-M35P: .eabi_attribute 8, 0 1416; CORTEX-M35P: .eabi_attribute 9, 3 1417; CORTEX-M35P: .fpu fpv5-sp-d16 1418; CORTEX-M35P: .eabi_attribute 27, 1 1419; CORTEX-M35P: .eabi_attribute 36, 1 1420; CORTEX-M35P-NOT: .eabi_attribute 44 1421; CORTEX-M35P: .eabi_attribute 46, 1 1422; CORTEX-M35P: .eabi_attribute 34, 1 1423; CORTEX-M35P: .eabi_attribute 17, 1 1424; CORTEX-M35P: .eabi_attribute 20, 1 1425; CORTEX-M35P: .eabi_attribute 21, 1 1426; CORTEX-M35P: .eabi_attribute 23, 3 1427; CORTEX-M35P: .eabi_attribute 24, 1 1428; CORTEX-M35P: .eabi_attribute 25, 1 1429; CORTEX-M35P-NOT: .eabi_attribute 28 1430; CORTEX-M35P: .eabi_attribute 38, 1 1431; CORTEX-M35P: .eabi_attribute 14, 0 1432 1433; CORTEX-M33-FAST-NOT: .eabi_attribute 19 1434; CORTEX-M33-FAST: .eabi_attribute 20, 2 1435; CORTEX-M33-FAST-NOT: .eabi_attribute 21 1436; CORTEX-M33-FAST-NOT: .eabi_attribute 22 1437; CORTEX-M33-FAST: .eabi_attribute 23, 1 1438 1439; CORTEX-A35: .cpu cortex-a35 1440; CORTEX-A35: .eabi_attribute 6, 14 1441; CORTEX-A35: .eabi_attribute 7, 65 1442; CORTEX-A35: .eabi_attribute 8, 1 1443; CORTEX-A35: .eabi_attribute 9, 2 1444; CORTEX-A35: .fpu crypto-neon-fp-armv8 1445; CORTEX-A35: .eabi_attribute 12, 3 1446; CORTEX-A35-NOT: .eabi_attribute 27 1447; CORTEX-A35: .eabi_attribute 36, 1 1448; CORTEX-A35: .eabi_attribute 42, 1 1449; CORTEX-A35-NOT: .eabi_attribute 44 1450; CORTEX-A35: .eabi_attribute 68, 3 1451; CORTEX-A35-NOT: .eabi_attribute 19 1452;; We default to IEEE 754 compliance 1453; CORTEX-A35: .eabi_attribute 20, 1 1454; CORTEX-A35: .eabi_attribute 21, 1 1455; CORTEX-A35-NOT: .eabi_attribute 22 1456; CORTEX-A35: .eabi_attribute 23, 3 1457; CORTEX-A35: .eabi_attribute 24, 1 1458; CORTEX-A35: .eabi_attribute 25, 1 1459; CORTEX-A35-NOT: .eabi_attribute 28 1460; CORTEX-A35: .eabi_attribute 38, 1 1461 1462; CORTEX-A35-FAST-NOT: .eabi_attribute 19 1463;; The A35 has the ARMv8 FP unit, which always flushes preserving sign. 1464; CORTEX-A35-FAST: .eabi_attribute 20, 2 1465; CORTEX-A35-FAST-NOT: .eabi_attribute 21 1466; CORTEX-A35-FAST-NOT: .eabi_attribute 22 1467; CORTEX-A35-FAST: .eabi_attribute 23, 1 1468 1469; CORTEX-A53: .cpu cortex-a53 1470; CORTEX-A53: .eabi_attribute 6, 14 1471; CORTEX-A53: .eabi_attribute 7, 65 1472; CORTEX-A53: .eabi_attribute 8, 1 1473; CORTEX-A53: .eabi_attribute 9, 2 1474; CORTEX-A53: .fpu crypto-neon-fp-armv8 1475; CORTEX-A53: .eabi_attribute 12, 3 1476; CORTEX-A53-NOT: .eabi_attribute 27 1477; CORTEX-A53: .eabi_attribute 36, 1 1478; CORTEX-A53: .eabi_attribute 42, 1 1479; CORTEX-A53-NOT: .eabi_attribute 44 1480; CORTEX-A53: .eabi_attribute 68, 3 1481; CORTEX-A53-NOT: .eabi_attribute 19 1482;; We default to IEEE 754 compliance 1483; CORTEX-A53: .eabi_attribute 20, 1 1484; CORTEX-A53: .eabi_attribute 21, 1 1485; CORTEX-A53-NOT: .eabi_attribute 22 1486; CORTEX-A53: .eabi_attribute 23, 3 1487; CORTEX-A53: .eabi_attribute 24, 1 1488; CORTEX-A53: .eabi_attribute 25, 1 1489; CORTEX-A53-NOT: .eabi_attribute 28 1490; CORTEX-A53: .eabi_attribute 38, 1 1491 1492; CORTEX-A53-FAST-NOT: .eabi_attribute 19 1493;; The A53 has the ARMv8 FP unit, which always flushes preserving sign. 1494; CORTEX-A53-FAST: .eabi_attribute 20, 2 1495; CORTEX-A53-FAST-NOT: .eabi_attribute 21 1496; CORTEX-A53-FAST-NOT: .eabi_attribute 22 1497; CORTEX-A53-FAST: .eabi_attribute 23, 1 1498 1499; CORTEX-A57: .cpu cortex-a57 1500; CORTEX-A57: .eabi_attribute 6, 14 1501; CORTEX-A57: .eabi_attribute 7, 65 1502; CORTEX-A57: .eabi_attribute 8, 1 1503; CORTEX-A57: .eabi_attribute 9, 2 1504; CORTEX-A57: .fpu crypto-neon-fp-armv8 1505; CORTEX-A57: .eabi_attribute 12, 3 1506; CORTEX-A57-NOT: .eabi_attribute 27 1507; CORTEX-A57: .eabi_attribute 36, 1 1508; CORTEX-A57: .eabi_attribute 42, 1 1509; CORTEX-A57-NOT: .eabi_attribute 44 1510; CORTEX-A57: .eabi_attribute 68, 3 1511; CORTEX-A57-NOT: .eabi_attribute 19 1512;; We default to IEEE 754 compliance 1513; CORTEX-A57: .eabi_attribute 20, 1 1514; CORTEX-A57: .eabi_attribute 21, 1 1515; CORTEX-A57-NOT: .eabi_attribute 22 1516; CORTEX-A57: .eabi_attribute 23, 3 1517; CORTEX-A57: .eabi_attribute 24, 1 1518; CORTEX-A57: .eabi_attribute 25, 1 1519; CORTEX-A57-NOT: .eabi_attribute 28 1520; CORTEX-A57: .eabi_attribute 38, 1 1521 1522; CORTEX-A57-FAST-NOT: .eabi_attribute 19 1523;; The A57 has the ARMv8 FP unit, which always flushes preserving sign. 1524; CORTEX-A57-FAST: .eabi_attribute 20, 2 1525; CORTEX-A57-FAST-NOT: .eabi_attribute 21 1526; CORTEX-A57-FAST-NOT: .eabi_attribute 22 1527; CORTEX-A57-FAST: .eabi_attribute 23, 1 1528 1529; CORTEX-A72: .cpu cortex-a72 1530; CORTEX-A72: .eabi_attribute 6, 14 1531; CORTEX-A72: .eabi_attribute 7, 65 1532; CORTEX-A72: .eabi_attribute 8, 1 1533; CORTEX-A72: .eabi_attribute 9, 2 1534; CORTEX-A72: .fpu crypto-neon-fp-armv8 1535; CORTEX-A72: .eabi_attribute 12, 3 1536; CORTEX-A72-NOT: .eabi_attribute 27 1537; CORTEX-A72: .eabi_attribute 36, 1 1538; CORTEX-A72: .eabi_attribute 42, 1 1539; CORTEX-A72-NOT: .eabi_attribute 44 1540; CORTEX-A72: .eabi_attribute 68, 3 1541; CORTEX-A72-NOT: .eabi_attribute 19 1542;; We default to IEEE 754 compliance 1543; CORTEX-A72: .eabi_attribute 20, 1 1544; CORTEX-A72: .eabi_attribute 21, 1 1545; CORTEX-A72-NOT: .eabi_attribute 22 1546; CORTEX-A72: .eabi_attribute 23, 3 1547; CORTEX-A72: .eabi_attribute 24, 1 1548; CORTEX-A72: .eabi_attribute 25, 1 1549; CORTEX-A72-NOT: .eabi_attribute 28 1550; CORTEX-A72: .eabi_attribute 38, 1 1551 1552; CORTEX-A72-FAST-NOT: .eabi_attribute 19 1553;; The A72 has the ARMv8 FP unit, which always flushes preserving sign. 1554; CORTEX-A72-FAST: .eabi_attribute 20, 2 1555; CORTEX-A72-FAST-NOT: .eabi_attribute 21 1556; CORTEX-A72-FAST-NOT: .eabi_attribute 22 1557; CORTEX-A72-FAST: .eabi_attribute 23, 1 1558 1559; CORTEX-A73: .cpu cortex-a73 1560; CORTEX-A73: .eabi_attribute 6, 14 1561; CORTEX-A73: .eabi_attribute 7, 65 1562; CORTEX-A73: .eabi_attribute 8, 1 1563; CORTEX-A73: .eabi_attribute 9, 2 1564; CORTEX-A73: .fpu crypto-neon-fp-armv8 1565; CORTEX-A73: .eabi_attribute 12, 3 1566; CORTEX-A73-NOT: .eabi_attribute 27 1567; CORTEX-A73: .eabi_attribute 36, 1 1568; CORTEX-A73: .eabi_attribute 42, 1 1569; CORTEX-A73-NOT: .eabi_attribute 44 1570; CORTEX-A73: .eabi_attribute 68, 3 1571; CORTEX-A73-NOT: .eabi_attribute 19 1572;; We default to IEEE 754 compliance 1573; CORTEX-A73: .eabi_attribute 20, 1 1574; CORTEX-A73: .eabi_attribute 21, 1 1575; CORTEX-A73-NOT: .eabi_attribute 22 1576; CORTEX-A73: .eabi_attribute 23, 3 1577; CORTEX-A73: .eabi_attribute 24, 1 1578; CORTEX-A73: .eabi_attribute 25, 1 1579; CORTEX-A73-NOT: .eabi_attribute 28 1580; CORTEX-A73: .eabi_attribute 38, 1 1581; CORTEX-A73: .eabi_attribute 14, 0 1582 1583; EXYNOS-FAST-NOT: .eabi_attribute 19 1584;; The Exynos processors have the ARMv8 FP unit, which always flushes preserving sign. 1585; EXYNOS-FAST: .eabi_attribute 20, 2 1586; EXYNOS-FAST-NOT: .eabi_attribute 21 1587; EXYNOS-FAST-NOT: .eabi_attribute 22 1588; EXYNOS-FAST: .eabi_attribute 23, 1 1589 1590; EXYNOS-M3: .cpu exynos-m3 1591; EXYNOS-M3: .eabi_attribute 6, 14 1592; EXYNOS-M3: .eabi_attribute 7, 65 1593; EXYNOS-M3: .eabi_attribute 8, 1 1594; EXYNOS-M3: .eabi_attribute 9, 2 1595; EXYNOS-M3: .fpu crypto-neon-fp-armv8 1596; EXYNOS-M3: .eabi_attribute 12, 3 1597; EXYNOS-M3-NOT: .eabi_attribute 27 1598; EXYNOS-M3: .eabi_attribute 36, 1 1599; EXYNOS-M3: .eabi_attribute 42, 1 1600; EXYNOS-M3-NOT: .eabi_attribute 44 1601; EXYNOS-M3: .eabi_attribute 68, 3 1602; EXYNOS-M3-NOT: .eabi_attribute 19 1603;; We default to IEEE 754 compliance 1604; EXYNOS-M3: .eabi_attribute 20, 1 1605; EXYNOS-M3: .eabi_attribute 21, 1 1606; EXYNOS-M3-NOT: .eabi_attribute 22 1607; EXYNOS-M3: .eabi_attribute 23, 3 1608; EXYNOS-M3: .eabi_attribute 24, 1 1609; EXYNOS-M3: .eabi_attribute 25, 1 1610; EXYNOS-M3-NOT: .eabi_attribute 28 1611; EXYNOS-M3: .eabi_attribute 38, 1 1612 1613; EXYNOS-M4: .cpu exynos-m4 1614; EXYNOS-M4: .eabi_attribute 6, 14 1615; EXYNOS-M4: .eabi_attribute 7, 65 1616; EXYNOS-M4: .eabi_attribute 8, 1 1617; EXYNOS-M4: .eabi_attribute 9, 2 1618; EXYNOS-M4: .fpu crypto-neon-fp-armv8 1619; EXYNOS-M4: .eabi_attribute 12, 4 1620; EXYNOS-M4-NOT: .eabi_attribute 27 1621; EXYNOS-M4: .eabi_attribute 36, 1 1622; EXYNOS-M4: .eabi_attribute 42, 1 1623; EXYNOS-M4-NOT: .eabi_attribute 44 1624; EXYNOS-M4: .eabi_attribute 68, 3 1625; EXYNOS-M4-NOT: .eabi_attribute 19 1626;; We default to IEEE 754 compliance 1627; EXYNOS-M4: .eabi_attribute 20, 1 1628; EXYNOS-M4: .eabi_attribute 21, 1 1629; EXYNOS-M4-NOT: .eabi_attribute 22 1630; EXYNOS-M4: .eabi_attribute 23, 3 1631; EXYNOS-M4: .eabi_attribute 24, 1 1632; EXYNOS-M4: .eabi_attribute 25, 1 1633; EXYNOS-M4-NOT: .eabi_attribute 28 1634; EXYNOS-M4: .eabi_attribute 38, 1 1635 1636; EXYNOS-M5: .cpu exynos-m5 1637; EXYNOS-M5: .eabi_attribute 6, 14 1638; EXYNOS-M5: .eabi_attribute 7, 65 1639; EXYNOS-M5: .eabi_attribute 8, 1 1640; EXYNOS-M5: .eabi_attribute 9, 2 1641; EXYNOS-M5: .fpu crypto-neon-fp-armv8 1642; EXYNOS-M5: .eabi_attribute 12, 4 1643; EXYNOS-M5-NOT: .eabi_attribute 27 1644; EXYNOS-M5: .eabi_attribute 36, 1 1645; EXYNOS-M5: .eabi_attribute 42, 1 1646; EXYNOS-M5-NOT: .eabi_attribute 44 1647; EXYNOS-M5: .eabi_attribute 68, 3 1648; EXYNOS-M5-NOT: .eabi_attribute 19 1649;; We default to IEEE 754 compliance 1650; EXYNOS-M5: .eabi_attribute 20, 1 1651; EXYNOS-M5: .eabi_attribute 21, 1 1652; EXYNOS-M5-NOT: .eabi_attribute 22 1653; EXYNOS-M5: .eabi_attribute 23, 3 1654; EXYNOS-M5: .eabi_attribute 24, 1 1655; EXYNOS-M5: .eabi_attribute 25, 1 1656; EXYNOS-M5-NOT: .eabi_attribute 28 1657; EXYNOS-M5: .eabi_attribute 38, 1 1658 1659; GENERIC-FPU-VFPV3-FP16: .fpu vfpv3-fp16 1660; GENERIC-FPU-VFPV3-D16-FP16: .fpu vfpv3-d16-fp16 1661; GENERIC-FPU-VFPV3XD: .fpu vfpv3xd 1662; GENERIC-FPU-VFPV3XD-FP16: .fpu vfpv3xd-fp16 1663; GENERIC-FPU-NEON-FP16: .fpu neon-fp16 1664 1665; GENERIC-ARMV8_1-A: .eabi_attribute 6, 14 1666; GENERIC-ARMV8_1-A: .eabi_attribute 7, 65 1667; GENERIC-ARMV8_1-A: .eabi_attribute 8, 1 1668; GENERIC-ARMV8_1-A: .eabi_attribute 9, 2 1669; GENERIC-ARMV8_1-A: .fpu crypto-neon-fp-armv8 1670; GENERIC-ARMV8_1-A: .eabi_attribute 12, 4 1671; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 27 1672; GENERIC-ARMV8_1-A: .eabi_attribute 36, 1 1673; GENERIC-ARMV8_1-A: .eabi_attribute 42, 1 1674; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 44 1675; GENERIC-ARMV8_1-A: .eabi_attribute 68, 3 1676; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 19 1677;; We default to IEEE 754 compliance 1678; GENERIC-ARMV8_1-A: .eabi_attribute 20, 1 1679; GENERIC-ARMV8_1-A: .eabi_attribute 21, 1 1680; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 22 1681; GENERIC-ARMV8_1-A: .eabi_attribute 23, 3 1682; GENERIC-ARMV8_1-A: .eabi_attribute 24, 1 1683; GENERIC-ARMV8_1-A: .eabi_attribute 25, 1 1684; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 28 1685; GENERIC-ARMV8_1-A: .eabi_attribute 38, 1 1686 1687; GENERIC-ARMV8_1-A-FAST-NOT: .eabi_attribute 19 1688;; GENERIC-ARMV8_1-A has the ARMv8 FP unit, which always flushes preserving sign. 1689; GENERIC-ARMV8_1-A-FAST: .eabi_attribute 20, 2 1690; GENERIC-ARMV8_1-A-FAST-NOT: .eabi_attribute 21 1691; GENERIC-ARMV8_1-A-FAST-NOT: .eabi_attribute 22 1692; GENERIC-ARMV8_1-A-FAST: .eabi_attribute 23, 1 1693 1694; RELOC-PIC: .eabi_attribute 15, 1 1695; RELOC-PIC: .eabi_attribute 16, 1 1696; RELOC-PIC: .eabi_attribute 17, 2 1697; RELOC-OTHER: .eabi_attribute 17, 1 1698; RELOC-ROPI-NOT: .eabi_attribute 15, 1699; RELOC-ROPI: .eabi_attribute 16, 1 1700; RELOC-ROPI: .eabi_attribute 17, 1 1701; RELOC-RWPI: .eabi_attribute 15, 2 1702; RELOC-RWPI-NOT: .eabi_attribute 16, 1703; RELOC-RWPI: .eabi_attribute 17, 1 1704; RELOC-ROPI-RWPI: .eabi_attribute 15, 2 1705; RELOC-ROPI-RWPI: .eabi_attribute 16, 1 1706; RELOC-ROPI-RWPI: .eabi_attribute 17, 1 1707 1708; PCS-R9-USE: .eabi_attribute 14, 0 1709; PCS-R9-RESERVE: .eabi_attribute 14, 3 1710 1711; ARMv8R: .eabi_attribute 67, "2.09" @ Tag_conformance 1712; ARMv8R: .eabi_attribute 6, 15 @ Tag_CPU_arch 1713; ARMv8R: .eabi_attribute 7, 82 @ Tag_CPU_arch_profile 1714; ARMv8R: .eabi_attribute 8, 1 @ Tag_ARM_ISA_use 1715; ARMv8R: .eabi_attribute 9, 2 @ Tag_THUMB_ISA_use 1716; ARMv8R-NOFPU-NOT: .fpu 1717; ARMv8R-NOFPU-NOT: .eabi_attribute 12 1718; ARMv8R-SP: .fpu fpv5-sp-d16 1719; ARMv8R-SP-NOT: .eabi_attribute 12 1720; ARMv8R-NEON: .fpu neon-fp-armv8 1721; ARMv8R-NEON: .eabi_attribute 12, 3 @ Tag_Advanced_SIMD_arch 1722; ARMv8R-NOFPU-NOT: .eabi_attribute 27 1723; ARMv8R-SP: .eabi_attribute 27, 1 @ Tag_ABI_HardFP_use 1724; ARMv8R-NEON-NOT: .eabi_attribute 27 1725; ARMv8R-NOFPU-NOT: .eabi_attribute 36 1726; ARMv8R-SP: .eabi_attribute 36, 1 @ Tag_FP_HP_extension 1727; ARMv8R-NEON: .eabi_attribute 36, 1 @ Tag_FP_HP_extension 1728; ARMv8R: .eabi_attribute 42, 1 @ Tag_MPextension_use 1729; ARMv8R: .eabi_attribute 68, 2 @ Tag_Virtualization_use 1730; ARMv8R: .eabi_attribute 38, 1 @ Tag_ABI_FP_16bit_format 1731; ARMv8R: .eabi_attribute 14, 0 @ Tag_ABI_PCS_R9_use 1732 1733; ARMv81M-MAIN: .eabi_attribute 6, 21 @ Tag_CPU_arch 1734; ARMv81M-MAIN-NOT: .eabi_attribute 48 1735; ARMv81M-MAIN-MVEINT: .eabi_attribute 6, 21 @ Tag_CPU_arch 1736; ARMv81M-MAIN-MVEINT: .eabi_attribute 48, 1 @ Tag_MVE_arch 1737; ARMv81M-MAIN-MVEFP: .eabi_attribute 6, 21 @ Tag_CPU_arch 1738; ARMv81M-MAIN-MVEFP: .eabi_attribute 48, 2 @ Tag_MVE_arch 1739; ARMv81M-MAIN-PACBTI: .eabi_attribute 50, 2 @ Tag_PAC_extension 1740; ARMv81M-MAIN-PACBTI: .eabi_attribute 52, 2 @ Tag_BTI_extension 1741 1742; CORTEX-M55: .cpu cortex-m55 1743; CORTEX-M55: .eabi_attribute 6, 21 1744; CORTEX-M55: .eabi_attribute 7, 77 1745; CORTEX-M55: .eabi_attribute 8, 0 1746; CORTEX-M55: .eabi_attribute 9, 3 1747; CORTEX-M55: .fpu fpv5-d16 1748; CORTEX-M55: .eabi_attribute 36, 1 1749; CORTEX-M55-NOT: .eabi_attribute 44 1750; CORTEX-M55: .eabi_attribute 46, 1 1751; CORTEX-M55: .eabi_attribute 34, 1 1752; CORTEX-M55: .eabi_attribute 17, 1 1753; CORTEX-M55-NOT: .eabi_attribute 19 1754; CORTEX-M55: .eabi_attribute 20, 1 1755; CORTEX-M55: .eabi_attribute 21, 1 1756; CORTEX-M55: .eabi_attribute 23, 3 1757; CORTEX-M55: .eabi_attribute 24, 1 1758; CORTEX-M55: .eabi_attribute 25, 1 1759; CORTEX-M55-NOT: .eabi_attribute 28 1760; CORTEX-M55: .eabi_attribute 38, 1 1761; CORTEX-M55: .eabi_attribute 14, 0 1762 1763; CORTEX-M85: .cpu cortex-m85 1764; CORTEX-M85: .eabi_attribute 6, 21 @ Tag_CPU_arch 1765; CORTEX-M85: .eabi_attribute 7, 77 @ Tag_CPU_arch_profile 1766; CORTEX-M85: .eabi_attribute 8, 0 @ Tag_ARM_ISA_use 1767; CORTEX-M85: .eabi_attribute 9, 3 @ Tag_THUMB_ISA_use 1768; CORTEX-M85: .fpu fpv5-d16 1769; CORTEX-M85: .eabi_attribute 36, 1 @ Tag_FP_HP_extension 1770; CORTEX-M85: .eabi_attribute 48, 2 @ Tag_MVE_arch 1771; CORTEX-M85: .eabi_attribute 46, 1 @ Tag_DSP_extension 1772; CORTEX-M85: .eabi_attribute 34, 1 @ Tag_CPU_unaligned_access 1773; CORTEX-M85: .eabi_attribute 50, 2 @ Tag_PAC_extension 1774; CORTEX-M85: .eabi_attribute 52, 2 @ Tag_BTI_extension 1775 1776; CHECK-NO-PACBTI-NOT: .eabi_attribute 50 1777; CHECK-NO-PACBTI-NOT: .eabi_attribute 52 1778 1779 1780define i32 @f(i64 %z) { 1781 ret i32 0 1782} 1783