xref: /llvm-project/llvm/test/CodeGen/ARM/bf16-imm.ll (revision 3651635ecad1a5a62321bcd79dcbf20855ceb443)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=armv8.6a-none-none-eabi < %s | FileCheck %s --check-prefixes=CHECK
3; RUN: llc -mtriple=armv8.6a-none-none-eabi -mattr=+bf16,+neon < %s | FileCheck %s --check-prefixes=CHECK
4; RUN: llc -mtriple=armv8.6a-none-none-eabi -mattr=+bf16,+neon,+fullfp16 < %s | FileCheck %s --check-prefix=CHECK-FP16
5; RUN: llc -mtriple=armv8.6a-none-none-eabi -mattr=+bf16,+neon -float-abi=hard < %s | FileCheck %s --check-prefix=CHECK-HARD
6
7define bfloat @bitcast_zero() {
8; CHECK-LABEL: bitcast_zero:
9; CHECK:       @ %bb.0:
10; CHECK-NEXT:    .pad #4
11; CHECK-NEXT:    sub sp, sp, #4
12; CHECK-NEXT:    mov r0, #0
13; CHECK-NEXT:    strh r0, [sp, #2]
14; CHECK-NEXT:    ldrh r0, [sp, #2]
15; CHECK-NEXT:    add sp, sp, #4
16; CHECK-NEXT:    bx lr
17;
18; CHECK-FP16-LABEL: bitcast_zero:
19; CHECK-FP16:       @ %bb.0:
20; CHECK-FP16-NEXT:    mov r0, #0
21; CHECK-FP16-NEXT:    vmov.f16 s0, r0
22; CHECK-FP16-NEXT:    vmov r0, s0
23; CHECK-FP16-NEXT:    bx lr
24;
25; CHECK-HARD-LABEL: bitcast_zero:
26; CHECK-HARD:       @ %bb.0:
27; CHECK-HARD-NEXT:    .pad #4
28; CHECK-HARD-NEXT:    sub sp, sp, #4
29; CHECK-HARD-NEXT:    mov r0, #0
30; CHECK-HARD-NEXT:    strh r0, [sp, #2]
31; CHECK-HARD-NEXT:    ldrh r0, [sp, #2]
32; CHECK-HARD-NEXT:    vmov s0, r0
33; CHECK-HARD-NEXT:    add sp, sp, #4
34; CHECK-HARD-NEXT:    bx lr
35  %z = bitcast i16 0 to bfloat
36  ret bfloat %z
37}
38
39define bfloat @zero() {
40; CHECK-LABEL: zero:
41; CHECK:       @ %bb.0:
42; CHECK-NEXT:    adr r0, .LCPI1_0
43; CHECK-NEXT:    ldrh r0, [r0]
44; CHECK-NEXT:    bx lr
45; CHECK-NEXT:    .p2align 1
46; CHECK-NEXT:  @ %bb.1:
47; CHECK-NEXT:  .LCPI1_0:
48; CHECK-NEXT:    .short 0x0000 @ bfloat 0
49;
50; CHECK-FP16-LABEL: zero:
51; CHECK-FP16:       @ %bb.0:
52; CHECK-FP16-NEXT:    vldr.16 s0, .LCPI1_0
53; CHECK-FP16-NEXT:    vmov r0, s0
54; CHECK-FP16-NEXT:    bx lr
55; CHECK-FP16-NEXT:    .p2align 1
56; CHECK-FP16-NEXT:  @ %bb.1:
57; CHECK-FP16-NEXT:  .LCPI1_0:
58; CHECK-FP16-NEXT:    .short 0x0000 @ bfloat 0
59;
60; CHECK-HARD-LABEL: zero:
61; CHECK-HARD:       @ %bb.0:
62; CHECK-HARD-NEXT:    adr r0, .LCPI1_0
63; CHECK-HARD-NEXT:    ldrh r0, [r0]
64; CHECK-HARD-NEXT:    vmov s0, r0
65; CHECK-HARD-NEXT:    bx lr
66; CHECK-HARD-NEXT:    .p2align 1
67; CHECK-HARD-NEXT:  @ %bb.1:
68; CHECK-HARD-NEXT:  .LCPI1_0:
69; CHECK-HARD-NEXT:    .short 0x0000 @ bfloat 0
70  ret bfloat 0xR0000
71}
72
73define bfloat @bitcast_tenk() {
74; CHECK-LABEL: bitcast_tenk:
75; CHECK:       @ %bb.0:
76; CHECK-NEXT:    .pad #4
77; CHECK-NEXT:    sub sp, sp, #4
78; CHECK-NEXT:    movw r0, #10000
79; CHECK-NEXT:    strh r0, [sp, #2]
80; CHECK-NEXT:    ldrh r0, [sp, #2]
81; CHECK-NEXT:    add sp, sp, #4
82; CHECK-NEXT:    bx lr
83;
84; CHECK-FP16-LABEL: bitcast_tenk:
85; CHECK-FP16:       @ %bb.0:
86; CHECK-FP16-NEXT:    movw r0, #10000
87; CHECK-FP16-NEXT:    vmov.f16 s0, r0
88; CHECK-FP16-NEXT:    vmov r0, s0
89; CHECK-FP16-NEXT:    bx lr
90;
91; CHECK-HARD-LABEL: bitcast_tenk:
92; CHECK-HARD:       @ %bb.0:
93; CHECK-HARD-NEXT:    .pad #4
94; CHECK-HARD-NEXT:    sub sp, sp, #4
95; CHECK-HARD-NEXT:    movw r0, #10000
96; CHECK-HARD-NEXT:    strh r0, [sp, #2]
97; CHECK-HARD-NEXT:    ldrh r0, [sp, #2]
98; CHECK-HARD-NEXT:    vmov s0, r0
99; CHECK-HARD-NEXT:    add sp, sp, #4
100; CHECK-HARD-NEXT:    bx lr
101  %z = bitcast i16 10000 to bfloat
102  ret bfloat %z
103}
104
105define bfloat @minus0() {
106; CHECK-LABEL: minus0:
107; CHECK:       @ %bb.0:
108; CHECK-NEXT:    adr r0, .LCPI3_0
109; CHECK-NEXT:    ldrh r0, [r0]
110; CHECK-NEXT:    bx lr
111; CHECK-NEXT:    .p2align 1
112; CHECK-NEXT:  @ %bb.1:
113; CHECK-NEXT:  .LCPI3_0:
114; CHECK-NEXT:    .short 0x8000 @ bfloat -0
115;
116; CHECK-FP16-LABEL: minus0:
117; CHECK-FP16:       @ %bb.0:
118; CHECK-FP16-NEXT:    vldr.16 s0, .LCPI3_0
119; CHECK-FP16-NEXT:    vmov r0, s0
120; CHECK-FP16-NEXT:    bx lr
121; CHECK-FP16-NEXT:    .p2align 1
122; CHECK-FP16-NEXT:  @ %bb.1:
123; CHECK-FP16-NEXT:  .LCPI3_0:
124; CHECK-FP16-NEXT:    .short 0x8000 @ bfloat -0
125;
126; CHECK-HARD-LABEL: minus0:
127; CHECK-HARD:       @ %bb.0:
128; CHECK-HARD-NEXT:    adr r0, .LCPI3_0
129; CHECK-HARD-NEXT:    ldrh r0, [r0]
130; CHECK-HARD-NEXT:    vmov s0, r0
131; CHECK-HARD-NEXT:    bx lr
132; CHECK-HARD-NEXT:    .p2align 1
133; CHECK-HARD-NEXT:  @ %bb.1:
134; CHECK-HARD-NEXT:  .LCPI3_0:
135; CHECK-HARD-NEXT:    .short 0x8000 @ bfloat -0
136  ret bfloat 0xR8000
137}
138