xref: /llvm-project/llvm/test/CodeGen/ARM/arm-vld1.ll (revision a7697c86559e9d57c9c0e2b5f2daaa5cec4e5119) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2; RUN: llc < %s -mtriple=armv8-linux-gnueabi -verify-machineinstrs \
3; RUN:     -asm-verbose=false | FileCheck %s
4
5%struct.uint16x4x2_t = type { <4 x i16>, <4 x i16> }
6%struct.uint16x4x3_t = type { <4 x i16>, <4 x i16>, <4 x i16> }
7%struct.uint16x4x4_t = type { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> }
8
9%struct.uint32x2x2_t = type { <2 x i32>, <2 x i32> }
10%struct.uint32x2x3_t = type { <2 x i32>, <2 x i32>, <2 x i32> }
11%struct.uint32x2x4_t = type { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> }
12
13%struct.uint64x1x2_t = type { <1 x i64>, <1 x i64> }
14%struct.uint64x1x3_t = type { <1 x i64>, <1 x i64>, <1 x i64> }
15%struct.uint64x1x4_t = type { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> }
16
17%struct.uint8x8x2_t = type { <8 x i8>, <8 x i8> }
18%struct.uint8x8x3_t = type { <8 x i8>, <8 x i8>, <8 x i8> }
19%struct.uint8x8x4_t = type { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> }
20
21%struct.uint16x8x2_t = type { <8 x i16>, <8 x i16> }
22%struct.uint16x8x3_t = type { <8 x i16>, <8 x i16>, <8 x i16> }
23%struct.uint16x8x4_t = type { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> }
24
25%struct.uint32x4x2_t = type { <4 x i32>, <4 x i32> }
26%struct.uint32x4x3_t = type { <4 x i32>, <4 x i32>, <4 x i32> }
27%struct.uint32x4x4_t = type { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> }
28
29%struct.uint64x2x2_t = type { <2 x i64>, <2 x i64> }
30%struct.uint64x2x3_t = type { <2 x i64>, <2 x i64>, <2 x i64> }
31%struct.uint64x2x4_t = type { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> }
32
33%struct.uint8x16x2_t = type { <16 x i8>, <16 x i8> }
34%struct.uint8x16x3_t = type { <16 x i8>, <16 x i8>, <16 x i8> }
35%struct.uint8x16x4_t = type { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> }
36
37declare %struct.uint16x4x2_t @llvm.arm.neon.vld1x2.v4i16.p0(ptr) nounwind readonly
38declare %struct.uint16x4x3_t @llvm.arm.neon.vld1x3.v4i16.p0(ptr) nounwind readonly
39declare %struct.uint16x4x4_t @llvm.arm.neon.vld1x4.v4i16.p0(ptr) nounwind readonly
40
41declare %struct.uint32x2x2_t @llvm.arm.neon.vld1x2.v2i32.p0(ptr) nounwind readonly
42declare %struct.uint32x2x3_t @llvm.arm.neon.vld1x3.v2i32.p0(ptr) nounwind readonly
43declare %struct.uint32x2x4_t @llvm.arm.neon.vld1x4.v2i32.p0(ptr) nounwind readonly
44
45declare %struct.uint64x1x2_t @llvm.arm.neon.vld1x2.v1i64.p0(ptr) nounwind readonly
46declare %struct.uint64x1x3_t @llvm.arm.neon.vld1x3.v1i64.p0(ptr) nounwind readonly
47declare %struct.uint64x1x4_t @llvm.arm.neon.vld1x4.v1i64.p0(ptr) nounwind readonly
48
49declare %struct.uint8x8x2_t @llvm.arm.neon.vld1x2.v8i8.p0(ptr) nounwind readonly
50declare %struct.uint8x8x3_t @llvm.arm.neon.vld1x3.v8i8.p0(ptr) nounwind readonly
51declare %struct.uint8x8x4_t @llvm.arm.neon.vld1x4.v8i8.p0(ptr) nounwind readonly
52
53declare %struct.uint16x8x2_t @llvm.arm.neon.vld1x2.v8i16.p0(ptr) nounwind readonly
54declare %struct.uint16x8x3_t @llvm.arm.neon.vld1x3.v8i16.p0(ptr) nounwind readonly
55declare %struct.uint16x8x4_t @llvm.arm.neon.vld1x4.v8i16.p0(ptr) nounwind readonly
56
57declare %struct.uint32x4x2_t @llvm.arm.neon.vld1x2.v4i32.p0(ptr) nounwind readonly
58declare %struct.uint32x4x3_t @llvm.arm.neon.vld1x3.v4i32.p0(ptr) nounwind readonly
59declare %struct.uint32x4x4_t @llvm.arm.neon.vld1x4.v4i32.p0(ptr) nounwind readonly
60
61declare %struct.uint64x2x2_t @llvm.arm.neon.vld1x2.v2i64.p0(ptr) nounwind readonly
62declare %struct.uint64x2x3_t @llvm.arm.neon.vld1x3.v2i64.p0(ptr) nounwind readonly
63declare %struct.uint64x2x4_t @llvm.arm.neon.vld1x4.v2i64.p0(ptr) nounwind readonly
64
65declare %struct.uint8x16x2_t @llvm.arm.neon.vld1x2.v16i8.p0(ptr) nounwind readonly
66declare %struct.uint8x16x3_t @llvm.arm.neon.vld1x3.v16i8.p0(ptr) nounwind readonly
67declare %struct.uint8x16x4_t @llvm.arm.neon.vld1x4.v16i8.p0(ptr) nounwind readonly
68
69define %struct.uint16x4x2_t @test_vld1_u16_x2(ptr %a) nounwind {
70; CHECK-LABEL: test_vld1_u16_x2:
71; CHECK:         vld1.16 {d16, d17}, [r0]
72; CHECK-NEXT:    vmov r0, r1, d16
73; CHECK-NEXT:    vmov r2, r3, d17
74; CHECK-NEXT:    bx lr
75  %tmp = tail call %struct.uint16x4x2_t @llvm.arm.neon.vld1x2.v4i16.p0(ptr %a)
76  ret %struct.uint16x4x2_t %tmp
77}
78
79define %struct.uint16x4x2_t @test_vld1_u16_x2_align8(ptr %a) nounwind {
80; CHECK-LABEL: test_vld1_u16_x2_align8:
81; CHECK:         vld1.16 {d16, d17}, [r0:64]
82; CHECK-NEXT:    vmov r0, r1, d16
83; CHECK-NEXT:    vmov r2, r3, d17
84; CHECK-NEXT:    bx lr
85  %tmp = tail call %struct.uint16x4x2_t @llvm.arm.neon.vld1x2.v4i16.p0(ptr align 8 %a)
86  ret %struct.uint16x4x2_t %tmp
87}
88
89define %struct.uint16x4x2_t @test_vld1_u16_x2_align16(ptr %a) nounwind {
90; CHECK-LABEL: test_vld1_u16_x2_align16:
91; CHECK:         vld1.16 {d16, d17}, [r0:128]
92; CHECK-NEXT:    vmov r0, r1, d16
93; CHECK-NEXT:    vmov r2, r3, d17
94; CHECK-NEXT:    bx lr
95  %tmp = tail call %struct.uint16x4x2_t @llvm.arm.neon.vld1x2.v4i16.p0(ptr align 16 %a)
96  ret %struct.uint16x4x2_t %tmp
97}
98
99define %struct.uint16x4x2_t @test_vld1_u16_x2_align32(ptr %a) nounwind {
100; CHECK-LABEL: test_vld1_u16_x2_align32:
101; CHECK:         vld1.16 {d16, d17}, [r0:128]
102; CHECK-NEXT:    vmov r0, r1, d16
103; CHECK-NEXT:    vmov r2, r3, d17
104; CHECK-NEXT:    bx lr
105  %tmp = tail call %struct.uint16x4x2_t @llvm.arm.neon.vld1x2.v4i16.p0(ptr align 32 %a)
106  ret %struct.uint16x4x2_t %tmp
107}
108
109define %struct.uint16x4x3_t @test_vld1_u16_x3(ptr %a) nounwind {
110; CHECK-LABEL: test_vld1_u16_x3:
111; CHECK:         vld1.16 {d16, d17, d18}, [r1]
112; CHECK-NEXT:    vst1.16 {d16}, [r0:64]!
113; CHECK-NEXT:    vst1.16 {d17}, [r0:64]!
114; CHECK-NEXT:    vstr d18, [r0]
115; CHECK-NEXT:    bx lr
116  %tmp = tail call %struct.uint16x4x3_t @llvm.arm.neon.vld1x3.v4i16.p0(ptr %a)
117  ret %struct.uint16x4x3_t %tmp
118}
119
120define %struct.uint16x4x4_t @test_vld1_u16_x4(ptr %a) nounwind {
121; CHECK-LABEL: test_vld1_u16_x4:
122; CHECK:         vld1.16 {d16, d17, d18, d19}, [r1]
123; CHECK-NEXT:    vst1.16 {d16}, [r0:64]!
124; CHECK-NEXT:    vst1.16 {d17}, [r0:64]!
125; CHECK-NEXT:    vst1.16 {d18}, [r0:64]!
126; CHECK-NEXT:    vstr d19, [r0]
127; CHECK-NEXT:    bx lr
128  %tmp = tail call %struct.uint16x4x4_t @llvm.arm.neon.vld1x4.v4i16.p0(ptr %a)
129  ret %struct.uint16x4x4_t %tmp
130}
131
132define %struct.uint32x2x2_t @test_vld1_u32_x2(ptr %a) nounwind {
133; CHECK-LABEL: test_vld1_u32_x2:
134; CHECK:         vld1.32 {d16, d17}, [r0]
135; CHECK-NEXT:    vmov r0, r1, d16
136; CHECK-NEXT:    vmov r2, r3, d17
137; CHECK-NEXT:    bx lr
138  %tmp = tail call %struct.uint32x2x2_t @llvm.arm.neon.vld1x2.v2i32.p0(ptr %a)
139  ret %struct.uint32x2x2_t %tmp
140}
141
142define %struct.uint32x2x3_t @test_vld1_u32_x3(ptr %a) nounwind {
143; CHECK-LABEL: test_vld1_u32_x3:
144; CHECK:         vld1.32 {d16, d17, d18}, [r1]
145; CHECK-NEXT:    vst1.32 {d16}, [r0:64]!
146; CHECK-NEXT:    vst1.32 {d17}, [r0:64]!
147; CHECK-NEXT:    vstr d18, [r0]
148; CHECK-NEXT:    bx lr
149  %tmp = tail call %struct.uint32x2x3_t @llvm.arm.neon.vld1x3.v2i32.p0(ptr %a)
150  ret %struct.uint32x2x3_t %tmp
151}
152
153define %struct.uint32x2x4_t @test_vld1_u32_x4(ptr %a) nounwind {
154; CHECK-LABEL: test_vld1_u32_x4:
155; CHECK:         vld1.32 {d16, d17, d18, d19}, [r1]
156; CHECK-NEXT:    vst1.32 {d16}, [r0:64]!
157; CHECK-NEXT:    vst1.32 {d17}, [r0:64]!
158; CHECK-NEXT:    vst1.32 {d18}, [r0:64]!
159; CHECK-NEXT:    vstr d19, [r0]
160; CHECK-NEXT:    bx lr
161  %tmp = tail call %struct.uint32x2x4_t @llvm.arm.neon.vld1x4.v2i32.p0(ptr %a)
162  ret %struct.uint32x2x4_t %tmp
163}
164
165define %struct.uint64x1x2_t @test_vld1_u64_x2(ptr %a) nounwind {
166; CHECK-LABEL: test_vld1_u64_x2:
167; CHECK:         vld1.64 {d16, d17}, [r0]
168; CHECK-NEXT:    vmov r0, r1, d16
169; CHECK-NEXT:    vmov r2, r3, d17
170; CHECK-NEXT:    bx lr
171  %tmp = tail call %struct.uint64x1x2_t @llvm.arm.neon.vld1x2.v1i64.p0(ptr %a)
172  ret %struct.uint64x1x2_t %tmp
173}
174
175define %struct.uint64x1x3_t @test_vld1_u64_x3(ptr %a) nounwind {
176; CHECK-LABEL: test_vld1_u64_x3:
177; CHECK:         vld1.64 {d16, d17, d18}, [r1]
178; CHECK-NEXT:    vst1.64 {d16}, [r0:64]!
179; CHECK-NEXT:    vst1.64 {d17}, [r0:64]!
180; CHECK-NEXT:    vstr d18, [r0]
181; CHECK-NEXT:    bx lr
182  %tmp = tail call %struct.uint64x1x3_t @llvm.arm.neon.vld1x3.v1i64.p0(ptr %a)
183  ret %struct.uint64x1x3_t %tmp
184}
185
186define %struct.uint64x1x4_t @test_vld1_u64_x4(ptr %a) nounwind {
187; CHECK-LABEL: test_vld1_u64_x4:
188; CHECK:         vld1.64 {d16, d17, d18, d19}, [r1]
189; CHECK-NEXT:    vst1.64 {d16}, [r0:64]!
190; CHECK-NEXT:    vst1.64 {d17}, [r0:64]!
191; CHECK-NEXT:    vst1.64 {d18}, [r0:64]!
192; CHECK-NEXT:    vstr d19, [r0]
193; CHECK-NEXT:    bx lr
194  %tmp = tail call %struct.uint64x1x4_t @llvm.arm.neon.vld1x4.v1i64.p0(ptr %a)
195  ret %struct.uint64x1x4_t %tmp
196}
197
198define %struct.uint8x8x2_t @test_vld1_u8_x2(ptr %a) nounwind {
199; CHECK-LABEL: test_vld1_u8_x2:
200; CHECK:         vld1.8 {d16, d17}, [r0]
201; CHECK-NEXT:    vmov r0, r1, d16
202; CHECK-NEXT:    vmov r2, r3, d17
203; CHECK-NEXT:    bx lr
204  %tmp = tail call %struct.uint8x8x2_t @llvm.arm.neon.vld1x2.v8i8.p0(ptr %a)
205  ret %struct.uint8x8x2_t %tmp
206}
207
208define %struct.uint8x8x3_t @test_vld1_u8_x3(ptr %a) nounwind {
209; CHECK-LABEL: test_vld1_u8_x3:
210; CHECK:         vld1.8 {d16, d17, d18}, [r1]
211; CHECK-NEXT:    vst1.8 {d16}, [r0:64]!
212; CHECK-NEXT:    vst1.8 {d17}, [r0:64]!
213; CHECK-NEXT:    vstr d18, [r0]
214; CHECK-NEXT:    bx lr
215  %tmp = tail call %struct.uint8x8x3_t @llvm.arm.neon.vld1x3.v8i8.p0(ptr %a)
216  ret %struct.uint8x8x3_t %tmp
217}
218
219define %struct.uint8x8x4_t @test_vld1_u8_x4(ptr %a) nounwind {
220; CHECK-LABEL: test_vld1_u8_x4:
221; CHECK:         vld1.8 {d16, d17, d18, d19}, [r1]
222; CHECK-NEXT:    vst1.8 {d16}, [r0:64]!
223; CHECK-NEXT:    vst1.8 {d17}, [r0:64]!
224; CHECK-NEXT:    vst1.8 {d18}, [r0:64]!
225; CHECK-NEXT:    vstr d19, [r0]
226; CHECK-NEXT:    bx lr
227  %tmp = tail call %struct.uint8x8x4_t @llvm.arm.neon.vld1x4.v8i8.p0(ptr %a)
228  ret %struct.uint8x8x4_t %tmp
229}
230
231define %struct.uint16x8x2_t @test_vld1q_u16_x2(ptr %a) nounwind {
232; CHECK-LABEL: test_vld1q_u16_x2:
233; CHECK:         vld1.16 {d16, d17, d18, d19}, [r1]
234; CHECK-NEXT:    vst1.16 {d16, d17}, [r0]!
235; CHECK-NEXT:    vst1.64 {d18, d19}, [r0]
236; CHECK-NEXT:    bx lr
237  %tmp = tail call %struct.uint16x8x2_t @llvm.arm.neon.vld1x2.v8i16.p0(ptr %a)
238  ret %struct.uint16x8x2_t %tmp
239}
240
241define %struct.uint16x8x3_t @test_vld1q_u16_x3(ptr %a) nounwind {
242; CHECK-LABEL: test_vld1q_u16_x3:
243; CHECK:         vld1.16 {d16, d17, d18}, [r1]!
244; CHECK-NEXT:    vld1.16 {d19, d20, d21}, [r1]
245; CHECK-NEXT:    vst1.16 {d16, d17}, [r0]!
246; CHECK-NEXT:    vst1.16 {d18, d19}, [r0]!
247; CHECK-NEXT:    vst1.64 {d20, d21}, [r0]
248; CHECK-NEXT:    bx lr
249  %tmp = tail call %struct.uint16x8x3_t @llvm.arm.neon.vld1x3.v8i16.p0(ptr %a)
250  ret %struct.uint16x8x3_t %tmp
251}
252
253define %struct.uint16x8x4_t @test_vld1q_u16_x4(ptr %a) nounwind {
254; CHECK-LABEL: test_vld1q_u16_x4:
255; CHECK:         vld1.16 {d16, d17, d18, d19}, [r1]!
256; CHECK-NEXT:    vld1.16 {d20, d21, d22, d23}, [r1]
257; CHECK-NEXT:    vst1.16 {d16, d17}, [r0]!
258; CHECK-NEXT:    vst1.16 {d18, d19}, [r0]!
259; CHECK-NEXT:    vst1.16 {d20, d21}, [r0]!
260; CHECK-NEXT:    vst1.64 {d22, d23}, [r0]
261; CHECK-NEXT:    bx lr
262  %tmp = tail call %struct.uint16x8x4_t @llvm.arm.neon.vld1x4.v8i16.p0(ptr %a)
263  ret %struct.uint16x8x4_t %tmp
264}
265
266define %struct.uint32x4x2_t @test_vld1q_u32_x2(ptr %a) nounwind {
267; CHECK-LABEL: test_vld1q_u32_x2:
268; CHECK:         vld1.32 {d16, d17, d18, d19}, [r1]
269; CHECK-NEXT:    vst1.32 {d16, d17}, [r0]!
270; CHECK-NEXT:    vst1.64 {d18, d19}, [r0]
271; CHECK-NEXT:    bx lr
272  %tmp = tail call %struct.uint32x4x2_t @llvm.arm.neon.vld1x2.v4i32.p0(ptr %a)
273  ret %struct.uint32x4x2_t %tmp
274}
275
276define %struct.uint32x4x3_t @test_vld1q_u32_x3(ptr %a) nounwind {
277; CHECK-LABEL: test_vld1q_u32_x3:
278; CHECK:         vld1.32 {d16, d17, d18}, [r1]!
279; CHECK-NEXT:    vld1.32 {d19, d20, d21}, [r1]
280; CHECK-NEXT:    vst1.32 {d16, d17}, [r0]!
281; CHECK-NEXT:    vst1.32 {d18, d19}, [r0]!
282; CHECK-NEXT:    vst1.64 {d20, d21}, [r0]
283; CHECK-NEXT:    bx lr
284  %tmp = tail call %struct.uint32x4x3_t @llvm.arm.neon.vld1x3.v4i32.p0(ptr %a)
285  ret %struct.uint32x4x3_t %tmp
286}
287
288define %struct.uint32x4x4_t @test_vld1q_u32_x4(ptr %a) nounwind {
289; CHECK-LABEL: test_vld1q_u32_x4:
290; CHECK:         vld1.32 {d16, d17, d18, d19}, [r1]!
291; CHECK-NEXT:    vld1.32 {d20, d21, d22, d23}, [r1]
292; CHECK-NEXT:    vst1.32 {d16, d17}, [r0]!
293; CHECK-NEXT:    vst1.32 {d18, d19}, [r0]!
294; CHECK-NEXT:    vst1.32 {d20, d21}, [r0]!
295; CHECK-NEXT:    vst1.64 {d22, d23}, [r0]
296; CHECK-NEXT:    bx lr
297  %tmp = tail call %struct.uint32x4x4_t @llvm.arm.neon.vld1x4.v4i32.p0(ptr %a)
298  ret %struct.uint32x4x4_t %tmp
299}
300
301define %struct.uint64x2x2_t @test_vld1q_u64_x2(ptr %a) nounwind {
302; CHECK-LABEL: test_vld1q_u64_x2:
303; CHECK:         vld1.64 {d16, d17, d18, d19}, [r1]
304; CHECK-NEXT:    vst1.64 {d16, d17}, [r0]!
305; CHECK-NEXT:    vst1.64 {d18, d19}, [r0]
306; CHECK-NEXT:    bx lr
307  %tmp = tail call %struct.uint64x2x2_t @llvm.arm.neon.vld1x2.v2i64.p0(ptr %a)
308  ret %struct.uint64x2x2_t %tmp
309}
310
311define %struct.uint64x2x3_t @test_vld1q_u64_x3(ptr %a) nounwind {
312; CHECK-LABEL: test_vld1q_u64_x3:
313; CHECK:         vld1.64 {d16, d17, d18}, [r1]!
314; CHECK-NEXT:    vld1.64 {d19, d20, d21}, [r1]
315; CHECK-NEXT:    vst1.64 {d16, d17}, [r0]!
316; CHECK-NEXT:    vst1.64 {d18, d19}, [r0]!
317; CHECK-NEXT:    vst1.64 {d20, d21}, [r0]
318; CHECK-NEXT:    bx lr
319  %tmp = tail call %struct.uint64x2x3_t @llvm.arm.neon.vld1x3.v2i64.p0(ptr %a)
320  ret %struct.uint64x2x3_t %tmp
321}
322
323define %struct.uint64x2x4_t @test_vld1q_u64_x4(ptr %a) nounwind {
324; CHECK-LABEL: test_vld1q_u64_x4:
325; CHECK:         vld1.64 {d16, d17, d18, d19}, [r1]!
326; CHECK-NEXT:    vld1.64 {d20, d21, d22, d23}, [r1]
327; CHECK-NEXT:    vst1.64 {d16, d17}, [r0]!
328; CHECK-NEXT:    vst1.64 {d18, d19}, [r0]!
329; CHECK-NEXT:    vst1.64 {d20, d21}, [r0]!
330; CHECK-NEXT:    vst1.64 {d22, d23}, [r0]
331; CHECK-NEXT:    bx lr
332  %tmp = tail call %struct.uint64x2x4_t @llvm.arm.neon.vld1x4.v2i64.p0(ptr %a)
333  ret %struct.uint64x2x4_t %tmp
334}
335
336define %struct.uint8x16x2_t @test_vld1q_u8_x2(ptr %a) nounwind {
337; CHECK-LABEL: test_vld1q_u8_x2:
338; CHECK:         vld1.8 {d16, d17, d18, d19}, [r1]
339; CHECK-NEXT:    vst1.8 {d16, d17}, [r0]!
340; CHECK-NEXT:    vst1.64 {d18, d19}, [r0]
341; CHECK-NEXT:    bx lr
342  %tmp = tail call %struct.uint8x16x2_t @llvm.arm.neon.vld1x2.v16i8.p0(ptr %a)
343  ret %struct.uint8x16x2_t %tmp
344}
345
346define %struct.uint8x16x3_t @test_vld1q_u8_x3(ptr %a) nounwind {
347; CHECK-LABEL: test_vld1q_u8_x3:
348; CHECK:         vld1.8 {d16, d17, d18}, [r1]!
349; CHECK-NEXT:    vld1.8 {d19, d20, d21}, [r1]
350; CHECK-NEXT:    vst1.8 {d16, d17}, [r0]!
351; CHECK-NEXT:    vst1.8 {d18, d19}, [r0]!
352; CHECK-NEXT:    vst1.64 {d20, d21}, [r0]
353; CHECK-NEXT:    bx lr
354  %tmp = tail call %struct.uint8x16x3_t @llvm.arm.neon.vld1x3.v16i8.p0(ptr %a)
355  ret %struct.uint8x16x3_t %tmp
356}
357
358define %struct.uint8x16x4_t @test_vld1q_u8_x4(ptr %a) nounwind {
359; CHECK-LABEL: test_vld1q_u8_x4:
360; CHECK:         vld1.8 {d16, d17, d18, d19}, [r1]!
361; CHECK-NEXT:    vld1.8 {d20, d21, d22, d23}, [r1]
362; CHECK-NEXT:    vst1.8 {d16, d17}, [r0]!
363; CHECK-NEXT:    vst1.8 {d18, d19}, [r0]!
364; CHECK-NEXT:    vst1.8 {d20, d21}, [r0]!
365; CHECK-NEXT:    vst1.64 {d22, d23}, [r0]
366; CHECK-NEXT:    bx lr
367  %tmp = tail call %struct.uint8x16x4_t @llvm.arm.neon.vld1x4.v16i8.p0(ptr %a)
368  ret %struct.uint8x16x4_t %tmp
369}
370
371; Post-increment.
372
373define %struct.uint16x4x2_t @test_vld1_u16_x2_post_imm(ptr %a, ptr %ptr) nounwind {
374; CHECK-LABEL: test_vld1_u16_x2_post_imm:
375; CHECK:         .save {r11, lr}
376; CHECK-NEXT:    push {r11, lr}
377; CHECK-NEXT:    vld1.16 {d16, d17}, [r0]!
378; CHECK-NEXT:    vmov lr, r12, d16
379; CHECK-NEXT:    str r0, [r1]
380; CHECK-NEXT:    vmov r2, r3, d17
381; CHECK-NEXT:    mov r0, lr
382; CHECK-NEXT:    mov r1, r12
383; CHECK-NEXT:    pop {r11, pc}
384  %ld = tail call %struct.uint16x4x2_t @llvm.arm.neon.vld1x2.v4i16.p0(ptr %a)
385  %tmp = getelementptr i16, ptr %a, i32 8
386  store ptr %tmp, ptr %ptr
387  ret %struct.uint16x4x2_t %ld
388}
389
390define %struct.uint16x4x2_t @test_vld1_u16_x2_post_reg(ptr %a, ptr %ptr, i32 %inc) nounwind {
391; CHECK-LABEL: test_vld1_u16_x2_post_reg:
392; CHECK:         .save {r11, lr}
393; CHECK-NEXT:    push {r11, lr}
394; CHECK-NEXT:    lsl r2, r2, #1
395; CHECK-NEXT:    vld1.16 {d16, d17}, [r0], r2
396; CHECK-NEXT:    vmov lr, r12, d16
397; CHECK-NEXT:    str r0, [r1]
398; CHECK-NEXT:    vmov r2, r3, d17
399; CHECK-NEXT:    mov r0, lr
400; CHECK-NEXT:    mov r1, r12
401; CHECK-NEXT:    pop {r11, pc}
402  %ld = tail call %struct.uint16x4x2_t @llvm.arm.neon.vld1x2.v4i16.p0(ptr %a)
403  %tmp = getelementptr i16, ptr %a, i32 %inc
404  store ptr %tmp, ptr %ptr
405  ret %struct.uint16x4x2_t %ld
406}
407
408define %struct.uint16x4x3_t @test_vld1_u16_x3_post_imm(ptr %a, ptr %ptr) nounwind {
409; CHECK-LABEL: test_vld1_u16_x3_post_imm:
410; CHECK:         vld1.16 {d16, d17, d18}, [r1]!
411; CHECK-NEXT:    str r1, [r2]
412; CHECK-NEXT:    vst1.16 {d16}, [r0:64]!
413; CHECK-NEXT:    vst1.16 {d17}, [r0:64]!
414; CHECK-NEXT:    vstr d18, [r0]
415; CHECK-NEXT:    bx lr
416  %ld = tail call %struct.uint16x4x3_t @llvm.arm.neon.vld1x3.v4i16.p0(ptr %a)
417  %tmp = getelementptr i16, ptr %a, i32 12
418  store ptr %tmp, ptr %ptr
419  ret %struct.uint16x4x3_t %ld
420}
421
422define %struct.uint16x4x3_t @test_vld1_u16_x3_post_reg(ptr %a, ptr %ptr, i32 %inc) nounwind {
423; CHECK-LABEL: test_vld1_u16_x3_post_reg:
424; CHECK:         lsl r3, r3, #1
425; CHECK-NEXT:    vld1.16 {d16, d17, d18}, [r1], r3
426; CHECK-NEXT:    str r1, [r2]
427; CHECK-NEXT:    vst1.16 {d16}, [r0:64]!
428; CHECK-NEXT:    vst1.16 {d17}, [r0:64]!
429; CHECK-NEXT:    vstr d18, [r0]
430; CHECK-NEXT:    bx lr
431  %ld = tail call %struct.uint16x4x3_t @llvm.arm.neon.vld1x3.v4i16.p0(ptr %a)
432  %tmp = getelementptr i16, ptr %a, i32 %inc
433  store ptr %tmp, ptr %ptr
434  ret %struct.uint16x4x3_t %ld
435}
436
437define %struct.uint16x4x4_t @test_vld1_u16_x4_post_imm(ptr %a, ptr %ptr) nounwind {
438; CHECK-LABEL: test_vld1_u16_x4_post_imm:
439; CHECK:         vld1.16 {d16, d17, d18, d19}, [r1]!
440; CHECK-NEXT:    str r1, [r2]
441; CHECK-NEXT:    vst1.16 {d16}, [r0:64]!
442; CHECK-NEXT:    vst1.16 {d17}, [r0:64]!
443; CHECK-NEXT:    vst1.16 {d18}, [r0:64]!
444; CHECK-NEXT:    vstr d19, [r0]
445; CHECK-NEXT:    bx lr
446  %ld = tail call %struct.uint16x4x4_t @llvm.arm.neon.vld1x4.v4i16.p0(ptr %a)
447  %tmp = getelementptr i16, ptr %a, i32 16
448  store ptr %tmp, ptr %ptr
449  ret %struct.uint16x4x4_t %ld
450}
451
452define %struct.uint16x4x4_t @test_vld1_u16_x4_post_reg(ptr %a, ptr %ptr, i32 %inc) nounwind {
453; CHECK-LABEL: test_vld1_u16_x4_post_reg:
454; CHECK:         lsl r3, r3, #1
455; CHECK-NEXT:    vld1.16 {d16, d17, d18, d19}, [r1], r3
456; CHECK-NEXT:    str r1, [r2]
457; CHECK-NEXT:    vst1.16 {d16}, [r0:64]!
458; CHECK-NEXT:    vst1.16 {d17}, [r0:64]!
459; CHECK-NEXT:    vst1.16 {d18}, [r0:64]!
460; CHECK-NEXT:    vstr d19, [r0]
461; CHECK-NEXT:    bx lr
462  %ld = tail call %struct.uint16x4x4_t @llvm.arm.neon.vld1x4.v4i16.p0(ptr %a)
463  %tmp = getelementptr i16, ptr %a, i32 %inc
464  store ptr %tmp, ptr %ptr
465  ret %struct.uint16x4x4_t %ld
466}
467
468define %struct.uint32x2x2_t @test_vld1_u32_x2_post_imm(ptr %a, ptr %ptr) nounwind {
469; CHECK-LABEL: test_vld1_u32_x2_post_imm:
470; CHECK:         .save {r11, lr}
471; CHECK-NEXT:    push {r11, lr}
472; CHECK-NEXT:    vld1.32 {d16, d17}, [r0]!
473; CHECK-NEXT:    vmov lr, r12, d16
474; CHECK-NEXT:    str r0, [r1]
475; CHECK-NEXT:    vmov r2, r3, d17
476; CHECK-NEXT:    mov r0, lr
477; CHECK-NEXT:    mov r1, r12
478; CHECK-NEXT:    pop {r11, pc}
479  %ld = tail call %struct.uint32x2x2_t @llvm.arm.neon.vld1x2.v2i32.p0(ptr %a)
480  %tmp = getelementptr i32, ptr %a, i32 4
481  store ptr %tmp, ptr %ptr
482  ret %struct.uint32x2x2_t %ld
483}
484
485define %struct.uint32x2x2_t @test_vld1_u32_x2_post_reg(ptr %a, ptr %ptr, i32 %inc) nounwind {
486; CHECK-LABEL: test_vld1_u32_x2_post_reg:
487; CHECK:         .save {r11, lr}
488; CHECK-NEXT:    push {r11, lr}
489; CHECK-NEXT:    lsl r2, r2, #2
490; CHECK-NEXT:    vld1.32 {d16, d17}, [r0], r2
491; CHECK-NEXT:    vmov lr, r12, d16
492; CHECK-NEXT:    str r0, [r1]
493; CHECK-NEXT:    vmov r2, r3, d17
494; CHECK-NEXT:    mov r0, lr
495; CHECK-NEXT:    mov r1, r12
496; CHECK-NEXT:    pop {r11, pc}
497  %ld = tail call %struct.uint32x2x2_t @llvm.arm.neon.vld1x2.v2i32.p0(ptr %a)
498  %tmp = getelementptr i32, ptr %a, i32 %inc
499  store ptr %tmp, ptr %ptr
500  ret %struct.uint32x2x2_t %ld
501}
502
503define %struct.uint32x2x3_t @test_vld1_u32_x3_post_imm(ptr %a, ptr %ptr) nounwind {
504; CHECK-LABEL: test_vld1_u32_x3_post_imm:
505; CHECK:         vld1.32 {d16, d17, d18}, [r1]!
506; CHECK-NEXT:    str r1, [r2]
507; CHECK-NEXT:    vst1.32 {d16}, [r0:64]!
508; CHECK-NEXT:    vst1.32 {d17}, [r0:64]!
509; CHECK-NEXT:    vstr d18, [r0]
510; CHECK-NEXT:    bx lr
511  %ld = tail call %struct.uint32x2x3_t @llvm.arm.neon.vld1x3.v2i32.p0(ptr %a)
512  %tmp = getelementptr i32, ptr %a, i32 6
513  store ptr %tmp, ptr %ptr
514  ret %struct.uint32x2x3_t %ld
515}
516
517define %struct.uint32x2x3_t @test_vld1_u32_x3_post_reg(ptr %a, ptr %ptr, i32 %inc) nounwind {
518; CHECK-LABEL: test_vld1_u32_x3_post_reg:
519; CHECK:         lsl r3, r3, #2
520; CHECK-NEXT:    vld1.32 {d16, d17, d18}, [r1], r3
521; CHECK-NEXT:    str r1, [r2]
522; CHECK-NEXT:    vst1.32 {d16}, [r0:64]!
523; CHECK-NEXT:    vst1.32 {d17}, [r0:64]!
524; CHECK-NEXT:    vstr d18, [r0]
525; CHECK-NEXT:    bx lr
526  %ld = tail call %struct.uint32x2x3_t @llvm.arm.neon.vld1x3.v2i32.p0(ptr %a)
527  %tmp = getelementptr i32, ptr %a, i32 %inc
528  store ptr %tmp, ptr %ptr
529  ret %struct.uint32x2x3_t %ld
530}
531
532define %struct.uint32x2x4_t @test_vld1_u32_x4_post_imm(ptr %a, ptr %ptr) nounwind {
533; CHECK-LABEL: test_vld1_u32_x4_post_imm:
534; CHECK:         vld1.32 {d16, d17, d18, d19}, [r1]!
535; CHECK-NEXT:    str r1, [r2]
536; CHECK-NEXT:    vst1.32 {d16}, [r0:64]!
537; CHECK-NEXT:    vst1.32 {d17}, [r0:64]!
538; CHECK-NEXT:    vst1.32 {d18}, [r0:64]!
539; CHECK-NEXT:    vstr d19, [r0]
540; CHECK-NEXT:    bx lr
541  %ld = tail call %struct.uint32x2x4_t @llvm.arm.neon.vld1x4.v2i32.p0(ptr %a)
542  %tmp = getelementptr i32, ptr %a, i32 8
543  store ptr %tmp, ptr %ptr
544  ret %struct.uint32x2x4_t %ld
545}
546
547define %struct.uint32x2x4_t @test_vld1_u32_x4_post_reg(ptr %a, ptr %ptr, i32 %inc) nounwind {
548; CHECK-LABEL: test_vld1_u32_x4_post_reg:
549; CHECK:         lsl r3, r3, #2
550; CHECK-NEXT:    vld1.32 {d16, d17, d18, d19}, [r1], r3
551; CHECK-NEXT:    str r1, [r2]
552; CHECK-NEXT:    vst1.32 {d16}, [r0:64]!
553; CHECK-NEXT:    vst1.32 {d17}, [r0:64]!
554; CHECK-NEXT:    vst1.32 {d18}, [r0:64]!
555; CHECK-NEXT:    vstr d19, [r0]
556; CHECK-NEXT:    bx lr
557  %ld = tail call %struct.uint32x2x4_t @llvm.arm.neon.vld1x4.v2i32.p0(ptr %a)
558  %tmp = getelementptr i32, ptr %a, i32 %inc
559  store ptr %tmp, ptr %ptr
560  ret %struct.uint32x2x4_t %ld
561}
562
563define %struct.uint64x1x2_t @test_vld1_u64_x2_post_imm(ptr %a, ptr %ptr) nounwind {
564; CHECK-LABEL: test_vld1_u64_x2_post_imm:
565; CHECK:         .save {r11, lr}
566; CHECK-NEXT:    push {r11, lr}
567; CHECK-NEXT:    vld1.64 {d16, d17}, [r0]!
568; CHECK-NEXT:    vmov lr, r12, d16
569; CHECK-NEXT:    str r0, [r1]
570; CHECK-NEXT:    vmov r2, r3, d17
571; CHECK-NEXT:    mov r0, lr
572; CHECK-NEXT:    mov r1, r12
573; CHECK-NEXT:    pop {r11, pc}
574  %ld = tail call %struct.uint64x1x2_t @llvm.arm.neon.vld1x2.v1i64.p0(ptr %a)
575  %tmp = getelementptr i64, ptr %a, i32 2
576  store ptr %tmp, ptr %ptr
577  ret %struct.uint64x1x2_t %ld
578}
579
580define %struct.uint64x1x2_t @test_vld1_u64_x2_post_reg(ptr %a, ptr %ptr, i32 %inc) nounwind {
581; CHECK-LABEL: test_vld1_u64_x2_post_reg:
582; CHECK:         .save {r11, lr}
583; CHECK-NEXT:    push {r11, lr}
584; CHECK-NEXT:    lsl r2, r2, #3
585; CHECK-NEXT:    vld1.64 {d16, d17}, [r0], r2
586; CHECK-NEXT:    vmov lr, r12, d16
587; CHECK-NEXT:    str r0, [r1]
588; CHECK-NEXT:    vmov r2, r3, d17
589; CHECK-NEXT:    mov r0, lr
590; CHECK-NEXT:    mov r1, r12
591; CHECK-NEXT:    pop {r11, pc}
592  %ld = tail call %struct.uint64x1x2_t @llvm.arm.neon.vld1x2.v1i64.p0(ptr %a)
593  %tmp = getelementptr i64, ptr %a, i32 %inc
594  store ptr %tmp, ptr %ptr
595  ret %struct.uint64x1x2_t %ld
596}
597
598define %struct.uint64x1x3_t @test_vld1_u64_x3_post_imm(ptr %a, ptr %ptr) nounwind {
599; CHECK-LABEL: test_vld1_u64_x3_post_imm:
600; CHECK:         vld1.64 {d16, d17, d18}, [r1]!
601; CHECK-NEXT:    str r1, [r2]
602; CHECK-NEXT:    vst1.64 {d16}, [r0:64]!
603; CHECK-NEXT:    vst1.64 {d17}, [r0:64]!
604; CHECK-NEXT:    vstr d18, [r0]
605; CHECK-NEXT:    bx lr
606  %ld = tail call %struct.uint64x1x3_t @llvm.arm.neon.vld1x3.v1i64.p0(ptr %a)
607  %tmp = getelementptr i64, ptr %a, i32 3
608  store ptr %tmp, ptr %ptr
609  ret %struct.uint64x1x3_t %ld
610}
611
612define %struct.uint64x1x3_t @test_vld1_u64_x3_post_reg(ptr %a, ptr %ptr, i32 %inc) nounwind {
613; CHECK-LABEL: test_vld1_u64_x3_post_reg:
614; CHECK:         lsl r3, r3, #3
615; CHECK-NEXT:    vld1.64 {d16, d17, d18}, [r1], r3
616; CHECK-NEXT:    str r1, [r2]
617; CHECK-NEXT:    vst1.64 {d16}, [r0:64]!
618; CHECK-NEXT:    vst1.64 {d17}, [r0:64]!
619; CHECK-NEXT:    vstr d18, [r0]
620; CHECK-NEXT:    bx lr
621  %ld = tail call %struct.uint64x1x3_t @llvm.arm.neon.vld1x3.v1i64.p0(ptr %a)
622  %tmp = getelementptr i64, ptr %a, i32 %inc
623  store ptr %tmp, ptr %ptr
624  ret %struct.uint64x1x3_t %ld
625}
626
627define %struct.uint64x1x4_t @test_vld1_u64_x4_post_imm(ptr %a, ptr %ptr) nounwind {
628; CHECK-LABEL: test_vld1_u64_x4_post_imm:
629; CHECK:         vld1.64 {d16, d17, d18, d19}, [r1]!
630; CHECK-NEXT:    str r1, [r2]
631; CHECK-NEXT:    vst1.64 {d16}, [r0:64]!
632; CHECK-NEXT:    vst1.64 {d17}, [r0:64]!
633; CHECK-NEXT:    vst1.64 {d18}, [r0:64]!
634; CHECK-NEXT:    vstr d19, [r0]
635; CHECK-NEXT:    bx lr
636  %ld = tail call %struct.uint64x1x4_t @llvm.arm.neon.vld1x4.v1i64.p0(ptr %a)
637  %tmp = getelementptr i64, ptr %a, i32 4
638  store ptr %tmp, ptr %ptr
639  ret %struct.uint64x1x4_t %ld
640}
641
642define %struct.uint64x1x4_t @test_vld1_u64_x4_post_reg(ptr %a, ptr %ptr, i32 %inc) nounwind {
643; CHECK-LABEL: test_vld1_u64_x4_post_reg:
644; CHECK:         lsl r3, r3, #3
645; CHECK-NEXT:    vld1.64 {d16, d17, d18, d19}, [r1], r3
646; CHECK-NEXT:    str r1, [r2]
647; CHECK-NEXT:    vst1.64 {d16}, [r0:64]!
648; CHECK-NEXT:    vst1.64 {d17}, [r0:64]!
649; CHECK-NEXT:    vst1.64 {d18}, [r0:64]!
650; CHECK-NEXT:    vstr d19, [r0]
651; CHECK-NEXT:    bx lr
652  %ld = tail call %struct.uint64x1x4_t @llvm.arm.neon.vld1x4.v1i64.p0(ptr %a)
653  %tmp = getelementptr i64, ptr %a, i32 %inc
654  store ptr %tmp, ptr %ptr
655  ret %struct.uint64x1x4_t %ld
656}
657
658define %struct.uint8x8x2_t @test_vld1_u8_x2_post_imm(ptr %a, ptr %ptr) nounwind {
659; CHECK-LABEL: test_vld1_u8_x2_post_imm:
660; CHECK:         .save {r11, lr}
661; CHECK-NEXT:    push {r11, lr}
662; CHECK-NEXT:    vld1.8 {d16, d17}, [r0]!
663; CHECK-NEXT:    vmov lr, r12, d16
664; CHECK-NEXT:    str r0, [r1]
665; CHECK-NEXT:    vmov r2, r3, d17
666; CHECK-NEXT:    mov r0, lr
667; CHECK-NEXT:    mov r1, r12
668; CHECK-NEXT:    pop {r11, pc}
669  %ld = tail call %struct.uint8x8x2_t @llvm.arm.neon.vld1x2.v8i8.p0(ptr %a)
670  %tmp = getelementptr i8, ptr %a, i32 16
671  store ptr %tmp, ptr %ptr
672  ret %struct.uint8x8x2_t %ld
673}
674
675define %struct.uint8x8x2_t @test_vld1_u8_x2_post_reg(ptr %a, ptr %ptr, i32 %inc) nounwind {
676; CHECK-LABEL: test_vld1_u8_x2_post_reg:
677; CHECK:         .save {r11, lr}
678; CHECK-NEXT:    push {r11, lr}
679; CHECK-NEXT:    vld1.8 {d16, d17}, [r0], r2
680; CHECK-NEXT:    vmov lr, r12, d16
681; CHECK-NEXT:    str r0, [r1]
682; CHECK-NEXT:    vmov r2, r3, d17
683; CHECK-NEXT:    mov r0, lr
684; CHECK-NEXT:    mov r1, r12
685; CHECK-NEXT:    pop {r11, pc}
686  %ld = tail call %struct.uint8x8x2_t @llvm.arm.neon.vld1x2.v8i8.p0(ptr %a)
687  %tmp = getelementptr i8, ptr %a, i32 %inc
688  store ptr %tmp, ptr %ptr
689  ret %struct.uint8x8x2_t %ld
690}
691
692define %struct.uint8x8x3_t @test_vld1_u8_x3_post_imm(ptr %a, ptr %ptr) nounwind {
693; CHECK-LABEL: test_vld1_u8_x3_post_imm:
694; CHECK:         vld1.8 {d16, d17, d18}, [r1]!
695; CHECK-NEXT:    str r1, [r2]
696; CHECK-NEXT:    vst1.8 {d16}, [r0:64]!
697; CHECK-NEXT:    vst1.8 {d17}, [r0:64]!
698; CHECK-NEXT:    vstr d18, [r0]
699; CHECK-NEXT:    bx lr
700  %ld = tail call %struct.uint8x8x3_t @llvm.arm.neon.vld1x3.v8i8.p0(ptr %a)
701  %tmp = getelementptr i8, ptr %a, i32 24
702  store ptr %tmp, ptr %ptr
703  ret %struct.uint8x8x3_t %ld
704}
705
706define %struct.uint8x8x3_t @test_vld1_u8_x3_post_reg(ptr %a, ptr %ptr, i32 %inc) nounwind {
707; CHECK-LABEL: test_vld1_u8_x3_post_reg:
708; CHECK:         vld1.8 {d16, d17, d18}, [r1], r3
709; CHECK-NEXT:    str r1, [r2]
710; CHECK-NEXT:    vst1.8 {d16}, [r0:64]!
711; CHECK-NEXT:    vst1.8 {d17}, [r0:64]!
712; CHECK-NEXT:    vstr d18, [r0]
713; CHECK-NEXT:    bx lr
714  %ld = tail call %struct.uint8x8x3_t @llvm.arm.neon.vld1x3.v8i8.p0(ptr %a)
715  %tmp = getelementptr i8, ptr %a, i32 %inc
716  store ptr %tmp, ptr %ptr
717  ret %struct.uint8x8x3_t %ld
718}
719
720define %struct.uint8x8x4_t @test_vld1_u8_x4_post_imm(ptr %a, ptr %ptr) nounwind {
721; CHECK-LABEL: test_vld1_u8_x4_post_imm:
722; CHECK:         vld1.8 {d16, d17, d18, d19}, [r1]!
723; CHECK-NEXT:    str r1, [r2]
724; CHECK-NEXT:    vst1.8 {d16}, [r0:64]!
725; CHECK-NEXT:    vst1.8 {d17}, [r0:64]!
726; CHECK-NEXT:    vst1.8 {d18}, [r0:64]!
727; CHECK-NEXT:    vstr d19, [r0]
728; CHECK-NEXT:    bx lr
729  %ld = tail call %struct.uint8x8x4_t @llvm.arm.neon.vld1x4.v8i8.p0(ptr %a)
730  %tmp = getelementptr i8, ptr %a, i32 32
731  store ptr %tmp, ptr %ptr
732  ret %struct.uint8x8x4_t %ld
733}
734
735define %struct.uint8x8x4_t @test_vld1_u8_x4_post_reg(ptr %a, ptr %ptr, i32 %inc) nounwind {
736; CHECK-LABEL: test_vld1_u8_x4_post_reg:
737; CHECK:         vld1.8 {d16, d17, d18, d19}, [r1], r3
738; CHECK-NEXT:    str r1, [r2]
739; CHECK-NEXT:    vst1.8 {d16}, [r0:64]!
740; CHECK-NEXT:    vst1.8 {d17}, [r0:64]!
741; CHECK-NEXT:    vst1.8 {d18}, [r0:64]!
742; CHECK-NEXT:    vstr d19, [r0]
743; CHECK-NEXT:    bx lr
744  %ld = tail call %struct.uint8x8x4_t @llvm.arm.neon.vld1x4.v8i8.p0(ptr %a)
745  %tmp = getelementptr i8, ptr %a, i32 %inc
746  store ptr %tmp, ptr %ptr
747  ret %struct.uint8x8x4_t %ld
748}
749
750define %struct.uint16x8x2_t @test_vld1q_u16_x2_post_imm(ptr %a, ptr %ptr) nounwind {
751; CHECK-LABEL: test_vld1q_u16_x2_post_imm:
752; CHECK:         vld1.16 {d16, d17, d18, d19}, [r1]!
753; CHECK-NEXT:    str r1, [r2]
754; CHECK-NEXT:    vst1.16 {d16, d17}, [r0]!
755; CHECK-NEXT:    vst1.64 {d18, d19}, [r0]
756; CHECK-NEXT:    bx lr
757  %ld = tail call %struct.uint16x8x2_t @llvm.arm.neon.vld1x2.v8i16.p0(ptr %a)
758  %tmp = getelementptr i16, ptr %a, i32 16
759  store ptr %tmp, ptr %ptr
760  ret %struct.uint16x8x2_t %ld
761}
762
763define %struct.uint16x8x3_t @test_vld1q_u16_x3_post_imm(ptr %a, ptr %ptr) nounwind {
764; CHECK-LABEL: test_vld1q_u16_x3_post_imm:
765; CHECK:         vld1.16 {d16, d17, d18}, [r1]!
766; CHECK-NEXT:    vld1.16 {d19, d20, d21}, [r1]!
767; CHECK-NEXT:    str r1, [r2]
768; CHECK-NEXT:    vst1.16 {d16, d17}, [r0]!
769; CHECK-NEXT:    vst1.16 {d18, d19}, [r0]!
770; CHECK-NEXT:    vst1.64 {d20, d21}, [r0]
771; CHECK-NEXT:    bx lr
772  %ld = tail call %struct.uint16x8x3_t @llvm.arm.neon.vld1x3.v8i16.p0(ptr %a)
773  %tmp = getelementptr i16, ptr %a, i32 24
774  store ptr %tmp, ptr %ptr
775  ret %struct.uint16x8x3_t %ld
776}
777
778define %struct.uint16x8x4_t @test_vld1q_u16_x4_post_imm(ptr %a, ptr %ptr) nounwind {
779; CHECK-LABEL: test_vld1q_u16_x4_post_imm:
780; CHECK:         vld1.16 {d16, d17, d18, d19}, [r1]!
781; CHECK-NEXT:    vld1.16 {d20, d21, d22, d23}, [r1]!
782; CHECK-NEXT:    str r1, [r2]
783; CHECK-NEXT:    vst1.16 {d16, d17}, [r0]!
784; CHECK-NEXT:    vst1.16 {d18, d19}, [r0]!
785; CHECK-NEXT:    vst1.16 {d20, d21}, [r0]!
786; CHECK-NEXT:    vst1.64 {d22, d23}, [r0]
787; CHECK-NEXT:    bx lr
788  %ld = tail call %struct.uint16x8x4_t @llvm.arm.neon.vld1x4.v8i16.p0(ptr %a)
789  %tmp = getelementptr i16, ptr %a, i32 32
790  store ptr %tmp, ptr %ptr
791  ret %struct.uint16x8x4_t %ld
792}
793
794define %struct.uint32x4x2_t @test_vld1q_u32_x2_post_imm(ptr %a, ptr %ptr) nounwind {
795; CHECK-LABEL: test_vld1q_u32_x2_post_imm:
796; CHECK:         vld1.32 {d16, d17, d18, d19}, [r1]!
797; CHECK-NEXT:    str r1, [r2]
798; CHECK-NEXT:    vst1.32 {d16, d17}, [r0]!
799; CHECK-NEXT:    vst1.64 {d18, d19}, [r0]
800; CHECK-NEXT:    bx lr
801  %ld = tail call %struct.uint32x4x2_t @llvm.arm.neon.vld1x2.v4i32.p0(ptr %a)
802  %tmp = getelementptr i32, ptr %a, i32 8
803  store ptr %tmp, ptr %ptr
804  ret %struct.uint32x4x2_t %ld
805}
806
807define %struct.uint32x4x3_t @test_vld1q_u32_x3_post_imm(ptr %a, ptr %ptr) nounwind {
808; CHECK-LABEL: test_vld1q_u32_x3_post_imm:
809; CHECK:         vld1.32 {d16, d17, d18}, [r1]!
810; CHECK-NEXT:    vld1.32 {d19, d20, d21}, [r1]!
811; CHECK-NEXT:    str r1, [r2]
812; CHECK-NEXT:    vst1.32 {d16, d17}, [r0]!
813; CHECK-NEXT:    vst1.32 {d18, d19}, [r0]!
814; CHECK-NEXT:    vst1.64 {d20, d21}, [r0]
815; CHECK-NEXT:    bx lr
816  %ld = tail call %struct.uint32x4x3_t @llvm.arm.neon.vld1x3.v4i32.p0(ptr %a)
817  %tmp = getelementptr i32, ptr %a, i32 12
818  store ptr %tmp, ptr %ptr
819  ret %struct.uint32x4x3_t %ld
820}
821
822define %struct.uint32x4x4_t @test_vld1q_u32_x4_post_imm(ptr %a, ptr %ptr) nounwind {
823; CHECK-LABEL: test_vld1q_u32_x4_post_imm:
824; CHECK:         vld1.32 {d16, d17, d18, d19}, [r1]!
825; CHECK-NEXT:    vld1.32 {d20, d21, d22, d23}, [r1]!
826; CHECK-NEXT:    str r1, [r2]
827; CHECK-NEXT:    vst1.32 {d16, d17}, [r0]!
828; CHECK-NEXT:    vst1.32 {d18, d19}, [r0]!
829; CHECK-NEXT:    vst1.32 {d20, d21}, [r0]!
830; CHECK-NEXT:    vst1.64 {d22, d23}, [r0]
831; CHECK-NEXT:    bx lr
832  %ld = tail call %struct.uint32x4x4_t @llvm.arm.neon.vld1x4.v4i32.p0(ptr %a)
833  %tmp = getelementptr i32, ptr %a, i32 16
834  store ptr %tmp, ptr %ptr
835  ret %struct.uint32x4x4_t %ld
836}
837
838define %struct.uint64x2x2_t @test_vld1q_u64_x2_post_imm(ptr %a, ptr %ptr) nounwind {
839; CHECK-LABEL: test_vld1q_u64_x2_post_imm:
840; CHECK:         vld1.64 {d16, d17, d18, d19}, [r1]!
841; CHECK-NEXT:    str r1, [r2]
842; CHECK-NEXT:    vst1.64 {d16, d17}, [r0]!
843; CHECK-NEXT:    vst1.64 {d18, d19}, [r0]
844; CHECK-NEXT:    bx lr
845  %ld = tail call %struct.uint64x2x2_t @llvm.arm.neon.vld1x2.v2i64.p0(ptr %a)
846  %tmp = getelementptr i64, ptr %a, i32 4
847  store ptr %tmp, ptr %ptr
848  ret %struct.uint64x2x2_t %ld
849}
850
851define %struct.uint64x2x3_t @test_vld1q_u64_x3_post_imm(ptr %a, ptr %ptr) nounwind {
852; CHECK-LABEL: test_vld1q_u64_x3_post_imm:
853; CHECK:         vld1.64 {d16, d17, d18}, [r1]!
854; CHECK-NEXT:    vld1.64 {d19, d20, d21}, [r1]!
855; CHECK-NEXT:    str r1, [r2]
856; CHECK-NEXT:    vst1.64 {d16, d17}, [r0]!
857; CHECK-NEXT:    vst1.64 {d18, d19}, [r0]!
858; CHECK-NEXT:    vst1.64 {d20, d21}, [r0]
859; CHECK-NEXT:    bx lr
860  %ld = tail call %struct.uint64x2x3_t @llvm.arm.neon.vld1x3.v2i64.p0(ptr %a)
861  %tmp = getelementptr i64, ptr %a, i32 6
862  store ptr %tmp, ptr %ptr
863  ret %struct.uint64x2x3_t %ld
864}
865
866define %struct.uint64x2x4_t @test_vld1q_u64_x4_post_imm(ptr %a, ptr %ptr) nounwind {
867; CHECK-LABEL: test_vld1q_u64_x4_post_imm:
868; CHECK:         vld1.64 {d16, d17, d18, d19}, [r1]!
869; CHECK-NEXT:    vld1.64 {d20, d21, d22, d23}, [r1]!
870; CHECK-NEXT:    str r1, [r2]
871; CHECK-NEXT:    vst1.64 {d16, d17}, [r0]!
872; CHECK-NEXT:    vst1.64 {d18, d19}, [r0]!
873; CHECK-NEXT:    vst1.64 {d20, d21}, [r0]!
874; CHECK-NEXT:    vst1.64 {d22, d23}, [r0]
875; CHECK-NEXT:    bx lr
876  %ld = tail call %struct.uint64x2x4_t @llvm.arm.neon.vld1x4.v2i64.p0(ptr %a)
877  %tmp = getelementptr i64, ptr %a, i32 8
878  store ptr %tmp, ptr %ptr
879  ret %struct.uint64x2x4_t %ld
880}
881
882define %struct.uint8x16x2_t @test_vld1q_u8_x2_post_imm(ptr %a, ptr %ptr) nounwind {
883; CHECK-LABEL: test_vld1q_u8_x2_post_imm:
884; CHECK:         vld1.8 {d16, d17, d18, d19}, [r1]!
885; CHECK-NEXT:    str r1, [r2]
886; CHECK-NEXT:    vst1.8 {d16, d17}, [r0]!
887; CHECK-NEXT:    vst1.64 {d18, d19}, [r0]
888; CHECK-NEXT:    bx lr
889  %ld = tail call %struct.uint8x16x2_t @llvm.arm.neon.vld1x2.v16i8.p0(ptr %a)
890  %tmp = getelementptr i8, ptr %a, i32 32
891  store ptr %tmp, ptr %ptr
892  ret %struct.uint8x16x2_t %ld
893}
894
895define %struct.uint8x16x3_t @test_vld1q_u8_x3_post_imm(ptr %a, ptr %ptr) nounwind {
896; CHECK-LABEL: test_vld1q_u8_x3_post_imm:
897; CHECK:         vld1.8 {d16, d17, d18}, [r1]!
898; CHECK-NEXT:    vld1.8 {d19, d20, d21}, [r1]!
899; CHECK-NEXT:    str r1, [r2]
900; CHECK-NEXT:    vst1.8 {d16, d17}, [r0]!
901; CHECK-NEXT:    vst1.8 {d18, d19}, [r0]!
902; CHECK-NEXT:    vst1.64 {d20, d21}, [r0]
903; CHECK-NEXT:    bx lr
904  %ld = tail call %struct.uint8x16x3_t @llvm.arm.neon.vld1x3.v16i8.p0(ptr %a)
905  %tmp = getelementptr i8, ptr %a, i32 48
906  store ptr %tmp, ptr %ptr
907  ret %struct.uint8x16x3_t %ld
908}
909
910define %struct.uint8x16x4_t @test_vld1q_u8_x4_post_imm(ptr %a, ptr %ptr) nounwind {
911; CHECK-LABEL: test_vld1q_u8_x4_post_imm:
912; CHECK:         vld1.8 {d16, d17, d18, d19}, [r1]!
913; CHECK-NEXT:    vld1.8 {d20, d21, d22, d23}, [r1]!
914; CHECK-NEXT:    str r1, [r2]
915; CHECK-NEXT:    vst1.8 {d16, d17}, [r0]!
916; CHECK-NEXT:    vst1.8 {d18, d19}, [r0]!
917; CHECK-NEXT:    vst1.8 {d20, d21}, [r0]!
918; CHECK-NEXT:    vst1.64 {d22, d23}, [r0]
919; CHECK-NEXT:    bx lr
920  %ld = tail call %struct.uint8x16x4_t @llvm.arm.neon.vld1x4.v16i8.p0(ptr %a)
921  %tmp = getelementptr i8, ptr %a, i32 64
922  store ptr %tmp, ptr %ptr
923  ret %struct.uint8x16x4_t %ld
924}
925