xref: /llvm-project/llvm/test/CodeGen/ARM/ParallelDSP/smlad1.ll (revision 9bd7b149c2f577086a716ccd0363d057caa3d98a)
1; RUN: opt -mtriple=armv8m.main-none-none-eabi -mattr=+dsp < %s -arm-parallel-dsp -S | FileCheck %s
2
3; CHECK-LABEL: @test1
4; CHECK:  %mac1{{\.}}026 = phi i32 [ [[V8:%[0-9]+]], %for.body ], [ 0, %for.body.preheader ]
5; CHECK:  [[V5:%[0-9]+]] = load i32, ptr %arrayidx, align 2
6; CHECK:  [[V7:%[0-9]+]] = load i32, ptr %arrayidx3, align 2
7; CHECK:  [[V8]] = call i32 @llvm.arm.smlad(i32 [[V7]], i32 [[V5]], i32 %mac1{{\.}}026)
8
9define dso_local i32 @test1(i32 %arg, ptr nocapture readnone %arg1, ptr nocapture readonly %arg2, ptr nocapture readonly %arg3) {
10entry:
11  %cmp24 = icmp sgt i32 %arg, 0
12  br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup
13
14for.body.preheader:
15  %.pre = load i16, ptr %arg3, align 2
16  %.pre27 = load i16, ptr %arg2, align 2
17  br label %for.body
18
19for.cond.cleanup:
20  %mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add11, %for.body ]
21  ret i32 %mac1.0.lcssa
22
23for.body:
24  %mac1.026 = phi i32 [ %add11, %for.body ], [ 0, %for.body.preheader ]
25  %i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]
26  %arrayidx = getelementptr inbounds i16, ptr %arg3, i32 %i.025
27  %0 = load i16, ptr %arrayidx, align 2
28  %add = add nuw nsw i32 %i.025, 1
29  %arrayidx1 = getelementptr inbounds i16, ptr %arg3, i32 %add
30  %1 = load i16, ptr %arrayidx1, align 2
31  %arrayidx3 = getelementptr inbounds i16, ptr %arg2, i32 %i.025
32  %2 = load i16, ptr %arrayidx3, align 2
33  %conv = sext i16 %2 to i32
34  %conv4 = sext i16 %0 to i32
35  %mul = mul nsw i32 %conv, %conv4
36  %arrayidx6 = getelementptr inbounds i16, ptr %arg2, i32 %add
37  %3 = load i16, ptr %arrayidx6, align 2
38  %conv7 = sext i16 %3 to i32
39  %conv8 = sext i16 %1 to i32
40  %mul9 = mul nsw i32 %conv7, %conv8
41  %add10 = add i32 %mul, %mac1.026
42
43; And here the Add is the LHS, the Mul the RHS
44  %add11 = add i32 %add10, %mul9
45
46  %exitcond = icmp ne i32 %add, %arg
47  br i1 %exitcond, label %for.body, label %for.cond.cleanup
48}
49
50; Here we have i8 loads, which we do want to support, but don't handle yet.
51;
52; CHECK-LABEL: @test2
53; CHECK-NOT:   call i32 @llvm.arm.smlad
54;
55define dso_local i32 @test2(i32 %arg, ptr nocapture readnone %arg1, ptr nocapture readonly %arg2, ptr nocapture readonly %arg3) {
56entry:
57  %cmp24 = icmp sgt i32 %arg, 0
58  br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup
59
60for.body.preheader:
61  %.pre = load i8, ptr %arg3, align 2
62  %.pre27 = load i8, ptr %arg2, align 2
63  br label %for.body
64
65for.cond.cleanup:
66  %mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add11, %for.body ]
67  ret i32 %mac1.0.lcssa
68
69for.body:
70  %mac1.026 = phi i32 [ %add11, %for.body ], [ 0, %for.body.preheader ]
71  %i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]
72  %arrayidx = getelementptr inbounds i8, ptr %arg3, i32 %i.025
73  %0 = load i8, ptr %arrayidx, align 2
74  %add = add nuw nsw i32 %i.025, 1
75  %arrayidx1 = getelementptr inbounds i8, ptr %arg3, i32 %add
76  %1 = load i8, ptr %arrayidx1, align 2
77  %arrayidx3 = getelementptr inbounds i8, ptr %arg2, i32 %i.025
78  %2 = load i8, ptr %arrayidx3, align 2
79  %conv = sext i8 %2 to i32
80  %conv4 = sext i8 %0 to i32
81  %mul = mul nsw i32 %conv, %conv4
82  %arrayidx6 = getelementptr inbounds i8, ptr %arg2, i32 %add
83  %3 = load i8, ptr %arrayidx6, align 2
84  %conv7 = sext i8 %3 to i32
85  %conv8 = sext i8 %1 to i32
86  %mul9 = mul nsw i32 %conv7, %conv8
87  %add10 = add i32 %mul, %mac1.026
88  %add11 = add i32 %add10, %mul9
89  %exitcond = icmp ne i32 %add, %arg
90  br i1 %exitcond, label %for.body, label %for.cond.cleanup
91}
92
93
94