1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -mtriple=armv8m.main-none-none-eabi -mattr=+dsp < %s -arm-parallel-dsp -verify -S | FileCheck %s 3; 4; Alias check: check that the rewrite isn't triggered when there's a store 5; instruction possibly aliasing any mul load operands; arguments are passed 6; without 'restrict' enabled. 7; 8define dso_local i32 @no_restrict(i32 %arg, ptr nocapture %arg1, ptr nocapture readonly %arg2, ptr nocapture readonly %arg3) { 9; CHECK-LABEL: @no_restrict( 10; CHECK-NEXT: entry: 11; CHECK-NEXT: [[CMP24:%.*]] = icmp sgt i32 [[ARG:%.*]], 0 12; CHECK-NEXT: br i1 [[CMP24]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]] 13; CHECK: for.body.preheader: 14; CHECK-NEXT: [[DOTPRE:%.*]] = load i16, ptr [[ARG3:%.*]], align 2 15; CHECK-NEXT: [[DOTPRE27:%.*]] = load i16, ptr [[ARG2:%.*]], align 2 16; CHECK-NEXT: br label [[FOR_BODY:%.*]] 17; CHECK: for.cond.cleanup: 18; CHECK-NEXT: [[MAC1_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[ADD11:%.*]], [[FOR_BODY]] ] 19; CHECK-NEXT: ret i32 [[MAC1_0_LCSSA]] 20; CHECK: for.body: 21; CHECK-NEXT: [[MAC1_026:%.*]] = phi i32 [ [[ADD11]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ] 22; CHECK-NEXT: [[I_025:%.*]] = phi i32 [ [[ADD:%.*]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ] 23; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[I_025]] 24; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 2 25; CHECK-NEXT: store i16 42, ptr [[ARRAYIDX]], align 2 26; CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[I_025]], 1 27; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[ADD]] 28; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr [[ARRAYIDX1]], align 2 29; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[I_025]] 30; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr [[ARRAYIDX3]], align 2 31; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP2]] to i32 32; CHECK-NEXT: [[CONV4:%.*]] = sext i16 [[TMP0]] to i32 33; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[CONV]], [[CONV4]] 34; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[ADD]] 35; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr [[ARRAYIDX6]], align 2 36; CHECK-NEXT: [[CONV7:%.*]] = sext i16 [[TMP3]] to i32 37; CHECK-NEXT: [[CONV8:%.*]] = sext i16 [[TMP1]] to i32 38; CHECK-NEXT: [[MUL9:%.*]] = mul nsw i32 [[CONV7]], [[CONV8]] 39; CHECK-NEXT: [[ADD10:%.*]] = add i32 [[MUL]], [[MAC1_026]] 40; CHECK-NEXT: [[ADD11]] = add i32 [[MUL9]], [[ADD10]] 41; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[ADD]], [[ARG]] 42; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP]] 43; 44entry: 45 %cmp24 = icmp sgt i32 %arg, 0 46 br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup 47 48for.body.preheader: 49 %.pre = load i16, ptr %arg3, align 2 50 %.pre27 = load i16, ptr %arg2, align 2 51 br label %for.body 52 53for.cond.cleanup: 54 %mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add11, %for.body ] 55 ret i32 %mac1.0.lcssa 56 57for.body: 58 %mac1.026 = phi i32 [ %add11, %for.body ], [ 0, %for.body.preheader ] 59 %i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ] 60 %arrayidx = getelementptr inbounds i16, ptr %arg3, i32 %i.025 61 %0 = load i16, ptr %arrayidx, align 2 62 63; Store inserted here, aliasing with arrayidx, arrayidx1, arrayidx3 64 store i16 42, ptr %arrayidx, align 2 65 66 %add = add nuw nsw i32 %i.025, 1 67 %arrayidx1 = getelementptr inbounds i16, ptr %arg3, i32 %add 68 %1 = load i16, ptr %arrayidx1, align 2 69 %arrayidx3 = getelementptr inbounds i16, ptr %arg2, i32 %i.025 70 %2 = load i16, ptr %arrayidx3, align 2 71 %conv = sext i16 %2 to i32 72 %conv4 = sext i16 %0 to i32 73 %mul = mul nsw i32 %conv, %conv4 74 %arrayidx6 = getelementptr inbounds i16, ptr %arg2, i32 %add 75 %3 = load i16, ptr %arrayidx6, align 2 76 %conv7 = sext i16 %3 to i32 77 %conv8 = sext i16 %1 to i32 78 %mul9 = mul nsw i32 %conv7, %conv8 79 %add10 = add i32 %mul, %mac1.026 80 %add11 = add i32 %mul9, %add10 81 %exitcond = icmp ne i32 %add, %arg 82 br i1 %exitcond, label %for.body, label %for.cond.cleanup 83} 84 85; Alias check: check that the rewrite isn't triggered when there's a store 86; aliasing one of the mul load operands. Arguments are now annotated with 87; 'noalias'. 88; 89define dso_local i32 @restrict(i32 %arg, ptr noalias %arg1, ptr noalias readonly %arg2, ptr noalias %arg3) { 90; CHECK-LABEL: @restrict( 91; CHECK-NEXT: entry: 92; CHECK-NEXT: [[CMP24:%.*]] = icmp sgt i32 [[ARG:%.*]], 0 93; CHECK-NEXT: br i1 [[CMP24]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]] 94; CHECK: for.body.preheader: 95; CHECK-NEXT: [[DOTPRE:%.*]] = load i16, ptr [[ARG3:%.*]], align 2 96; CHECK-NEXT: [[DOTPRE27:%.*]] = load i16, ptr [[ARG2:%.*]], align 2 97; CHECK-NEXT: br label [[FOR_BODY:%.*]] 98; CHECK: for.cond.cleanup: 99; CHECK-NEXT: [[MAC1_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[ADD11:%.*]], [[FOR_BODY]] ] 100; CHECK-NEXT: ret i32 [[MAC1_0_LCSSA]] 101; CHECK: for.body: 102; CHECK-NEXT: [[MAC1_026:%.*]] = phi i32 [ [[ADD11]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ] 103; CHECK-NEXT: [[I_025:%.*]] = phi i32 [ [[ADD:%.*]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ] 104; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[I_025]] 105; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 2 106; CHECK-NEXT: store i16 42, ptr [[ARRAYIDX]], align 2 107; CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[I_025]], 1 108; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[ADD]] 109; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr [[ARRAYIDX1]], align 2 110; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[I_025]] 111; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr [[ARRAYIDX3]], align 2 112; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP2]] to i32 113; CHECK-NEXT: [[CONV4:%.*]] = sext i16 [[TMP0]] to i32 114; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[CONV]], [[CONV4]] 115; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[ADD]] 116; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr [[ARRAYIDX6]], align 2 117; CHECK-NEXT: [[CONV7:%.*]] = sext i16 [[TMP3]] to i32 118; CHECK-NEXT: [[CONV8:%.*]] = sext i16 [[TMP1]] to i32 119; CHECK-NEXT: [[MUL9:%.*]] = mul nsw i32 [[CONV7]], [[CONV8]] 120; CHECK-NEXT: [[ADD10:%.*]] = add i32 [[MUL]], [[MAC1_026]] 121; CHECK-NEXT: [[ADD11]] = add i32 [[MUL9]], [[ADD10]] 122; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[ADD]], [[ARG]] 123; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP]] 124; 125entry: 126 %cmp24 = icmp sgt i32 %arg, 0 127 br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup 128 129for.body.preheader: 130 %.pre = load i16, ptr %arg3, align 2 131 %.pre27 = load i16, ptr %arg2, align 2 132 br label %for.body 133 134for.cond.cleanup: 135 %mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add11, %for.body ] 136 ret i32 %mac1.0.lcssa 137 138for.body: 139 %mac1.026 = phi i32 [ %add11, %for.body ], [ 0, %for.body.preheader ] 140 %i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ] 141 %arrayidx = getelementptr inbounds i16, ptr %arg3, i32 %i.025 142 %0 = load i16, ptr %arrayidx, align 2 143 144; Store inserted here, aliasing only with loads from 'arrayidx'. 145 store i16 42, ptr %arrayidx, align 2 146 147 %add = add nuw nsw i32 %i.025, 1 148 %arrayidx1 = getelementptr inbounds i16, ptr %arg3, i32 %add 149 %1 = load i16, ptr %arrayidx1, align 2 150 %arrayidx3 = getelementptr inbounds i16, ptr %arg2, i32 %i.025 151 %2 = load i16, ptr %arrayidx3, align 2 152 %conv = sext i16 %2 to i32 153 %conv4 = sext i16 %0 to i32 154 %mul = mul nsw i32 %conv, %conv4 155 %arrayidx6 = getelementptr inbounds i16, ptr %arg2, i32 %add 156 %3 = load i16, ptr %arrayidx6, align 2 157 %conv7 = sext i16 %3 to i32 158 %conv8 = sext i16 %1 to i32 159 %mul9 = mul nsw i32 %conv7, %conv8 160 %add10 = add i32 %mul, %mac1.026 161 162; Here the Mul is the LHS, and the Add the RHS. 163 %add11 = add i32 %mul9, %add10 164 165 %exitcond = icmp ne i32 %add, %arg 166 br i1 %exitcond, label %for.body, label %for.cond.cleanup 167} 168 169define dso_local i32 @store_dominates_all(i32 %arg, ptr nocapture %arg1, ptr nocapture readonly %arg2, ptr nocapture readonly %arg3) { 170; CHECK-LABEL: @store_dominates_all( 171; CHECK-NEXT: entry: 172; CHECK-NEXT: [[CMP24:%.*]] = icmp sgt i32 [[ARG:%.*]], 0 173; CHECK-NEXT: br i1 [[CMP24]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]] 174; CHECK: for.body.preheader: 175; CHECK-NEXT: [[DOTPRE:%.*]] = load i16, ptr [[ARG3:%.*]], align 2 176; CHECK-NEXT: [[DOTPRE27:%.*]] = load i16, ptr [[ARG2:%.*]], align 2 177; CHECK-NEXT: br label [[FOR_BODY:%.*]] 178; CHECK: for.cond.cleanup: 179; CHECK-NEXT: [[MAC1_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP13:%.*]], [[FOR_BODY]] ] 180; CHECK-NEXT: ret i32 [[MAC1_0_LCSSA]] 181; CHECK: for.body: 182; CHECK-NEXT: [[MAC1_026:%.*]] = phi i32 [ [[TMP13]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ] 183; CHECK-NEXT: [[I_025:%.*]] = phi i32 [ [[ADD:%.*]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ] 184; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[I_025]] 185; CHECK-NEXT: store i16 42, ptr [[ARRAYIDX]], align 2 186; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 2 187; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX]], align 2 188; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i16 189; CHECK-NEXT: [[TMP4:%.*]] = sext i16 [[TMP3]] to i32 190; CHECK-NEXT: [[TMP5:%.*]] = lshr i32 [[TMP2]], 16 191; CHECK-NEXT: [[TMP6:%.*]] = trunc i32 [[TMP5]] to i16 192; CHECK-NEXT: [[TMP7:%.*]] = sext i16 [[TMP6]] to i32 193; CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[I_025]], 1 194; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[ADD]] 195; CHECK-NEXT: [[TMP8:%.*]] = load i16, ptr [[ARRAYIDX1]], align 2 196; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[I_025]] 197; CHECK-NEXT: [[TMP9:%.*]] = load i16, ptr [[ARRAYIDX3]], align 2 198; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[ARRAYIDX3]], align 2 199; CHECK-NEXT: [[TMP12:%.*]] = trunc i32 [[TMP11]] to i16 200; CHECK-NEXT: [[TMP13]] = call i32 @llvm.arm.smlad(i32 [[TMP11]], i32 [[TMP2]], i32 [[MAC1_026]]) 201; CHECK-NEXT: [[TMP14:%.*]] = sext i16 [[TMP12]] to i32 202; CHECK-NEXT: [[TMP15:%.*]] = lshr i32 [[TMP11]], 16 203; CHECK-NEXT: [[TMP16:%.*]] = trunc i32 [[TMP15]] to i16 204; CHECK-NEXT: [[TMP17:%.*]] = sext i16 [[TMP16]] to i32 205; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP9]] to i32 206; CHECK-NEXT: [[CONV4:%.*]] = sext i16 [[TMP0]] to i32 207; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], [[TMP4]] 208; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[ADD]] 209; CHECK-NEXT: [[TMP18:%.*]] = load i16, ptr [[ARRAYIDX6]], align 2 210; CHECK-NEXT: [[CONV7:%.*]] = sext i16 [[TMP18]] to i32 211; CHECK-NEXT: [[CONV8:%.*]] = sext i16 [[TMP8]] to i32 212; CHECK-NEXT: [[MUL9:%.*]] = mul nsw i32 [[TMP17]], [[TMP7]] 213; CHECK-NEXT: [[ADD10:%.*]] = add i32 [[MUL]], [[MAC1_026]] 214; CHECK-NEXT: [[ADD11:%.*]] = add i32 [[MUL9]], [[ADD10]] 215; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[ADD]], [[ARG]] 216; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP]] 217; 218entry: 219 %cmp24 = icmp sgt i32 %arg, 0 220 br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup 221 222for.body.preheader: 223 %.pre = load i16, ptr %arg3, align 2 224 %.pre27 = load i16, ptr %arg2, align 2 225 br label %for.body 226 227for.cond.cleanup: 228 %mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add11, %for.body ] 229 ret i32 %mac1.0.lcssa 230 231for.body: 232 %mac1.026 = phi i32 [ %add11, %for.body ], [ 0, %for.body.preheader ] 233 %i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ] 234 %arrayidx = getelementptr inbounds i16, ptr %arg3, i32 %i.025 235 store i16 42, ptr %arrayidx, align 2 236 %0 = load i16, ptr %arrayidx, align 2 237 %add = add nuw nsw i32 %i.025, 1 238 %arrayidx1 = getelementptr inbounds i16, ptr %arg3, i32 %add 239 %1 = load i16, ptr %arrayidx1, align 2 240 %arrayidx3 = getelementptr inbounds i16, ptr %arg2, i32 %i.025 241 %2 = load i16, ptr %arrayidx3, align 2 242 %conv = sext i16 %2 to i32 243 %conv4 = sext i16 %0 to i32 244 %mul = mul nsw i32 %conv, %conv4 245 %arrayidx6 = getelementptr inbounds i16, ptr %arg2, i32 %add 246 %3 = load i16, ptr %arrayidx6, align 2 247 %conv7 = sext i16 %3 to i32 248 %conv8 = sext i16 %1 to i32 249 %mul9 = mul nsw i32 %conv7, %conv8 250 %add10 = add i32 %mul, %mac1.026 251 %add11 = add i32 %mul9, %add10 252 %exitcond = icmp ne i32 %add, %arg 253 br i1 %exitcond, label %for.body, label %for.cond.cleanup 254} 255 256define dso_local i32 @loads_dominate(i32 %arg, ptr nocapture %arg1, ptr nocapture readonly %arg2, ptr nocapture readonly %arg3) { 257; CHECK-LABEL: @loads_dominate( 258; CHECK-NEXT: entry: 259; CHECK-NEXT: [[CMP24:%.*]] = icmp sgt i32 [[ARG:%.*]], 0 260; CHECK-NEXT: br i1 [[CMP24]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]] 261; CHECK: for.body.preheader: 262; CHECK-NEXT: [[DOTPRE:%.*]] = load i16, ptr [[ARG3:%.*]], align 2 263; CHECK-NEXT: [[DOTPRE27:%.*]] = load i16, ptr [[ARG2:%.*]], align 2 264; CHECK-NEXT: br label [[FOR_BODY:%.*]] 265; CHECK: for.cond.cleanup: 266; CHECK-NEXT: [[MAC1_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP13:%.*]], [[FOR_BODY]] ] 267; CHECK-NEXT: ret i32 [[MAC1_0_LCSSA]] 268; CHECK: for.body: 269; CHECK-NEXT: [[MAC1_026:%.*]] = phi i32 [ [[TMP13]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ] 270; CHECK-NEXT: [[I_025:%.*]] = phi i32 [ [[ADD:%.*]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ] 271; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[I_025]] 272; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 2 273; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX]], align 2 274; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i16 275; CHECK-NEXT: [[TMP4:%.*]] = sext i16 [[TMP3]] to i32 276; CHECK-NEXT: [[TMP5:%.*]] = lshr i32 [[TMP2]], 16 277; CHECK-NEXT: [[TMP6:%.*]] = trunc i32 [[TMP5]] to i16 278; CHECK-NEXT: [[TMP7:%.*]] = sext i16 [[TMP6]] to i32 279; CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[I_025]], 1 280; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[ADD]] 281; CHECK-NEXT: [[TMP8:%.*]] = load i16, ptr [[ARRAYIDX1]], align 2 282; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[I_025]] 283; CHECK-NEXT: [[TMP9:%.*]] = load i16, ptr [[ARRAYIDX3]], align 2 284; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[ARRAYIDX3]], align 2 285; CHECK-NEXT: [[TMP12:%.*]] = trunc i32 [[TMP11]] to i16 286; CHECK-NEXT: [[TMP13]] = call i32 @llvm.arm.smlad(i32 [[TMP11]], i32 [[TMP2]], i32 [[MAC1_026]]) 287; CHECK-NEXT: [[TMP14:%.*]] = sext i16 [[TMP12]] to i32 288; CHECK-NEXT: [[TMP15:%.*]] = lshr i32 [[TMP11]], 16 289; CHECK-NEXT: [[TMP16:%.*]] = trunc i32 [[TMP15]] to i16 290; CHECK-NEXT: [[TMP17:%.*]] = sext i16 [[TMP16]] to i32 291; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP9]] to i32 292; CHECK-NEXT: [[CONV4:%.*]] = sext i16 [[TMP0]] to i32 293; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], [[TMP4]] 294; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[ADD]] 295; CHECK-NEXT: [[TMP18:%.*]] = load i16, ptr [[ARRAYIDX6]], align 2 296; CHECK-NEXT: [[CONV7:%.*]] = sext i16 [[TMP18]] to i32 297; CHECK-NEXT: [[CONV8:%.*]] = sext i16 [[TMP8]] to i32 298; CHECK-NEXT: [[MUL9:%.*]] = mul nsw i32 [[TMP17]], [[TMP7]] 299; CHECK-NEXT: [[ADD10:%.*]] = add i32 [[MUL]], [[MAC1_026]] 300; CHECK-NEXT: [[ADD11:%.*]] = add i32 [[MUL9]], [[ADD10]] 301; CHECK-NEXT: store i16 42, ptr [[ARRAYIDX]], align 2 302; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[ADD]], [[ARG]] 303; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP]] 304; 305entry: 306 %cmp24 = icmp sgt i32 %arg, 0 307 br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup 308 309for.body.preheader: 310 %.pre = load i16, ptr %arg3, align 2 311 %.pre27 = load i16, ptr %arg2, align 2 312 br label %for.body 313 314for.cond.cleanup: 315 %mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add11, %for.body ] 316 ret i32 %mac1.0.lcssa 317 318for.body: 319 %mac1.026 = phi i32 [ %add11, %for.body ], [ 0, %for.body.preheader ] 320 %i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ] 321 %arrayidx = getelementptr inbounds i16, ptr %arg3, i32 %i.025 322 %0 = load i16, ptr %arrayidx, align 2 323 %add = add nuw nsw i32 %i.025, 1 324 %arrayidx1 = getelementptr inbounds i16, ptr %arg3, i32 %add 325 %1 = load i16, ptr %arrayidx1, align 2 326 %arrayidx3 = getelementptr inbounds i16, ptr %arg2, i32 %i.025 327 %2 = load i16, ptr %arrayidx3, align 2 328 %conv = sext i16 %2 to i32 329 %conv4 = sext i16 %0 to i32 330 %mul = mul nsw i32 %conv, %conv4 331 %arrayidx6 = getelementptr inbounds i16, ptr %arg2, i32 %add 332 %3 = load i16, ptr %arrayidx6, align 2 333 %conv7 = sext i16 %3 to i32 334 %conv8 = sext i16 %1 to i32 335 %mul9 = mul nsw i32 %conv7, %conv8 336 %add10 = add i32 %mul, %mac1.026 337 %add11 = add i32 %mul9, %add10 338 store i16 42, ptr %arrayidx, align 2 339 %exitcond = icmp ne i32 %add, %arg 340 br i1 %exitcond, label %for.body, label %for.cond.cleanup 341} 342 343define dso_local i32 @store_alias_arg3_legal_1(i32 %arg, ptr nocapture %arg1, ptr noalias nocapture readonly %arg2, ptr nocapture readonly %arg3) { 344; CHECK-LABEL: @store_alias_arg3_legal_1( 345; CHECK-NEXT: entry: 346; CHECK-NEXT: [[CMP24:%.*]] = icmp sgt i32 [[ARG:%.*]], 0 347; CHECK-NEXT: br i1 [[CMP24]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]] 348; CHECK: for.body.preheader: 349; CHECK-NEXT: [[DOTPRE:%.*]] = load i16, ptr [[ARG3:%.*]], align 2 350; CHECK-NEXT: [[DOTPRE27:%.*]] = load i16, ptr [[ARG2:%.*]], align 2 351; CHECK-NEXT: br label [[FOR_BODY:%.*]] 352; CHECK: for.cond.cleanup: 353; CHECK-NEXT: [[MAC1_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP13:%.*]], [[FOR_BODY]] ] 354; CHECK-NEXT: ret i32 [[MAC1_0_LCSSA]] 355; CHECK: for.body: 356; CHECK-NEXT: [[MAC1_026:%.*]] = phi i32 [ [[TMP13]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ] 357; CHECK-NEXT: [[I_025:%.*]] = phi i32 [ [[ADD:%.*]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ] 358; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[I_025]] 359; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 2 360; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX]], align 2 361; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i16 362; CHECK-NEXT: [[TMP4:%.*]] = sext i16 [[TMP3]] to i32 363; CHECK-NEXT: [[TMP5:%.*]] = lshr i32 [[TMP2]], 16 364; CHECK-NEXT: [[TMP6:%.*]] = trunc i32 [[TMP5]] to i16 365; CHECK-NEXT: [[TMP7:%.*]] = sext i16 [[TMP6]] to i32 366; CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[I_025]], 1 367; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[ADD]] 368; CHECK-NEXT: [[TMP8:%.*]] = load i16, ptr [[ARRAYIDX1]], align 2 369; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[I_025]] 370; CHECK-NEXT: [[TMP9:%.*]] = load i16, ptr [[ARRAYIDX3]], align 2 371; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[ARRAYIDX3]], align 2 372; CHECK-NEXT: [[TMP12:%.*]] = trunc i32 [[TMP11]] to i16 373; CHECK-NEXT: [[TMP13]] = call i32 @llvm.arm.smlad(i32 [[TMP11]], i32 [[TMP2]], i32 [[MAC1_026]]) 374; CHECK-NEXT: [[TMP14:%.*]] = sext i16 [[TMP12]] to i32 375; CHECK-NEXT: [[TMP15:%.*]] = lshr i32 [[TMP11]], 16 376; CHECK-NEXT: [[TMP16:%.*]] = trunc i32 [[TMP15]] to i16 377; CHECK-NEXT: [[TMP17:%.*]] = sext i16 [[TMP16]] to i32 378; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP9]] to i32 379; CHECK-NEXT: [[CONV4:%.*]] = sext i16 [[TMP0]] to i32 380; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], [[TMP4]] 381; CHECK-NEXT: store i16 42, ptr [[ARRAYIDX]], align 2 382; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[ADD]] 383; CHECK-NEXT: [[TMP18:%.*]] = load i16, ptr [[ARRAYIDX6]], align 2 384; CHECK-NEXT: [[CONV7:%.*]] = sext i16 [[TMP18]] to i32 385; CHECK-NEXT: [[CONV8:%.*]] = sext i16 [[TMP8]] to i32 386; CHECK-NEXT: [[MUL9:%.*]] = mul nsw i32 [[TMP17]], [[TMP7]] 387; CHECK-NEXT: [[ADD10:%.*]] = add i32 [[MUL]], [[MAC1_026]] 388; CHECK-NEXT: [[ADD11:%.*]] = add i32 [[MUL9]], [[ADD10]] 389; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[ADD]], [[ARG]] 390; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP]] 391; 392entry: 393 %cmp24 = icmp sgt i32 %arg, 0 394 br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup 395 396for.body.preheader: 397 %.pre = load i16, ptr %arg3, align 2 398 %.pre27 = load i16, ptr %arg2, align 2 399 br label %for.body 400 401for.cond.cleanup: 402 %mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add11, %for.body ] 403 ret i32 %mac1.0.lcssa 404 405for.body: 406 %mac1.026 = phi i32 [ %add11, %for.body ], [ 0, %for.body.preheader ] 407 %i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ] 408 %arrayidx = getelementptr inbounds i16, ptr %arg3, i32 %i.025 409 %0 = load i16, ptr %arrayidx, align 2 410 %add = add nuw nsw i32 %i.025, 1 411 %arrayidx1 = getelementptr inbounds i16, ptr %arg3, i32 %add 412 %1 = load i16, ptr %arrayidx1, align 2 413 %arrayidx3 = getelementptr inbounds i16, ptr %arg2, i32 %i.025 414 %2 = load i16, ptr %arrayidx3, align 2 415 %conv = sext i16 %2 to i32 416 %conv4 = sext i16 %0 to i32 417 %mul = mul nsw i32 %conv, %conv4 418 store i16 42, ptr %arrayidx, align 2 419 %arrayidx6 = getelementptr inbounds i16, ptr %arg2, i32 %add 420 %3 = load i16, ptr %arrayidx6, align 2 421 %conv7 = sext i16 %3 to i32 422 %conv8 = sext i16 %1 to i32 423 %mul9 = mul nsw i32 %conv7, %conv8 424 %add10 = add i32 %mul, %mac1.026 425 %add11 = add i32 %mul9, %add10 426 %exitcond = icmp ne i32 %add, %arg 427 br i1 %exitcond, label %for.body, label %for.cond.cleanup 428} 429 430define dso_local i32 @store_alias_arg3_legal_2(i32 %arg, ptr nocapture %arg1, ptr noalias nocapture readonly %arg2, ptr nocapture readonly %arg3) { 431; CHECK-LABEL: @store_alias_arg3_legal_2( 432; CHECK-NEXT: entry: 433; CHECK-NEXT: [[CMP24:%.*]] = icmp sgt i32 [[ARG:%.*]], 0 434; CHECK-NEXT: br i1 [[CMP24]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]] 435; CHECK: for.body.preheader: 436; CHECK-NEXT: [[DOTPRE:%.*]] = load i16, ptr [[ARG3:%.*]], align 2 437; CHECK-NEXT: [[DOTPRE27:%.*]] = load i16, ptr [[ARG2:%.*]], align 2 438; CHECK-NEXT: br label [[FOR_BODY:%.*]] 439; CHECK: for.cond.cleanup: 440; CHECK-NEXT: [[MAC1_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP13:%.*]], [[FOR_BODY]] ] 441; CHECK-NEXT: ret i32 [[MAC1_0_LCSSA]] 442; CHECK: for.body: 443; CHECK-NEXT: [[MAC1_026:%.*]] = phi i32 [ [[TMP13]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ] 444; CHECK-NEXT: [[I_025:%.*]] = phi i32 [ [[ADD:%.*]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ] 445; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[I_025]] 446; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 2 447; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX]], align 2 448; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i16 449; CHECK-NEXT: [[TMP4:%.*]] = sext i16 [[TMP3]] to i32 450; CHECK-NEXT: [[TMP5:%.*]] = lshr i32 [[TMP2]], 16 451; CHECK-NEXT: [[TMP6:%.*]] = trunc i32 [[TMP5]] to i16 452; CHECK-NEXT: [[TMP7:%.*]] = sext i16 [[TMP6]] to i32 453; CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[I_025]], 1 454; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[ADD]] 455; CHECK-NEXT: [[TMP8:%.*]] = load i16, ptr [[ARRAYIDX1]], align 2 456; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[I_025]] 457; CHECK-NEXT: store i16 42, ptr [[ARRAYIDX]], align 2 458; CHECK-NEXT: [[TMP9:%.*]] = load i16, ptr [[ARRAYIDX3]], align 2 459; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[ARRAYIDX3]], align 2 460; CHECK-NEXT: [[TMP12:%.*]] = trunc i32 [[TMP11]] to i16 461; CHECK-NEXT: [[TMP13]] = call i32 @llvm.arm.smlad(i32 [[TMP11]], i32 [[TMP2]], i32 [[MAC1_026]]) 462; CHECK-NEXT: [[TMP14:%.*]] = sext i16 [[TMP12]] to i32 463; CHECK-NEXT: [[TMP15:%.*]] = lshr i32 [[TMP11]], 16 464; CHECK-NEXT: [[TMP16:%.*]] = trunc i32 [[TMP15]] to i16 465; CHECK-NEXT: [[TMP17:%.*]] = sext i16 [[TMP16]] to i32 466; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP9]] to i32 467; CHECK-NEXT: [[CONV4:%.*]] = sext i16 [[TMP0]] to i32 468; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], [[TMP4]] 469; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[ADD]] 470; CHECK-NEXT: [[TMP18:%.*]] = load i16, ptr [[ARRAYIDX6]], align 2 471; CHECK-NEXT: [[CONV7:%.*]] = sext i16 [[TMP18]] to i32 472; CHECK-NEXT: [[CONV8:%.*]] = sext i16 [[TMP8]] to i32 473; CHECK-NEXT: [[MUL9:%.*]] = mul nsw i32 [[TMP17]], [[TMP7]] 474; CHECK-NEXT: [[ADD10:%.*]] = add i32 [[MUL]], [[MAC1_026]] 475; CHECK-NEXT: [[ADD11:%.*]] = add i32 [[MUL9]], [[ADD10]] 476; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[ADD]], [[ARG]] 477; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP]] 478; 479entry: 480 %cmp24 = icmp sgt i32 %arg, 0 481 br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup 482 483for.body.preheader: 484 %.pre = load i16, ptr %arg3, align 2 485 %.pre27 = load i16, ptr %arg2, align 2 486 br label %for.body 487 488for.cond.cleanup: 489 %mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add11, %for.body ] 490 ret i32 %mac1.0.lcssa 491 492for.body: 493 %mac1.026 = phi i32 [ %add11, %for.body ], [ 0, %for.body.preheader ] 494 %i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ] 495 %arrayidx = getelementptr inbounds i16, ptr %arg3, i32 %i.025 496 %0 = load i16, ptr %arrayidx, align 2 497 %add = add nuw nsw i32 %i.025, 1 498 %arrayidx1 = getelementptr inbounds i16, ptr %arg3, i32 %add 499 %1 = load i16, ptr %arrayidx1, align 2 500 %arrayidx3 = getelementptr inbounds i16, ptr %arg2, i32 %i.025 501 store i16 42, ptr %arrayidx, align 2 502 %2 = load i16, ptr %arrayidx3, align 2 503 %conv = sext i16 %2 to i32 504 %conv4 = sext i16 %0 to i32 505 %mul = mul nsw i32 %conv, %conv4 506 %arrayidx6 = getelementptr inbounds i16, ptr %arg2, i32 %add 507 %3 = load i16, ptr %arrayidx6, align 2 508 %conv7 = sext i16 %3 to i32 509 %conv8 = sext i16 %1 to i32 510 %mul9 = mul nsw i32 %conv7, %conv8 511 %add10 = add i32 %mul, %mac1.026 512 %add11 = add i32 %mul9, %add10 513 %exitcond = icmp ne i32 %add, %arg 514 br i1 %exitcond, label %for.body, label %for.cond.cleanup 515} 516 517define dso_local i32 @store_alias_arg3_illegal_1(i32 %arg, ptr nocapture %arg1, ptr noalias nocapture readonly %arg2, ptr noalias nocapture %arg3) { 518; CHECK-LABEL: @store_alias_arg3_illegal_1( 519; CHECK-NEXT: entry: 520; CHECK-NEXT: [[CMP24:%.*]] = icmp sgt i32 [[ARG:%.*]], 0 521; CHECK-NEXT: br i1 [[CMP24]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]] 522; CHECK: for.body.preheader: 523; CHECK-NEXT: [[DOTPRE:%.*]] = load i16, ptr [[ARG3:%.*]], align 2 524; CHECK-NEXT: [[DOTPRE27:%.*]] = load i16, ptr [[ARG2:%.*]], align 2 525; CHECK-NEXT: br label [[FOR_BODY:%.*]] 526; CHECK: for.cond.cleanup: 527; CHECK-NEXT: [[MAC1_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[ADD11:%.*]], [[FOR_BODY]] ] 528; CHECK-NEXT: ret i32 [[MAC1_0_LCSSA]] 529; CHECK: for.body: 530; CHECK-NEXT: [[MAC1_026:%.*]] = phi i32 [ [[ADD11]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ] 531; CHECK-NEXT: [[I_025:%.*]] = phi i32 [ [[ADD:%.*]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ] 532; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[I_025]] 533; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 2 534; CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[I_025]], 1 535; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[ADD]] 536; CHECK-NEXT: store i16 42, ptr [[ARRAYIDX1]], align 2 537; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr [[ARRAYIDX1]], align 2 538; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[I_025]] 539; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr [[ARRAYIDX3]], align 2 540; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP2]] to i32 541; CHECK-NEXT: [[CONV4:%.*]] = sext i16 [[TMP0]] to i32 542; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[CONV]], [[CONV4]] 543; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[ADD]] 544; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr [[ARRAYIDX6]], align 2 545; CHECK-NEXT: [[CONV7:%.*]] = sext i16 [[TMP3]] to i32 546; CHECK-NEXT: [[CONV8:%.*]] = sext i16 [[TMP1]] to i32 547; CHECK-NEXT: [[MUL9:%.*]] = mul nsw i32 [[CONV7]], [[CONV8]] 548; CHECK-NEXT: [[ADD10:%.*]] = add i32 [[MUL]], [[MAC1_026]] 549; CHECK-NEXT: [[ADD11]] = add i32 [[MUL9]], [[ADD10]] 550; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[ADD]], [[ARG]] 551; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP]] 552; 553entry: 554 %cmp24 = icmp sgt i32 %arg, 0 555 br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup 556 557for.body.preheader: 558 %.pre = load i16, ptr %arg3, align 2 559 %.pre27 = load i16, ptr %arg2, align 2 560 br label %for.body 561 562for.cond.cleanup: 563 %mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add11, %for.body ] 564 ret i32 %mac1.0.lcssa 565 566for.body: 567 %mac1.026 = phi i32 [ %add11, %for.body ], [ 0, %for.body.preheader ] 568 %i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ] 569 %arrayidx = getelementptr inbounds i16, ptr %arg3, i32 %i.025 570 %0 = load i16, ptr %arrayidx, align 2 571 %add = add nuw nsw i32 %i.025, 1 572 %arrayidx1 = getelementptr inbounds i16, ptr %arg3, i32 %add 573 store i16 42, ptr %arrayidx1, align 2 574 %1 = load i16, ptr %arrayidx1, align 2 575 %arrayidx3 = getelementptr inbounds i16, ptr %arg2, i32 %i.025 576 %2 = load i16, ptr %arrayidx3, align 2 577 %conv = sext i16 %2 to i32 578 %conv4 = sext i16 %0 to i32 579 %mul = mul nsw i32 %conv, %conv4 580 %arrayidx6 = getelementptr inbounds i16, ptr %arg2, i32 %add 581 %3 = load i16, ptr %arrayidx6, align 2 582 %conv7 = sext i16 %3 to i32 583 %conv8 = sext i16 %1 to i32 584 %mul9 = mul nsw i32 %conv7, %conv8 585 %add10 = add i32 %mul, %mac1.026 586 %add11 = add i32 %mul9, %add10 587 %exitcond = icmp ne i32 %add, %arg 588 br i1 %exitcond, label %for.body, label %for.cond.cleanup 589} 590 591define dso_local i32 @store_alias_arg3_illegal_2(i32 %arg, ptr nocapture %arg1, ptr noalias nocapture readonly %arg2, ptr noalias nocapture %arg3) { 592; CHECK-LABEL: @store_alias_arg3_illegal_2( 593; CHECK-NEXT: entry: 594; CHECK-NEXT: [[CMP24:%.*]] = icmp sgt i32 [[ARG:%.*]], 0 595; CHECK-NEXT: br i1 [[CMP24]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]] 596; CHECK: for.body.preheader: 597; CHECK-NEXT: [[DOTPRE:%.*]] = load i16, ptr [[ARG3:%.*]], align 2 598; CHECK-NEXT: [[DOTPRE27:%.*]] = load i16, ptr [[ARG2:%.*]], align 2 599; CHECK-NEXT: br label [[FOR_BODY:%.*]] 600; CHECK: for.cond.cleanup: 601; CHECK-NEXT: [[MAC1_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[ADD11:%.*]], [[FOR_BODY]] ] 602; CHECK-NEXT: ret i32 [[MAC1_0_LCSSA]] 603; CHECK: for.body: 604; CHECK-NEXT: [[MAC1_026:%.*]] = phi i32 [ [[ADD11]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ] 605; CHECK-NEXT: [[I_025:%.*]] = phi i32 [ [[ADD:%.*]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ] 606; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[I_025]] 607; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 2 608; CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[I_025]], 1 609; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[ADD]] 610; CHECK-NEXT: store i16 42, ptr [[ARRAYIDX]], align 2 611; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr [[ARRAYIDX1]], align 2 612; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[I_025]] 613; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr [[ARRAYIDX3]], align 2 614; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP2]] to i32 615; CHECK-NEXT: [[CONV4:%.*]] = sext i16 [[TMP0]] to i32 616; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[CONV]], [[CONV4]] 617; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[ADD]] 618; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr [[ARRAYIDX6]], align 2 619; CHECK-NEXT: [[CONV7:%.*]] = sext i16 [[TMP3]] to i32 620; CHECK-NEXT: [[CONV8:%.*]] = sext i16 [[TMP1]] to i32 621; CHECK-NEXT: [[MUL9:%.*]] = mul nsw i32 [[CONV7]], [[CONV8]] 622; CHECK-NEXT: [[ADD10:%.*]] = add i32 [[MUL]], [[MAC1_026]] 623; CHECK-NEXT: [[ADD11]] = add i32 [[MUL9]], [[ADD10]] 624; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[ADD]], [[ARG]] 625; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP]] 626; 627entry: 628 %cmp24 = icmp sgt i32 %arg, 0 629 br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup 630 631for.body.preheader: 632 %.pre = load i16, ptr %arg3, align 2 633 %.pre27 = load i16, ptr %arg2, align 2 634 br label %for.body 635 636for.cond.cleanup: 637 %mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add11, %for.body ] 638 ret i32 %mac1.0.lcssa 639 640for.body: 641 %mac1.026 = phi i32 [ %add11, %for.body ], [ 0, %for.body.preheader ] 642 %i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ] 643 %arrayidx = getelementptr inbounds i16, ptr %arg3, i32 %i.025 644 %0 = load i16, ptr %arrayidx, align 2 645 %add = add nuw nsw i32 %i.025, 1 646 %arrayidx1 = getelementptr inbounds i16, ptr %arg3, i32 %add 647 store i16 42, ptr %arrayidx, align 2 648 %1 = load i16, ptr %arrayidx1, align 2 649 %arrayidx3 = getelementptr inbounds i16, ptr %arg2, i32 %i.025 650 %2 = load i16, ptr %arrayidx3, align 2 651 %conv = sext i16 %2 to i32 652 %conv4 = sext i16 %0 to i32 653 %mul = mul nsw i32 %conv, %conv4 654 %arrayidx6 = getelementptr inbounds i16, ptr %arg2, i32 %add 655 %3 = load i16, ptr %arrayidx6, align 2 656 %conv7 = sext i16 %3 to i32 657 %conv8 = sext i16 %1 to i32 658 %mul9 = mul nsw i32 %conv7, %conv8 659 %add10 = add i32 %mul, %mac1.026 660 %add11 = add i32 %mul9, %add10 661 %exitcond = icmp ne i32 %add, %arg 662 br i1 %exitcond, label %for.body, label %for.cond.cleanup 663} 664 665define dso_local i32 @store_alias_arg2_illegal_1(i32 %arg, ptr nocapture %arg1, ptr nocapture readonly %arg2, ptr nocapture readonly %arg3) { 666; CHECK-LABEL: @store_alias_arg2_illegal_1( 667; CHECK-NEXT: entry: 668; CHECK-NEXT: [[CMP24:%.*]] = icmp sgt i32 [[ARG:%.*]], 0 669; CHECK-NEXT: br i1 [[CMP24]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]] 670; CHECK: for.body.preheader: 671; CHECK-NEXT: [[DOTPRE:%.*]] = load i16, ptr [[ARG3:%.*]], align 2 672; CHECK-NEXT: [[DOTPRE27:%.*]] = load i16, ptr [[ARG2:%.*]], align 2 673; CHECK-NEXT: br label [[FOR_BODY:%.*]] 674; CHECK: for.cond.cleanup: 675; CHECK-NEXT: [[MAC1_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[ADD11:%.*]], [[FOR_BODY]] ] 676; CHECK-NEXT: ret i32 [[MAC1_0_LCSSA]] 677; CHECK: for.body: 678; CHECK-NEXT: [[MAC1_026:%.*]] = phi i32 [ [[ADD11]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ] 679; CHECK-NEXT: [[I_025:%.*]] = phi i32 [ [[ADD:%.*]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ] 680; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[I_025]] 681; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 2 682; CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[I_025]], 1 683; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[ADD]] 684; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr [[ARRAYIDX1]], align 2 685; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[I_025]] 686; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr [[ARRAYIDX3]], align 2 687; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP2]] to i32 688; CHECK-NEXT: [[CONV4:%.*]] = sext i16 [[TMP0]] to i32 689; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[CONV]], [[CONV4]] 690; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[ADD]] 691; CHECK-NEXT: store i16 42, ptr [[ARRAYIDX6]], align 2 692; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr [[ARRAYIDX6]], align 2 693; CHECK-NEXT: [[CONV7:%.*]] = sext i16 [[TMP3]] to i32 694; CHECK-NEXT: [[CONV8:%.*]] = sext i16 [[TMP1]] to i32 695; CHECK-NEXT: [[MUL9:%.*]] = mul nsw i32 [[CONV7]], [[CONV8]] 696; CHECK-NEXT: [[ADD10:%.*]] = add i32 [[MUL]], [[MAC1_026]] 697; CHECK-NEXT: [[ADD11]] = add i32 [[MUL9]], [[ADD10]] 698; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[ADD]], [[ARG]] 699; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP]] 700; 701entry: 702 %cmp24 = icmp sgt i32 %arg, 0 703 br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup 704 705for.body.preheader: 706 %.pre = load i16, ptr %arg3, align 2 707 %.pre27 = load i16, ptr %arg2, align 2 708 br label %for.body 709 710for.cond.cleanup: 711 %mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add11, %for.body ] 712 ret i32 %mac1.0.lcssa 713 714for.body: 715 %mac1.026 = phi i32 [ %add11, %for.body ], [ 0, %for.body.preheader ] 716 %i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ] 717 %arrayidx = getelementptr inbounds i16, ptr %arg3, i32 %i.025 718 %0 = load i16, ptr %arrayidx, align 2 719 %add = add nuw nsw i32 %i.025, 1 720 %arrayidx1 = getelementptr inbounds i16, ptr %arg3, i32 %add 721 %1 = load i16, ptr %arrayidx1, align 2 722 %arrayidx3 = getelementptr inbounds i16, ptr %arg2, i32 %i.025 723 %2 = load i16, ptr %arrayidx3, align 2 724 %conv = sext i16 %2 to i32 725 %conv4 = sext i16 %0 to i32 726 %mul = mul nsw i32 %conv, %conv4 727 %arrayidx6 = getelementptr inbounds i16, ptr %arg2, i32 %add 728 store i16 42, ptr %arrayidx6, align 2 729 %3 = load i16, ptr %arrayidx6, align 2 730 %conv7 = sext i16 %3 to i32 731 %conv8 = sext i16 %1 to i32 732 %mul9 = mul nsw i32 %conv7, %conv8 733 %add10 = add i32 %mul, %mac1.026 734 %add11 = add i32 %mul9, %add10 735 %exitcond = icmp ne i32 %add, %arg 736 br i1 %exitcond, label %for.body, label %for.cond.cleanup 737} 738 739define dso_local i32 @store_alias_arg2_illegal_2(i32 %arg, ptr nocapture %arg1, ptr nocapture readonly %arg2, ptr nocapture readonly %arg3) { 740; CHECK-LABEL: @store_alias_arg2_illegal_2( 741; CHECK-NEXT: entry: 742; CHECK-NEXT: [[CMP24:%.*]] = icmp sgt i32 [[ARG:%.*]], 0 743; CHECK-NEXT: br i1 [[CMP24]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]] 744; CHECK: for.body.preheader: 745; CHECK-NEXT: [[DOTPRE:%.*]] = load i16, ptr [[ARG3:%.*]], align 2 746; CHECK-NEXT: [[DOTPRE27:%.*]] = load i16, ptr [[ARG2:%.*]], align 2 747; CHECK-NEXT: br label [[FOR_BODY:%.*]] 748; CHECK: for.cond.cleanup: 749; CHECK-NEXT: [[MAC1_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[ADD11:%.*]], [[FOR_BODY]] ] 750; CHECK-NEXT: ret i32 [[MAC1_0_LCSSA]] 751; CHECK: for.body: 752; CHECK-NEXT: [[MAC1_026:%.*]] = phi i32 [ [[ADD11]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ] 753; CHECK-NEXT: [[I_025:%.*]] = phi i32 [ [[ADD:%.*]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ] 754; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[I_025]] 755; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 2 756; CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[I_025]], 1 757; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[ADD]] 758; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr [[ARRAYIDX1]], align 2 759; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[I_025]] 760; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr [[ARRAYIDX3]], align 2 761; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP2]] to i32 762; CHECK-NEXT: [[CONV4:%.*]] = sext i16 [[TMP0]] to i32 763; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[CONV]], [[CONV4]] 764; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[ADD]] 765; CHECK-NEXT: store i16 42, ptr [[ARRAYIDX3]], align 2 766; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr [[ARRAYIDX6]], align 2 767; CHECK-NEXT: [[CONV7:%.*]] = sext i16 [[TMP3]] to i32 768; CHECK-NEXT: [[CONV8:%.*]] = sext i16 [[TMP1]] to i32 769; CHECK-NEXT: [[MUL9:%.*]] = mul nsw i32 [[CONV7]], [[CONV8]] 770; CHECK-NEXT: [[ADD10:%.*]] = add i32 [[MUL]], [[MAC1_026]] 771; CHECK-NEXT: [[ADD11]] = add i32 [[MUL9]], [[ADD10]] 772; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[ADD]], [[ARG]] 773; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP]] 774; 775entry: 776 %cmp24 = icmp sgt i32 %arg, 0 777 br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup 778 779for.body.preheader: 780 %.pre = load i16, ptr %arg3, align 2 781 %.pre27 = load i16, ptr %arg2, align 2 782 br label %for.body 783 784for.cond.cleanup: 785 %mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add11, %for.body ] 786 ret i32 %mac1.0.lcssa 787 788for.body: 789 %mac1.026 = phi i32 [ %add11, %for.body ], [ 0, %for.body.preheader ] 790 %i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ] 791 %arrayidx = getelementptr inbounds i16, ptr %arg3, i32 %i.025 792 %0 = load i16, ptr %arrayidx, align 2 793 %add = add nuw nsw i32 %i.025, 1 794 %arrayidx1 = getelementptr inbounds i16, ptr %arg3, i32 %add 795 %1 = load i16, ptr %arrayidx1, align 2 796 %arrayidx3 = getelementptr inbounds i16, ptr %arg2, i32 %i.025 797 %2 = load i16, ptr %arrayidx3, align 2 798 %conv = sext i16 %2 to i32 799 %conv4 = sext i16 %0 to i32 800 %mul = mul nsw i32 %conv, %conv4 801 %arrayidx6 = getelementptr inbounds i16, ptr %arg2, i32 %add 802 store i16 42, ptr %arrayidx3, align 2 803 %3 = load i16, ptr %arrayidx6, align 2 804 %conv7 = sext i16 %3 to i32 805 %conv8 = sext i16 %1 to i32 806 %mul9 = mul nsw i32 %conv7, %conv8 807 %add10 = add i32 %mul, %mac1.026 808 %add11 = add i32 %mul9, %add10 809 %exitcond = icmp ne i32 %add, %arg 810 br i1 %exitcond, label %for.body, label %for.cond.cleanup 811} 812 813; TODO: I think we should be able to generate one smlad here. The search fails 814; when it finds the alias. 815define i32 @one_pair_alias(ptr noalias nocapture readonly %b, ptr noalias nocapture %c) { 816; CHECK-LABEL: @one_pair_alias( 817; CHECK-NEXT: entry: 818; CHECK-NEXT: br label [[FOR_BODY:%.*]] 819; CHECK: for.cond.cleanup: 820; CHECK-NEXT: ret i32 [[ADD26:%.*]] 821; CHECK: for.body: 822; CHECK-NEXT: [[I_050:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[ADD27:%.*]], [[FOR_BODY]] ] 823; CHECK-NEXT: [[A_049:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[ADD26]], [[FOR_BODY]] ] 824; CHECK-NEXT: [[ADD3:%.*]] = or i32 [[I_050]], 1 825; CHECK-NEXT: [[ADD11:%.*]] = or i32 [[I_050]], 2 826; CHECK-NEXT: [[ADD19:%.*]] = or i32 [[I_050]], 3 827; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, ptr [[B:%.*]], i32 [[I_050]] 828; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i16, ptr [[B]], i32 [[ADD3]] 829; CHECK-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds i16, ptr [[B]], i32 [[ADD11]] 830; CHECK-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds i16, ptr [[B]], i32 [[ADD19]] 831; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, ptr [[C:%.*]], i32 [[I_050]] 832; CHECK-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i16, ptr [[C]], i32 [[ADD3]] 833; CHECK-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds i16, ptr [[C]], i32 [[ADD11]] 834; CHECK-NEXT: [[ARRAYIDX23:%.*]] = getelementptr inbounds i16, ptr [[C]], i32 [[ADD19]] 835; CHECK-NEXT: [[TMP:%.*]] = load i16, ptr [[ARRAYIDX]], align 2 836; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr [[ARRAYIDX4]], align 2 837; CHECK-NEXT: [[TMP4:%.*]] = load i16, ptr [[ARRAYIDX12]], align 2 838; CHECK-NEXT: [[TMP6:%.*]] = load i16, ptr [[ARRAYIDX20]], align 2 839; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr [[ARRAYIDX1]], align 2 840; CHECK-NEXT: store i16 43, ptr [[ARRAYIDX7]], align 2 841; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr [[ARRAYIDX7]], align 2 842; CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr [[ARRAYIDX15]], align 2 843; CHECK-NEXT: [[TMP7:%.*]] = load i16, ptr [[ARRAYIDX23]], align 2 844; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP]] to i32 845; CHECK-NEXT: [[CONV2:%.*]] = sext i16 [[TMP1]] to i32 846; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[CONV2]], [[CONV]] 847; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[MUL]], [[A_049]] 848; CHECK-NEXT: [[CONV5:%.*]] = sext i16 [[TMP2]] to i32 849; CHECK-NEXT: [[CONV8:%.*]] = sext i16 [[TMP3]] to i32 850; CHECK-NEXT: [[MUL9:%.*]] = mul nsw i32 [[CONV8]], [[CONV5]] 851; CHECK-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD]], [[MUL9]] 852; CHECK-NEXT: [[CONV13:%.*]] = sext i16 [[TMP4]] to i32 853; CHECK-NEXT: [[CONV16:%.*]] = sext i16 [[TMP5]] to i32 854; CHECK-NEXT: [[MUL17:%.*]] = mul nsw i32 [[CONV16]], [[CONV13]] 855; CHECK-NEXT: [[ADD18:%.*]] = add nsw i32 [[ADD10]], [[MUL17]] 856; CHECK-NEXT: [[CONV21:%.*]] = sext i16 [[TMP6]] to i32 857; CHECK-NEXT: [[CONV24:%.*]] = sext i16 [[TMP7]] to i32 858; CHECK-NEXT: [[MUL25:%.*]] = mul nsw i32 [[CONV24]], [[CONV21]] 859; CHECK-NEXT: [[ADD26]] = add nsw i32 [[ADD18]], [[MUL25]] 860; CHECK-NEXT: [[ADD27]] = add nuw nsw i32 [[I_050]], 4 861; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[ADD27]], 100 862; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]] 863; 864entry: 865 br label %for.body 866 867for.cond.cleanup: ; preds = %for.body 868 ret i32 %add26 869 870for.body: ; preds = %for.body, %entry 871 %i.050 = phi i32 [ 0, %entry ], [ %add27, %for.body ] 872 %a.049 = phi i32 [ 0, %entry ], [ %add26, %for.body ] 873 %add3 = or i32 %i.050, 1 874 %add11 = or i32 %i.050, 2 875 %add19 = or i32 %i.050, 3 876 %arrayidx = getelementptr inbounds i16, ptr %b, i32 %i.050 877 %arrayidx4 = getelementptr inbounds i16, ptr %b, i32 %add3 878 %arrayidx12 = getelementptr inbounds i16, ptr %b, i32 %add11 879 %arrayidx20 = getelementptr inbounds i16, ptr %b, i32 %add19 880 %arrayidx1 = getelementptr inbounds i16, ptr %c, i32 %i.050 881 %arrayidx7 = getelementptr inbounds i16, ptr %c, i32 %add3 882 %arrayidx15 = getelementptr inbounds i16, ptr %c, i32 %add11 883 %arrayidx23 = getelementptr inbounds i16, ptr %c, i32 %add19 884 %tmp = load i16, ptr %arrayidx, align 2 885 %tmp2 = load i16, ptr %arrayidx4, align 2 886 %tmp4 = load i16, ptr %arrayidx12, align 2 887 %tmp6 = load i16, ptr %arrayidx20, align 2 888 %tmp1 = load i16, ptr %arrayidx1, align 2 889 store i16 43, ptr %arrayidx7 890 %tmp3 = load i16, ptr %arrayidx7, align 2 891 %tmp5 = load i16, ptr %arrayidx15, align 2 892 %tmp7 = load i16, ptr %arrayidx23, align 2 893 %conv = sext i16 %tmp to i32 894 %conv2 = sext i16 %tmp1 to i32 895 %mul = mul nsw i32 %conv2, %conv 896 %add = add nsw i32 %mul, %a.049 897 %conv5 = sext i16 %tmp2 to i32 898 %conv8 = sext i16 %tmp3 to i32 899 %mul9 = mul nsw i32 %conv8, %conv5 900 %add10 = add nsw i32 %add, %mul9 901 %conv13 = sext i16 %tmp4 to i32 902 %conv16 = sext i16 %tmp5 to i32 903 %mul17 = mul nsw i32 %conv16, %conv13 904 %add18 = add nsw i32 %add10, %mul17 905 %conv21 = sext i16 %tmp6 to i32 906 %conv24 = sext i16 %tmp7 to i32 907 %mul25 = mul nsw i32 %conv24, %conv21 908 %add26 = add nsw i32 %add18, %mul25 909 %add27 = add nuw nsw i32 %i.050, 4 910 %cmp = icmp ult i32 %add27, 100 911 br i1 %cmp, label %for.body, label %for.cond.cleanup 912} 913 914