xref: /llvm-project/llvm/test/CodeGen/ARM/GlobalISel/arm-isel-divmod.ll (revision 21a42bcc0be2e99fd17c3751e2488e1df9f3e636)
1; RUN: llc -mtriple arm-gnueabi -mattr=+v6t2,+hwdiv-arm -global-isel %s -o - | FileCheck %s -check-prefixes=CHECK,HWDIV
2; RUN: llc -mtriple arm-gnueabi -mattr=+v6t2,-hwdiv-arm -global-isel %s -o - | FileCheck %s -check-prefixes=CHECK,SOFT-AEABI
3; RUN: llc -mtriple arm-gnu -mattr=+v6t2,+hwdiv-arm -global-isel %s -o - | FileCheck %s -check-prefixes=CHECK,HWDIV
4; RUN: llc -mtriple arm-gnu -mattr=+v6t2,-hwdiv-arm -global-isel %s -o - | FileCheck %s -check-prefixes=CHECK,SOFT-DEFAULT
5
6define arm_aapcscc i32 @test_sdiv_i32(i32 %a, i32 %b) {
7; CHECK-LABEL: test_sdiv_i32:
8; HWDIV: sdiv
9; SOFT-AEABI: bl __aeabi_idiv
10; SOFT-DEFAULT: bl __divsi3
11  %r = sdiv i32 %a, %b
12  ret i32 %r
13}
14
15define arm_aapcscc i32 @test_udiv_i32(i32 %a, i32 %b) {
16; CHECK-LABEL: test_udiv_i32:
17; HWDIV: udiv
18; SOFT-AEABI: bl __aeabi_uidiv
19; SOFT-DEFAULT: bl __udivsi3
20  %r = udiv i32 %a, %b
21  ret i32 %r
22}
23
24define arm_aapcscc i16 @test_sdiv_i16(i16 %a, i16 %b) {
25; CHECK-LABEL: test_sdiv_i16:
26; HWDIV: sdiv
27; SOFT-AEABI: bl __aeabi_idiv
28; SOFT-DEFAULT: bl __divsi3
29  %r = sdiv i16 %a, %b
30  ret i16 %r
31}
32
33define arm_aapcscc i16 @test_udiv_i16(i16 %a, i16 %b) {
34; CHECK-LABEL: test_udiv_i16:
35; HWDIV: udiv
36; SOFT-AEABI: bl __aeabi_uidiv
37; SOFT-DEFAULT: bl __udivsi3
38  %r = udiv i16 %a, %b
39  ret i16 %r
40}
41
42define arm_aapcscc i8 @test_sdiv_i8(i8 %a, i8 %b) {
43; CHECK-LABEL: test_sdiv_i8:
44; HWDIV: sdiv
45; SOFT-AEABI: bl __aeabi_idiv
46; SOFT-DEFAULT: bl __divsi3
47  %r = sdiv i8 %a, %b
48  ret i8 %r
49}
50
51define arm_aapcscc i8 @test_udiv_i8(i8 %a, i8 %b) {
52; CHECK-LABEL: test_udiv_i8:
53; HWDIV: udiv
54; SOFT-AEABI: bl __aeabi_uidiv
55; SOFT-DEFAULT: bl __udivsi3
56  %r = udiv i8 %a, %b
57  ret i8 %r
58}
59
60define arm_aapcscc i32 @test_srem_i32(i32 %x, i32 %y) {
61; CHECK-LABEL: test_srem_i32:
62; HWDIV: sdiv
63; SOFT-AEABI: bl __aeabi_idivmod
64; SOFT-DEFAULT: bl __modsi3
65  %r = srem i32 %x, %y
66  ret i32 %r
67}
68
69define arm_aapcscc i32 @test_urem_i32(i32 %x, i32 %y) {
70; CHECK-LABEL: test_urem_i32:
71; HWDIV: udiv
72; SOFT-AEABI: bl __aeabi_uidivmod
73; SOFT-DEFAULT: bl __umodsi3
74  %r = urem i32 %x, %y
75  ret i32 %r
76}
77
78define arm_aapcscc i16 @test_srem_i16(i16 %x, i16 %y) {
79; CHECK-LABEL: test_srem_i16:
80; HWDIV: sdiv
81; SOFT-AEABI: bl __aeabi_idivmod
82; SOFT-DEFAULT: bl __modsi3
83  %r = srem i16 %x, %y
84  ret i16 %r
85}
86
87define arm_aapcscc i16 @test_urem_i16(i16 %x, i16 %y) {
88; CHECK-LABEL: test_urem_i16:
89; HWDIV: udiv
90; SOFT-AEABI: bl __aeabi_uidivmod
91; SOFT-DEFAULT: bl __umodsi3
92  %r = urem i16 %x, %y
93  ret i16 %r
94}
95
96define arm_aapcscc i8 @test_srem_i8(i8 %x, i8 %y) {
97; CHECK-LABEL: test_srem_i8:
98; HWDIV: sdiv
99; SOFT-AEABI: bl __aeabi_idivmod
100; SOFT-DEFAULT: bl __modsi3
101  %r = srem i8 %x, %y
102  ret i8 %r
103}
104
105define arm_aapcscc i8 @test_urem_i8(i8 %x, i8 %y) {
106; CHECK-LABEL: test_urem_i8:
107; HWDIV: udiv
108; SOFT-AEABI: bl __aeabi_uidivmod
109; SOFT-DEFAULT: bl __umodsi3
110  %r = urem i8 %x, %y
111  ret i8 %r
112}
113